2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
5 * EXYNOS4210 - CPU frequency scaling support
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/err.h>
15 #include <linux/clk.h>
17 #include <linux/slab.h>
18 #include <linux/cpufreq.h>
20 #include <linux/of_address.h>
22 #include "exynos-cpufreq.h"
24 static struct clk *cpu_clk;
25 static struct clk *moutcore;
26 static struct clk *mout_mpll;
27 static struct clk *mout_apll;
28 static struct exynos_dvfs_info *cpufreq;
30 static unsigned int exynos4210_volt_table[] = {
31 1250000, 1150000, 1050000, 975000, 950000,
34 static struct cpufreq_frequency_table exynos4210_freq_table[] = {
40 {0, 0, CPUFREQ_TABLE_END},
43 static struct apll_freq apll_freq_4210[] = {
47 * clock divider for CORE, COREM0, COREM1, PERIPH, ATB, PCLK_DBG, APLL, RESERVED
48 * clock divider for COPY, HPM, RESERVED
51 APLL_FREQ(1200, 0, 3, 7, 3, 4, 1, 7, 0, 5, 0, 0, 150, 3, 1),
52 APLL_FREQ(1000, 0, 3, 7, 3, 4, 1, 7, 0, 4, 0, 0, 250, 6, 1),
53 APLL_FREQ(800, 0, 3, 7, 3, 3, 1, 7, 0, 3, 0, 0, 200, 6, 1),
54 APLL_FREQ(500, 0, 3, 7, 3, 3, 1, 7, 0, 3, 0, 0, 250, 6, 2),
55 APLL_FREQ(200, 0, 1, 3, 1, 3, 1, 0, 0, 3, 0, 0, 200, 6, 3),
58 static void exynos4210_set_clkdiv(unsigned int div_index)
62 /* Change Divider - CPU0 */
64 tmp = apll_freq_4210[div_index].clk_div_cpu0;
66 __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU);
69 tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU);
70 } while (tmp & 0x1111111);
72 /* Change Divider - CPU1 */
74 tmp = apll_freq_4210[div_index].clk_div_cpu1;
76 __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS4_CLKDIV_CPU1);
79 tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKDIV_STATCPU1);
83 static void exynos4210_set_apll(unsigned int index)
85 unsigned int tmp, freq = apll_freq_4210[index].freq;
87 /* MUX_CORE_SEL = MPLL, ARMCLK uses MPLL for lock time */
88 clk_set_parent(moutcore, mout_mpll);
91 tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU)
92 >> EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT);
96 clk_set_rate(mout_apll, freq * 1000);
98 /* MUX_CORE_SEL = APLL */
99 clk_set_parent(moutcore, mout_apll);
102 tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS4_CLKMUX_STATCPU);
103 tmp &= EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK;
104 } while (tmp != (0x1 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT));
107 static void exynos4210_set_frequency(unsigned int old_index,
108 unsigned int new_index)
110 if (old_index > new_index) {
111 exynos4210_set_clkdiv(new_index);
112 exynos4210_set_apll(new_index);
113 } else if (old_index < new_index) {
114 exynos4210_set_apll(new_index);
115 exynos4210_set_clkdiv(new_index);
119 int exynos4210_cpufreq_init(struct exynos_dvfs_info *info)
121 struct device_node *np;
125 * HACK: This is a temporary workaround to get access to clock
126 * controller registers directly and remove static mappings and
127 * dependencies on platform headers. It is necessary to enable
128 * Exynos multi-platform support and will be removed together with
129 * this whole driver as soon as Exynos gets migrated to use
132 np = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-clock");
134 pr_err("%s: failed to find clock controller DT node\n",
139 info->cmu_regs = of_iomap(np, 0);
140 if (!info->cmu_regs) {
141 pr_err("%s: failed to map CMU registers\n", __func__);
145 cpu_clk = clk_get(NULL, "armclk");
147 return PTR_ERR(cpu_clk);
149 moutcore = clk_get(NULL, "moutcore");
150 if (IS_ERR(moutcore))
153 mout_mpll = clk_get(NULL, "mout_mpll");
154 if (IS_ERR(mout_mpll))
157 rate = clk_get_rate(mout_mpll) / 1000;
159 mout_apll = clk_get(NULL, "mout_apll");
160 if (IS_ERR(mout_apll))
163 info->mpll_freq_khz = rate;
165 info->pll_safe_idx = L2;
166 info->cpu_clk = cpu_clk;
167 info->volt_table = exynos4210_volt_table;
168 info->freq_table = exynos4210_freq_table;
169 info->set_freq = exynos4210_set_frequency;
182 pr_debug("%s: failed initialization\n", __func__);