2 * intel_pstate.c: Native P state management for Intel processors
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
13 #include <linux/kernel.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/module.h>
16 #include <linux/ktime.h>
17 #include <linux/hrtimer.h>
18 #include <linux/tick.h>
19 #include <linux/slab.h>
20 #include <linux/sched.h>
21 #include <linux/list.h>
22 #include <linux/cpu.h>
23 #include <linux/cpufreq.h>
24 #include <linux/sysfs.h>
25 #include <linux/types.h>
27 #include <linux/debugfs.h>
28 #include <linux/acpi.h>
29 #include <trace/events/power.h>
31 #include <asm/div64.h>
33 #include <asm/cpu_device_id.h>
35 #define BYT_RATIOS 0x66a
36 #define BYT_VIDS 0x66b
37 #define BYT_TURBO_RATIOS 0x66c
38 #define BYT_TURBO_VIDS 0x66d
41 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
42 #define fp_toint(X) ((X) >> FRAC_BITS)
45 static inline int32_t mul_fp(int32_t x, int32_t y)
47 return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
50 static inline int32_t div_fp(int32_t x, int32_t y)
52 return div_s64((int64_t)x << FRAC_BITS, y);
56 int32_t core_pct_busy;
91 struct timer_list timer;
93 struct pstate_data pstate;
97 ktime_t last_sample_time;
100 struct sample sample;
103 static struct cpudata **all_cpu_data;
104 struct pstate_adjust_policy {
113 struct pstate_funcs {
114 int (*get_max)(void);
115 int (*get_min)(void);
116 int (*get_turbo)(void);
117 int (*get_scaling)(void);
118 void (*set)(struct cpudata*, int pstate);
119 void (*get_vid)(struct cpudata *);
122 struct cpu_defaults {
123 struct pstate_adjust_policy pid_policy;
124 struct pstate_funcs funcs;
127 static struct pstate_adjust_policy pid_params;
128 static struct pstate_funcs pstate_funcs;
141 static struct perf_limits limits = {
145 .max_perf = int_tofp(1),
148 .max_policy_pct = 100,
149 .max_sysfs_pct = 100,
152 static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
153 int deadband, int integral) {
154 pid->setpoint = setpoint;
155 pid->deadband = deadband;
156 pid->integral = int_tofp(integral);
157 pid->last_err = int_tofp(setpoint) - int_tofp(busy);
160 static inline void pid_p_gain_set(struct _pid *pid, int percent)
162 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
165 static inline void pid_i_gain_set(struct _pid *pid, int percent)
167 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
170 static inline void pid_d_gain_set(struct _pid *pid, int percent)
172 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
175 static signed int pid_calc(struct _pid *pid, int32_t busy)
178 int32_t pterm, dterm, fp_error;
179 int32_t integral_limit;
181 fp_error = int_tofp(pid->setpoint) - busy;
183 if (abs(fp_error) <= int_tofp(pid->deadband))
186 pterm = mul_fp(pid->p_gain, fp_error);
188 pid->integral += fp_error;
190 /* limit the integral term */
191 integral_limit = int_tofp(30);
192 if (pid->integral > integral_limit)
193 pid->integral = integral_limit;
194 if (pid->integral < -integral_limit)
195 pid->integral = -integral_limit;
197 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
198 pid->last_err = fp_error;
200 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
201 result = result + (1 << (FRAC_BITS-1));
202 return (signed int)fp_toint(result);
205 static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
207 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
208 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
209 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
211 pid_reset(&cpu->pid, pid_params.setpoint, 100, pid_params.deadband, 0);
214 static inline void intel_pstate_reset_all_pid(void)
218 for_each_online_cpu(cpu) {
219 if (all_cpu_data[cpu])
220 intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
224 static inline void update_turbo_state(void)
229 cpu = all_cpu_data[0];
230 rdmsrl(MSR_IA32_MISC_ENABLE, misc_en);
231 limits.turbo_disabled =
232 (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ||
233 cpu->pstate.max_pstate == cpu->pstate.turbo_pstate);
236 /************************** debugfs begin ************************/
237 static int pid_param_set(void *data, u64 val)
240 intel_pstate_reset_all_pid();
244 static int pid_param_get(void *data, u64 *val)
249 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get, pid_param_set, "%llu\n");
256 static struct pid_param pid_files[] = {
257 {"sample_rate_ms", &pid_params.sample_rate_ms},
258 {"d_gain_pct", &pid_params.d_gain_pct},
259 {"i_gain_pct", &pid_params.i_gain_pct},
260 {"deadband", &pid_params.deadband},
261 {"setpoint", &pid_params.setpoint},
262 {"p_gain_pct", &pid_params.p_gain_pct},
266 static void __init intel_pstate_debug_expose_params(void)
268 struct dentry *debugfs_parent;
271 debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
272 if (IS_ERR_OR_NULL(debugfs_parent))
274 while (pid_files[i].name) {
275 debugfs_create_file(pid_files[i].name, 0660,
276 debugfs_parent, pid_files[i].value,
282 /************************** debugfs end ************************/
284 /************************** sysfs begin ************************/
285 #define show_one(file_name, object) \
286 static ssize_t show_##file_name \
287 (struct kobject *kobj, struct attribute *attr, char *buf) \
289 return sprintf(buf, "%u\n", limits.object); \
292 static ssize_t show_no_turbo(struct kobject *kobj,
293 struct attribute *attr, char *buf)
297 update_turbo_state();
298 if (limits.turbo_disabled)
299 ret = sprintf(buf, "%u\n", limits.turbo_disabled);
301 ret = sprintf(buf, "%u\n", limits.no_turbo);
306 static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
307 const char *buf, size_t count)
312 ret = sscanf(buf, "%u", &input);
316 update_turbo_state();
317 if (limits.turbo_disabled) {
318 pr_warn("Turbo disabled by BIOS or unavailable on processor\n");
321 limits.no_turbo = clamp_t(int, input, 0, 1);
326 static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
327 const char *buf, size_t count)
332 ret = sscanf(buf, "%u", &input);
336 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
337 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
338 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
343 static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
344 const char *buf, size_t count)
349 ret = sscanf(buf, "%u", &input);
352 limits.min_perf_pct = clamp_t(int, input, 0 , 100);
353 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
358 show_one(max_perf_pct, max_perf_pct);
359 show_one(min_perf_pct, min_perf_pct);
361 define_one_global_rw(no_turbo);
362 define_one_global_rw(max_perf_pct);
363 define_one_global_rw(min_perf_pct);
365 static struct attribute *intel_pstate_attributes[] = {
372 static struct attribute_group intel_pstate_attr_group = {
373 .attrs = intel_pstate_attributes,
376 static void __init intel_pstate_sysfs_expose_params(void)
378 struct kobject *intel_pstate_kobject;
381 intel_pstate_kobject = kobject_create_and_add("intel_pstate",
382 &cpu_subsys.dev_root->kobj);
383 BUG_ON(!intel_pstate_kobject);
384 rc = sysfs_create_group(intel_pstate_kobject, &intel_pstate_attr_group);
388 /************************** sysfs end ************************/
389 static int byt_get_min_pstate(void)
393 rdmsrl(BYT_RATIOS, value);
394 return (value >> 8) & 0x7F;
397 static int byt_get_max_pstate(void)
401 rdmsrl(BYT_RATIOS, value);
402 return (value >> 16) & 0x7F;
405 static int byt_get_turbo_pstate(void)
409 rdmsrl(BYT_TURBO_RATIOS, value);
413 static void byt_set_pstate(struct cpudata *cpudata, int pstate)
420 if (limits.no_turbo && !limits.turbo_disabled)
423 vid_fp = cpudata->vid.min + mul_fp(
424 int_tofp(pstate - cpudata->pstate.min_pstate),
427 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
428 vid = fp_toint(vid_fp);
430 if (pstate > cpudata->pstate.max_pstate)
431 vid = cpudata->vid.turbo;
435 wrmsrl(MSR_IA32_PERF_CTL, val);
438 #define BYT_BCLK_FREQS 5
439 static int byt_freq_table[BYT_BCLK_FREQS] = { 833, 1000, 1333, 1167, 800};
441 static int byt_get_scaling(void)
446 rdmsrl(MSR_FSB_FREQ, value);
449 BUG_ON(i > BYT_BCLK_FREQS);
451 return byt_freq_table[i] * 100;
454 static void byt_get_vid(struct cpudata *cpudata)
458 rdmsrl(BYT_VIDS, value);
459 cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
460 cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
461 cpudata->vid.ratio = div_fp(
462 cpudata->vid.max - cpudata->vid.min,
463 int_tofp(cpudata->pstate.max_pstate -
464 cpudata->pstate.min_pstate));
466 rdmsrl(BYT_TURBO_VIDS, value);
467 cpudata->vid.turbo = value & 0x7f;
470 static int core_get_min_pstate(void)
474 rdmsrl(MSR_PLATFORM_INFO, value);
475 return (value >> 40) & 0xFF;
478 static int core_get_max_pstate(void)
482 rdmsrl(MSR_PLATFORM_INFO, value);
483 return (value >> 8) & 0xFF;
486 static int core_get_turbo_pstate(void)
491 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
492 nont = core_get_max_pstate();
499 static inline int core_get_scaling(void)
504 static void core_set_pstate(struct cpudata *cpudata, int pstate)
509 if (limits.no_turbo && !limits.turbo_disabled)
512 wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
515 static struct cpu_defaults core_params = {
517 .sample_rate_ms = 10,
525 .get_max = core_get_max_pstate,
526 .get_min = core_get_min_pstate,
527 .get_turbo = core_get_turbo_pstate,
528 .get_scaling = core_get_scaling,
529 .set = core_set_pstate,
533 static struct cpu_defaults byt_params = {
535 .sample_rate_ms = 10,
543 .get_max = byt_get_max_pstate,
544 .get_min = byt_get_min_pstate,
545 .get_turbo = byt_get_turbo_pstate,
546 .set = byt_set_pstate,
547 .get_scaling = byt_get_scaling,
548 .get_vid = byt_get_vid,
552 static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
554 int max_perf = cpu->pstate.turbo_pstate;
558 if (limits.no_turbo || limits.turbo_disabled)
559 max_perf = cpu->pstate.max_pstate;
561 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
562 *max = clamp_t(int, max_perf_adj,
563 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
565 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
566 *min = clamp_t(int, min_perf, cpu->pstate.min_pstate, max_perf);
569 static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
571 int max_perf, min_perf;
573 update_turbo_state();
575 intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
577 pstate = clamp_t(int, pstate, min_perf, max_perf);
579 if (pstate == cpu->pstate.current_pstate)
582 trace_cpu_frequency(pstate * cpu->pstate.scaling, cpu->cpu);
584 cpu->pstate.current_pstate = pstate;
586 pstate_funcs.set(cpu, pstate);
589 static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
591 cpu->pstate.min_pstate = pstate_funcs.get_min();
592 cpu->pstate.max_pstate = pstate_funcs.get_max();
593 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
594 cpu->pstate.scaling = pstate_funcs.get_scaling();
596 if (pstate_funcs.get_vid)
597 pstate_funcs.get_vid(cpu);
598 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
601 static inline void intel_pstate_calc_busy(struct cpudata *cpu)
603 struct sample *sample = &cpu->sample;
606 core_pct = int_tofp(sample->aperf) * int_tofp(100);
607 core_pct = div64_u64(core_pct, int_tofp(sample->mperf));
609 sample->freq = fp_toint(
611 cpu->pstate.max_pstate * cpu->pstate.scaling / 100),
614 sample->core_pct_busy = (int32_t)core_pct;
617 static inline void intel_pstate_sample(struct cpudata *cpu)
622 local_irq_save(flags);
623 rdmsrl(MSR_IA32_APERF, aperf);
624 rdmsrl(MSR_IA32_MPERF, mperf);
625 local_irq_restore(flags);
627 cpu->last_sample_time = cpu->sample.time;
628 cpu->sample.time = ktime_get();
629 cpu->sample.aperf = aperf;
630 cpu->sample.mperf = mperf;
631 cpu->sample.aperf -= cpu->prev_aperf;
632 cpu->sample.mperf -= cpu->prev_mperf;
634 intel_pstate_calc_busy(cpu);
636 cpu->prev_aperf = aperf;
637 cpu->prev_mperf = mperf;
640 static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
644 delay = msecs_to_jiffies(pid_params.sample_rate_ms);
645 mod_timer_pinned(&cpu->timer, jiffies + delay);
648 static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
650 int32_t core_busy, max_pstate, current_pstate, sample_ratio;
654 core_busy = cpu->sample.core_pct_busy;
655 max_pstate = int_tofp(cpu->pstate.max_pstate);
656 current_pstate = int_tofp(cpu->pstate.current_pstate);
657 core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
659 sample_time = pid_params.sample_rate_ms * USEC_PER_MSEC;
660 duration_us = (u32) ktime_us_delta(cpu->sample.time,
661 cpu->last_sample_time);
662 if (duration_us > sample_time * 3) {
663 sample_ratio = div_fp(int_tofp(sample_time),
664 int_tofp(duration_us));
665 core_busy = mul_fp(core_busy, sample_ratio);
671 static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
678 busy_scaled = intel_pstate_get_scaled_busy(cpu);
680 ctl = pid_calc(pid, busy_scaled);
682 /* Negative values of ctl increase the pstate and vice versa */
683 intel_pstate_set_pstate(cpu, cpu->pstate.current_pstate - ctl);
686 static void intel_pstate_timer_func(unsigned long __data)
688 struct cpudata *cpu = (struct cpudata *) __data;
689 struct sample *sample;
691 intel_pstate_sample(cpu);
693 sample = &cpu->sample;
695 intel_pstate_adjust_busy_pstate(cpu);
697 trace_pstate_sample(fp_toint(sample->core_pct_busy),
698 fp_toint(intel_pstate_get_scaled_busy(cpu)),
699 cpu->pstate.current_pstate,
704 intel_pstate_set_sample_time(cpu);
707 #define ICPU(model, policy) \
708 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
709 (unsigned long)&policy }
711 static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
712 ICPU(0x2a, core_params),
713 ICPU(0x2d, core_params),
714 ICPU(0x37, byt_params),
715 ICPU(0x3a, core_params),
716 ICPU(0x3c, core_params),
717 ICPU(0x3d, core_params),
718 ICPU(0x3e, core_params),
719 ICPU(0x3f, core_params),
720 ICPU(0x45, core_params),
721 ICPU(0x46, core_params),
722 ICPU(0x4c, byt_params),
723 ICPU(0x4f, core_params),
724 ICPU(0x56, core_params),
727 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
729 static int intel_pstate_init_cpu(unsigned int cpunum)
733 if (!all_cpu_data[cpunum])
734 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata),
736 if (!all_cpu_data[cpunum])
739 cpu = all_cpu_data[cpunum];
742 intel_pstate_get_cpu_pstates(cpu);
744 init_timer_deferrable(&cpu->timer);
745 cpu->timer.function = intel_pstate_timer_func;
746 cpu->timer.data = (unsigned long)cpu;
747 cpu->timer.expires = jiffies + HZ/100;
748 intel_pstate_busy_pid_reset(cpu);
749 intel_pstate_sample(cpu);
751 add_timer_on(&cpu->timer, cpunum);
753 pr_debug("Intel pstate controlling: cpu %d\n", cpunum);
758 static unsigned int intel_pstate_get(unsigned int cpu_num)
760 struct sample *sample;
763 cpu = all_cpu_data[cpu_num];
766 sample = &cpu->sample;
770 static int intel_pstate_set_policy(struct cpufreq_policy *policy)
772 if (!policy->cpuinfo.max_freq)
775 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
776 limits.min_perf_pct = 100;
777 limits.min_perf = int_tofp(1);
778 limits.max_policy_pct = 100;
779 limits.max_perf_pct = 100;
780 limits.max_perf = int_tofp(1);
784 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
785 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
786 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
788 limits.max_policy_pct = (policy->max * 100) / policy->cpuinfo.max_freq;
789 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
790 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
791 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
796 static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
798 cpufreq_verify_within_cpu_limits(policy);
800 if (policy->policy != CPUFREQ_POLICY_POWERSAVE &&
801 policy->policy != CPUFREQ_POLICY_PERFORMANCE)
807 static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
809 int cpu_num = policy->cpu;
810 struct cpudata *cpu = all_cpu_data[cpu_num];
812 pr_info("intel_pstate CPU %d exiting\n", cpu_num);
814 del_timer_sync(&all_cpu_data[cpu_num]->timer);
815 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
818 static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
823 rc = intel_pstate_init_cpu(policy->cpu);
827 cpu = all_cpu_data[policy->cpu];
829 if (limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
830 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
832 policy->policy = CPUFREQ_POLICY_POWERSAVE;
834 policy->min = cpu->pstate.min_pstate * cpu->pstate.scaling;
835 policy->max = cpu->pstate.turbo_pstate * cpu->pstate.scaling;
837 /* cpuinfo and default policy values */
838 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * cpu->pstate.scaling;
839 policy->cpuinfo.max_freq =
840 cpu->pstate.turbo_pstate * cpu->pstate.scaling;
841 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
842 cpumask_set_cpu(policy->cpu, policy->cpus);
847 static struct cpufreq_driver intel_pstate_driver = {
848 .flags = CPUFREQ_CONST_LOOPS,
849 .verify = intel_pstate_verify_policy,
850 .setpolicy = intel_pstate_set_policy,
851 .get = intel_pstate_get,
852 .init = intel_pstate_cpu_init,
853 .stop_cpu = intel_pstate_stop_cpu,
854 .name = "intel_pstate",
857 static int __initdata no_load;
859 static int intel_pstate_msrs_not_valid(void)
861 /* Check that all the msr's we are using are valid. */
862 u64 aperf, mperf, tmp;
864 rdmsrl(MSR_IA32_APERF, aperf);
865 rdmsrl(MSR_IA32_MPERF, mperf);
867 if (!pstate_funcs.get_max() ||
868 !pstate_funcs.get_min() ||
869 !pstate_funcs.get_turbo())
872 rdmsrl(MSR_IA32_APERF, tmp);
876 rdmsrl(MSR_IA32_MPERF, tmp);
883 static void copy_pid_params(struct pstate_adjust_policy *policy)
885 pid_params.sample_rate_ms = policy->sample_rate_ms;
886 pid_params.p_gain_pct = policy->p_gain_pct;
887 pid_params.i_gain_pct = policy->i_gain_pct;
888 pid_params.d_gain_pct = policy->d_gain_pct;
889 pid_params.deadband = policy->deadband;
890 pid_params.setpoint = policy->setpoint;
893 static void copy_cpu_funcs(struct pstate_funcs *funcs)
895 pstate_funcs.get_max = funcs->get_max;
896 pstate_funcs.get_min = funcs->get_min;
897 pstate_funcs.get_turbo = funcs->get_turbo;
898 pstate_funcs.get_scaling = funcs->get_scaling;
899 pstate_funcs.set = funcs->set;
900 pstate_funcs.get_vid = funcs->get_vid;
903 #if IS_ENABLED(CONFIG_ACPI)
904 #include <acpi/processor.h>
906 static bool intel_pstate_no_acpi_pss(void)
910 for_each_possible_cpu(i) {
912 union acpi_object *pss;
913 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
914 struct acpi_processor *pr = per_cpu(processors, i);
919 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
920 if (ACPI_FAILURE(status))
923 pss = buffer.pointer;
924 if (pss && pss->type == ACPI_TYPE_PACKAGE) {
935 struct hw_vendor_info {
937 char oem_id[ACPI_OEM_ID_SIZE];
938 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
941 /* Hardware vendor-specific info that has its own power management modes */
942 static struct hw_vendor_info vendor_info[] = {
943 {1, "HP ", "ProLiant"},
947 static bool intel_pstate_platform_pwr_mgmt_exists(void)
949 struct acpi_table_header hdr;
950 struct hw_vendor_info *v_info;
953 ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
956 for (v_info = vendor_info; v_info->valid; v_info++) {
957 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE) &&
958 !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) &&
959 intel_pstate_no_acpi_pss())
965 #else /* CONFIG_ACPI not enabled */
966 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
967 #endif /* CONFIG_ACPI */
969 static int __init intel_pstate_init(void)
972 const struct x86_cpu_id *id;
973 struct cpu_defaults *cpu_info;
978 id = x86_match_cpu(intel_pstate_cpu_ids);
983 * The Intel pstate driver will be ignored if the platform
984 * firmware has its own power management modes.
986 if (intel_pstate_platform_pwr_mgmt_exists())
989 cpu_info = (struct cpu_defaults *)id->driver_data;
991 copy_pid_params(&cpu_info->pid_policy);
992 copy_cpu_funcs(&cpu_info->funcs);
994 if (intel_pstate_msrs_not_valid())
997 pr_info("Intel P-state driver initializing.\n");
999 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
1003 rc = cpufreq_register_driver(&intel_pstate_driver);
1007 intel_pstate_debug_expose_params();
1008 intel_pstate_sysfs_expose_params();
1013 for_each_online_cpu(cpu) {
1014 if (all_cpu_data[cpu]) {
1015 del_timer_sync(&all_cpu_data[cpu]->timer);
1016 kfree(all_cpu_data[cpu]);
1021 vfree(all_cpu_data);
1024 device_initcall(intel_pstate_init);
1026 static int __init intel_pstate_setup(char *str)
1031 if (!strcmp(str, "disable"))
1035 early_param("intel_pstate", intel_pstate_setup);
1037 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
1038 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
1039 MODULE_LICENSE("GPL");