2 * Copyright (C) 2013 ROCKCHIP, Inc.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #define pr_fmt(fmt) "cpufreq: " fmt
15 #include <linux/clk.h>
16 #include <linux/cpufreq.h>
17 #include <linux/err.h>
18 #include <linux/kernel_stat.h>
19 #include <linux/init.h>
20 #include <linux/reboot.h>
21 #include <linux/suspend.h>
22 #include <linux/tick.h>
23 #include <linux/workqueue.h>
24 #include <linux/delay.h>
25 #include <linux/regulator/consumer.h>
27 #include <linux/miscdevice.h>
28 #include <linux/string.h>
29 #include <linux/rockchip/cpu.h>
30 #include <linux/rockchip/dvfs.h>
31 #include <asm/smp_plat.h>
33 #include <asm/unistd.h>
34 #include <asm/uaccess.h>
35 #include <asm/system_misc.h>
36 #include "../../../drivers/clk/rockchip/clk-pd.h"
38 extern void dvfs_disable_temp_limit(void);
43 #define FREQ_DBG(fmt, args...) pr_debug(fmt, ## args)
44 #define FREQ_LOG(fmt, args...) pr_debug(fmt, ## args)
46 #define FREQ_DBG(fmt, args...) do {} while(0)
47 #define FREQ_LOG(fmt, args...) do {} while(0)
49 #define FREQ_ERR(fmt, args...) pr_err(fmt, ## args)
51 /* Frequency table index must be sequential starting at 0 */
52 static struct cpufreq_frequency_table default_freq_table[] = {
53 {.frequency = 312 * 1000, .index = 875 * 1000},
54 {.frequency = 504 * 1000, .index = 925 * 1000},
55 {.frequency = 816 * 1000, .index = 975 * 1000},
56 {.frequency = 1008 * 1000, .index = 1075 * 1000},
57 {.frequency = 1200 * 1000, .index = 1150 * 1000},
58 {.frequency = 1416 * 1000, .index = 1250 * 1000},
59 {.frequency = 1608 * 1000, .index = 1350 * 1000},
60 {.frequency = CPUFREQ_TABLE_END},
62 static struct cpufreq_frequency_table *freq_table = default_freq_table;
63 /*********************************************************/
64 /* additional symantics for "relation" in cpufreq with pm */
65 #define DISABLE_FURTHER_CPUFREQ 0x10
66 #define ENABLE_FURTHER_CPUFREQ 0x20
67 #define MASK_FURTHER_CPUFREQ 0x30
68 /* With 0x00(NOCHANGE), it depends on the previous "further" status */
69 #define CPUFREQ_PRIVATE 0x100
70 static unsigned int no_cpufreq_access = 0;
71 static unsigned int suspend_freq = 816 * 1000;
72 static unsigned int suspend_volt = 1000000; // 1V
73 static unsigned int low_battery_freq = 600 * 1000;
74 static unsigned int low_battery_capacity = 5; // 5%
75 static bool is_booting = true;
76 static DEFINE_MUTEX(cpufreq_mutex);
77 static bool gpu_is_mali400;
78 struct dvfs_node *clk_cpu_dvfs_node = NULL;
79 struct dvfs_node *clk_gpu_dvfs_node = NULL;
80 struct dvfs_node *aclk_vio1_dvfs_node = NULL;
81 struct dvfs_node *clk_ddr_dvfs_node = NULL;
82 /*******************************************************/
83 static unsigned int cpufreq_get_rate(unsigned int cpu)
85 if (clk_cpu_dvfs_node)
86 return clk_get_rate(clk_cpu_dvfs_node->clk) / 1000;
91 static bool cpufreq_is_ondemand(struct cpufreq_policy *policy)
94 if (policy && policy->governor)
95 c = policy->governor->name[0];
96 return (c == 'o' || c == 'i' || c == 'c' || c == 'h');
99 static unsigned int get_freq_from_table(unsigned int max_freq)
102 unsigned int target_freq = 0;
103 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
104 unsigned int freq = freq_table[i].frequency;
105 if (freq <= max_freq && target_freq < freq) {
110 target_freq = max_freq;
114 static int cpufreq_notifier_policy(struct notifier_block *nb, unsigned long val, void *data)
116 static unsigned int min_rate=0, max_rate=-1;
117 struct cpufreq_policy *policy = data;
119 if (val != CPUFREQ_ADJUST)
122 if (cpufreq_is_ondemand(policy)) {
123 FREQ_DBG("queue work\n");
124 dvfs_clk_enable_limit(clk_cpu_dvfs_node, min_rate, max_rate);
126 FREQ_DBG("cancel work\n");
127 dvfs_clk_get_limit(clk_cpu_dvfs_node, &min_rate, &max_rate);
133 static struct notifier_block notifier_policy_block = {
134 .notifier_call = cpufreq_notifier_policy
137 static int cpufreq_verify(struct cpufreq_policy *policy)
141 return cpufreq_frequency_table_verify(policy, freq_table);
144 static int cpufreq_scale_rate_for_dvfs(struct clk *clk, unsigned long rate)
147 struct cpufreq_freqs freqs;
148 struct cpufreq_policy *policy;
150 freqs.new = rate / 1000;
151 freqs.old = clk_get_rate(clk) / 1000;
153 for_each_online_cpu(freqs.cpu) {
154 policy = cpufreq_cpu_get(freqs.cpu);
155 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
156 cpufreq_cpu_put(policy);
159 FREQ_DBG("cpufreq_scale_rate_for_dvfs(%lu)\n", rate);
161 ret = clk_set_rate(clk, rate);
163 freqs.new = clk_get_rate(clk) / 1000;
165 for_each_online_cpu(freqs.cpu) {
166 policy = cpufreq_cpu_get(freqs.cpu);
167 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
168 cpufreq_cpu_put(policy);
175 static int cpufreq_init_cpu0(struct cpufreq_policy *policy)
179 struct regulator *vdd_gpu_regulator;
181 gpu_is_mali400 = cpu_is_rk3188();
183 clk_gpu_dvfs_node = clk_get_dvfs_node("clk_gpu");
184 if (clk_gpu_dvfs_node){
185 clk_enable_dvfs(clk_gpu_dvfs_node);
186 vdd_gpu_regulator = dvfs_get_regulator("vdd_gpu");
187 if (!IS_ERR_OR_NULL(vdd_gpu_regulator)) {
188 if (!regulator_is_enabled(vdd_gpu_regulator)) {
189 ret = regulator_enable(vdd_gpu_regulator);
190 arm_pm_restart('h', NULL);
192 /* make sure vdd_gpu_regulator is in use,
193 so it will not be disable by regulator_init_complete*/
194 ret = regulator_enable(vdd_gpu_regulator);
196 arm_pm_restart('h', NULL);
199 dvfs_clk_enable_limit(clk_gpu_dvfs_node, 133000000, 600000000);
202 clk_ddr_dvfs_node = clk_get_dvfs_node("clk_ddr");
203 if (clk_ddr_dvfs_node){
204 clk_enable_dvfs(clk_ddr_dvfs_node);
207 clk_cpu_dvfs_node = clk_get_dvfs_node("clk_core");
208 if (!clk_cpu_dvfs_node){
211 dvfs_clk_register_set_rate_callback(clk_cpu_dvfs_node, cpufreq_scale_rate_for_dvfs);
212 freq_table = dvfs_get_freq_volt_table(clk_cpu_dvfs_node);
213 if (freq_table == NULL) {
214 freq_table = default_freq_table;
217 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
218 if (freq_table[i].index >= suspend_volt && v > freq_table[i].index) {
219 suspend_freq = freq_table[i].frequency;
220 v = freq_table[i].index;
224 low_battery_freq = get_freq_from_table(low_battery_freq);
225 clk_enable_dvfs(clk_cpu_dvfs_node);
227 cpufreq_register_notifier(¬ifier_policy_block, CPUFREQ_POLICY_NOTIFIER);
229 printk("cpufreq version " VERSION ", suspend freq %d MHz\n", suspend_freq / 1000);
233 static int cpufreq_init(struct cpufreq_policy *policy)
237 if (policy->cpu == 0) {
238 cpu0_err = cpufreq_init_cpu0(policy);
245 cpufreq_frequency_table_cpuinfo(policy, freq_table);
247 cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
250 policy->cur = clk_get_rate(clk_cpu_dvfs_node->clk) / 1000;
252 policy->cpuinfo.transition_latency = 40 * NSEC_PER_USEC; // make ondemand default sampling_rate to 40000
255 * On SMP configuartion, both processors share the voltage
256 * and clock. So both CPUs needs to be scaled together and hence
257 * needs software co-ordination. Use cpufreq affected_cpus
258 * interface to handle this scenario. Additional is_smp() check
259 * is to keep SMP_ON_UP build working.
262 cpumask_setall(policy->cpus);
268 static int cpufreq_exit(struct cpufreq_policy *policy)
270 if (policy->cpu != 0)
273 cpufreq_frequency_table_cpuinfo(policy, freq_table);
274 clk_put_dvfs_node(clk_cpu_dvfs_node);
275 cpufreq_unregister_notifier(¬ifier_policy_block, CPUFREQ_POLICY_NOTIFIER);
280 static struct freq_attr *cpufreq_attr[] = {
281 &cpufreq_freq_attr_scaling_available_freqs,
285 #ifdef CONFIG_CHARGER_DISPLAY
286 extern int rk_get_system_battery_capacity(void);
288 static int rk_get_system_battery_capacity(void) { return 100; }
291 static unsigned int cpufreq_scale_limit(unsigned int target_freq, struct cpufreq_policy *policy, bool is_private)
293 bool is_ondemand = cpufreq_is_ondemand(policy);
299 s64 boottime_ms = ktime_to_ms(ktime_get_boottime());
300 if (boottime_ms > 60 * MSEC_PER_SEC) {
302 } else if (target_freq > low_battery_freq &&
303 rk_get_system_battery_capacity() <= low_battery_capacity) {
304 target_freq = low_battery_freq;
311 static int cpufreq_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation)
313 unsigned int i, new_freq = target_freq, new_rate, cur_rate;
318 FREQ_ERR("no freq table!\n");
322 mutex_lock(&cpufreq_mutex);
324 is_private = relation & CPUFREQ_PRIVATE;
325 relation &= ~CPUFREQ_PRIVATE;
327 if ((relation & ENABLE_FURTHER_CPUFREQ) && no_cpufreq_access)
329 if (no_cpufreq_access) {
330 FREQ_LOG("denied access to %s as it is disabled temporarily\n", __func__);
334 if (relation & DISABLE_FURTHER_CPUFREQ)
336 relation &= ~MASK_FURTHER_CPUFREQ;
338 ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, relation, &i);
340 FREQ_ERR("no freq match for %d(ret=%d)\n", target_freq, ret);
343 new_freq = freq_table[i].frequency;
344 if (!no_cpufreq_access)
345 new_freq = cpufreq_scale_limit(new_freq, policy, is_private);
347 new_rate = new_freq * 1000;
348 cur_rate = dvfs_clk_get_rate(clk_cpu_dvfs_node);
349 FREQ_LOG("req = %7u new = %7u (was = %7u)\n", target_freq, new_freq, cur_rate / 1000);
350 if (new_rate == cur_rate)
352 ret = dvfs_clk_set_rate(clk_cpu_dvfs_node, new_rate);
355 FREQ_DBG("set freq (%7u) end, ret %d\n", new_freq, ret);
356 mutex_unlock(&cpufreq_mutex);
361 static int cpufreq_pm_notifier_event(struct notifier_block *this, unsigned long event, void *ptr)
363 int ret = NOTIFY_DONE;
364 struct cpufreq_policy *policy = cpufreq_cpu_get(0);
369 if (!cpufreq_is_ondemand(policy))
373 case PM_SUSPEND_PREPARE:
375 ret = cpufreq_driver_target(policy, suspend_freq, DISABLE_FURTHER_CPUFREQ | CPUFREQ_RELATION_H);
382 case PM_POST_RESTORE:
383 case PM_POST_SUSPEND:
384 //if (target_freq == policy->cur) then cpufreq_driver_target
385 //will return, and our target will not be called, it casue
386 //ENABLE_FURTHER_CPUFREQ flag invalid, avoid that.
388 cpufreq_driver_target(policy, suspend_freq, ENABLE_FURTHER_CPUFREQ | CPUFREQ_RELATION_H);
393 cpufreq_cpu_put(policy);
397 static struct notifier_block cpufreq_pm_notifier = {
398 .notifier_call = cpufreq_pm_notifier_event,
401 static int cpufreq_reboot_notifier_event(struct notifier_block *this, unsigned long event, void *ptr)
403 struct cpufreq_policy *policy = cpufreq_cpu_get(0);
408 cpufreq_driver_target(policy, suspend_freq, DISABLE_FURTHER_CPUFREQ | CPUFREQ_RELATION_H);
409 cpufreq_cpu_put(policy);
415 int rockchip_cpufreq_reboot_limit_freq(void)
417 dvfs_disable_temp_limit();
418 dvfs_clk_enable_limit(clk_cpu_dvfs_node, 1000*suspend_freq, 1000*suspend_freq);
419 printk("cpufreq: reboot set core rate=%lu, volt=%d\n", dvfs_clk_get_rate(clk_cpu_dvfs_node),
420 regulator_get_voltage(clk_cpu_dvfs_node->vd->regulator));
425 static struct notifier_block cpufreq_reboot_notifier = {
426 .notifier_call = cpufreq_reboot_notifier_event,
429 static int clk_pd_vio_notifier_call(struct notifier_block *nb, unsigned long event, void *ptr)
432 case RK_CLK_PD_PREPARE:
433 if (aclk_vio1_dvfs_node)
434 clk_enable_dvfs(aclk_vio1_dvfs_node);
436 case RK_CLK_PD_UNPREPARE:
437 if (aclk_vio1_dvfs_node)
438 clk_disable_dvfs(aclk_vio1_dvfs_node);
444 static struct notifier_block clk_pd_vio_notifier = {
445 .notifier_call = clk_pd_vio_notifier_call,
449 static struct cpufreq_driver cpufreq_driver = {
450 .flags = CPUFREQ_CONST_LOOPS,
451 .verify = cpufreq_verify,
452 .target = cpufreq_target,
453 .get = cpufreq_get_rate,
454 .init = cpufreq_init,
455 .exit = cpufreq_exit,
457 .attr = cpufreq_attr,
460 static int __init cpufreq_driver_init(void)
464 clk = clk_get(NULL, "pd_vio");
466 rk_clk_pd_notifier_register(clk, &clk_pd_vio_notifier);
467 aclk_vio1_dvfs_node = clk_get_dvfs_node("aclk_vio1");
468 if (aclk_vio1_dvfs_node && __clk_is_enabled(clk)){
469 clk_enable_dvfs(aclk_vio1_dvfs_node);
472 register_pm_notifier(&cpufreq_pm_notifier);
473 return cpufreq_register_driver(&cpufreq_driver);
476 device_initcall(cpufreq_driver_init);