2 * caam - Freescale FSL CAAM support for crypto API
4 * Copyright 2008-2011 Freescale Semiconductor, Inc.
6 * Based on talitos crypto API driver.
8 * relationship of job descriptors to shared descriptors (SteveC Dec 10 2008):
10 * --------------- ---------------
11 * | JobDesc #1 |-------------------->| ShareDesc |
12 * | *(packet 1) | | (PDB) |
13 * --------------- |------------->| (hashKey) |
15 * . | |-------->| (operation) |
16 * --------------- | | ---------------
17 * | JobDesc #2 |------| |
23 * | JobDesc #3 |------------
27 * The SharedDesc never changes for a connection unless rekeyed, but
28 * each packet will likely be in a different place. So all we need
29 * to know to process the packet is where the input is, where the
30 * output goes, and what context we want to process with. Context is
31 * in the SharedDesc, packet references in the JobDesc.
33 * So, a job desc looks like:
35 * ---------------------
37 * | ShareDesc Pointer |
44 * ---------------------
51 #include "desc_constr.h"
54 #include "sg_sw_sec4.h"
60 #define CAAM_CRA_PRIORITY 3000
61 /* max key is sum of AES_MAX_KEY_SIZE, max split key size */
62 #define CAAM_MAX_KEY_SIZE (AES_MAX_KEY_SIZE + \
63 SHA512_DIGEST_SIZE * 2)
64 /* max IV is max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
65 #define CAAM_MAX_IV_LENGTH 16
67 /* length of descriptors text */
68 #define DESC_JOB_IO_LEN (CAAM_CMD_SZ * 5 + CAAM_PTR_SZ * 3)
70 #define DESC_AEAD_BASE (4 * CAAM_CMD_SZ)
71 #define DESC_AEAD_ENC_LEN (DESC_AEAD_BASE + 16 * CAAM_CMD_SZ)
72 #define DESC_AEAD_DEC_LEN (DESC_AEAD_BASE + 21 * CAAM_CMD_SZ)
73 #define DESC_AEAD_GIVENC_LEN (DESC_AEAD_ENC_LEN + 7 * CAAM_CMD_SZ)
75 #define DESC_ABLKCIPHER_BASE (3 * CAAM_CMD_SZ)
76 #define DESC_ABLKCIPHER_ENC_LEN (DESC_ABLKCIPHER_BASE + \
78 #define DESC_ABLKCIPHER_DEC_LEN (DESC_ABLKCIPHER_BASE + \
81 #define DESC_MAX_USED_BYTES (DESC_AEAD_GIVENC_LEN + \
83 #define DESC_MAX_USED_LEN (DESC_MAX_USED_BYTES / CAAM_CMD_SZ)
86 /* for print_hex_dumps with line references */
87 #define xstr(s) str(s)
89 #define debug(format, arg...) printk(format, arg)
91 #define debug(format, arg...)
94 /* Set DK bit in class 1 operation if shared */
95 static inline void append_dec_op1(u32 *desc, u32 type)
97 u32 *jump_cmd, *uncond_jump_cmd;
99 jump_cmd = append_jump(desc, JUMP_TEST_ALL | JUMP_COND_SHRD);
100 append_operation(desc, type | OP_ALG_AS_INITFINAL |
102 uncond_jump_cmd = append_jump(desc, JUMP_TEST_ALL);
103 set_jump_tgt_here(desc, jump_cmd);
104 append_operation(desc, type | OP_ALG_AS_INITFINAL |
105 OP_ALG_DECRYPT | OP_ALG_AAI_DK);
106 set_jump_tgt_here(desc, uncond_jump_cmd);
110 * Wait for completion of class 1 key loading before allowing
113 static inline void append_dec_shr_done(u32 *desc)
117 jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TEST_ALL);
118 set_jump_tgt_here(desc, jump_cmd);
119 append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD);
123 * For aead functions, read payload and write payload,
124 * both of which are specified in req->src and req->dst
126 static inline void aead_append_src_dst(u32 *desc, u32 msg_type)
128 append_seq_fifo_load(desc, 0, FIFOLD_CLASS_BOTH |
129 KEY_VLF | msg_type | FIFOLD_TYPE_LASTBOTH);
130 append_seq_fifo_store(desc, 0, FIFOST_TYPE_MESSAGE_DATA | KEY_VLF);
134 * For aead encrypt and decrypt, read iv for both classes
136 static inline void aead_append_ld_iv(u32 *desc, int ivsize)
138 append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_BYTE_CONTEXT |
139 LDST_CLASS_1_CCB | ivsize);
140 append_move(desc, MOVE_SRC_CLASS1CTX | MOVE_DEST_CLASS2INFIFO | ivsize);
144 * For ablkcipher encrypt and decrypt, read from req->src and
147 static inline void ablkcipher_append_src_dst(u32 *desc)
149 append_math_add(desc, VARSEQOUTLEN, SEQINLEN, REG0, CAAM_CMD_SZ);
150 append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ);
151 append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 |
152 KEY_VLF | FIFOLD_TYPE_MSG | FIFOLD_TYPE_LAST1);
153 append_seq_fifo_store(desc, 0, FIFOST_TYPE_MESSAGE_DATA | KEY_VLF);
157 * If all data, including src (with assoc and iv) or dst (with iv only) are
160 #define GIV_SRC_CONTIG 1
161 #define GIV_DST_CONTIG (1 << 1)
164 * per-session context
167 struct device *jrdev;
168 u32 sh_desc_enc[DESC_MAX_USED_LEN];
169 u32 sh_desc_dec[DESC_MAX_USED_LEN];
170 u32 sh_desc_givenc[DESC_MAX_USED_LEN];
171 dma_addr_t sh_desc_enc_dma;
172 dma_addr_t sh_desc_dec_dma;
173 dma_addr_t sh_desc_givenc_dma;
177 u8 key[CAAM_MAX_KEY_SIZE];
179 unsigned int enckeylen;
180 unsigned int split_key_len;
181 unsigned int split_key_pad_len;
182 unsigned int authsize;
185 static void append_key_aead(u32 *desc, struct caam_ctx *ctx,
188 if (keys_fit_inline) {
189 append_key_as_imm(desc, ctx->key, ctx->split_key_pad_len,
190 ctx->split_key_len, CLASS_2 |
191 KEY_DEST_MDHA_SPLIT | KEY_ENC);
192 append_key_as_imm(desc, (void *)ctx->key +
193 ctx->split_key_pad_len, ctx->enckeylen,
194 ctx->enckeylen, CLASS_1 | KEY_DEST_CLASS_REG);
196 append_key(desc, ctx->key_dma, ctx->split_key_len, CLASS_2 |
197 KEY_DEST_MDHA_SPLIT | KEY_ENC);
198 append_key(desc, ctx->key_dma + ctx->split_key_pad_len,
199 ctx->enckeylen, CLASS_1 | KEY_DEST_CLASS_REG);
203 static void init_sh_desc_key_aead(u32 *desc, struct caam_ctx *ctx,
208 init_sh_desc(desc, HDR_SHARE_SERIAL);
210 /* Skip if already shared */
211 key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL |
214 append_key_aead(desc, ctx, keys_fit_inline);
216 set_jump_tgt_here(desc, key_jump_cmd);
218 /* Propagate errors from shared to job descriptor */
219 append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD);
222 static int aead_set_sh_desc(struct crypto_aead *aead)
224 struct aead_tfm *tfm = &aead->base.crt_aead;
225 struct caam_ctx *ctx = crypto_aead_ctx(aead);
226 struct device *jrdev = ctx->jrdev;
227 bool keys_fit_inline = false;
228 u32 *key_jump_cmd, *jump_cmd;
232 if (!ctx->enckeylen || !ctx->authsize)
236 * Job Descriptor and Shared Descriptors
237 * must all fit into the 64-word Descriptor h/w Buffer
239 if (DESC_AEAD_ENC_LEN + DESC_JOB_IO_LEN +
240 ctx->split_key_pad_len + ctx->enckeylen <=
242 keys_fit_inline = true;
244 /* aead_encrypt shared descriptor */
245 desc = ctx->sh_desc_enc;
247 init_sh_desc_key_aead(desc, ctx, keys_fit_inline);
249 /* Class 2 operation */
250 append_operation(desc, ctx->class2_alg_type |
251 OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT);
253 /* cryptlen = seqoutlen - authsize */
254 append_math_sub_imm_u32(desc, REG3, SEQOUTLEN, IMM, ctx->authsize);
256 /* assoclen + cryptlen = seqinlen - ivsize */
257 append_math_sub_imm_u32(desc, REG2, SEQINLEN, IMM, tfm->ivsize);
259 /* assoclen + cryptlen = (assoclen + cryptlen) - cryptlen */
260 append_math_sub(desc, VARSEQINLEN, REG2, REG3, CAAM_CMD_SZ);
262 /* read assoc before reading payload */
263 append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_MSG |
265 aead_append_ld_iv(desc, tfm->ivsize);
267 /* Class 1 operation */
268 append_operation(desc, ctx->class1_alg_type |
269 OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT);
271 /* Read and write cryptlen bytes */
272 append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ);
273 append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ);
274 aead_append_src_dst(desc, FIFOLD_TYPE_MSG1OUT2);
277 append_seq_store(desc, ctx->authsize, LDST_CLASS_2_CCB |
278 LDST_SRCDST_BYTE_CONTEXT);
280 ctx->sh_desc_enc_dma = dma_map_single(jrdev, desc,
283 if (dma_mapping_error(jrdev, ctx->sh_desc_enc_dma)) {
284 dev_err(jrdev, "unable to map shared descriptor\n");
288 print_hex_dump(KERN_ERR, "aead enc shdesc@"xstr(__LINE__)": ",
289 DUMP_PREFIX_ADDRESS, 16, 4, desc,
290 desc_bytes(desc), 1);
294 * Job Descriptor and Shared Descriptors
295 * must all fit into the 64-word Descriptor h/w Buffer
297 if (DESC_AEAD_DEC_LEN + DESC_JOB_IO_LEN +
298 ctx->split_key_pad_len + ctx->enckeylen <=
300 keys_fit_inline = true;
302 desc = ctx->sh_desc_dec;
304 /* aead_decrypt shared descriptor */
305 init_sh_desc(desc, HDR_SHARE_SERIAL);
307 /* Skip if already shared */
308 key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL |
311 append_key_aead(desc, ctx, keys_fit_inline);
313 /* Only propagate error immediately if shared */
314 jump_cmd = append_jump(desc, JUMP_TEST_ALL);
315 set_jump_tgt_here(desc, key_jump_cmd);
316 append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD);
317 set_jump_tgt_here(desc, jump_cmd);
319 /* Class 2 operation */
320 append_operation(desc, ctx->class2_alg_type |
321 OP_ALG_AS_INITFINAL | OP_ALG_DECRYPT | OP_ALG_ICV_ON);
323 /* assoclen + cryptlen = seqinlen - ivsize */
324 append_math_sub_imm_u32(desc, REG3, SEQINLEN, IMM,
325 ctx->authsize + tfm->ivsize)
326 /* assoclen = (assoclen + cryptlen) - cryptlen */
327 append_math_sub(desc, REG2, SEQOUTLEN, REG0, CAAM_CMD_SZ);
328 append_math_sub(desc, VARSEQINLEN, REG3, REG2, CAAM_CMD_SZ);
330 /* read assoc before reading payload */
331 append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_MSG |
334 aead_append_ld_iv(desc, tfm->ivsize);
336 append_dec_op1(desc, ctx->class1_alg_type);
338 /* Read and write cryptlen bytes */
339 append_math_add(desc, VARSEQINLEN, ZERO, REG2, CAAM_CMD_SZ);
340 append_math_add(desc, VARSEQOUTLEN, ZERO, REG2, CAAM_CMD_SZ);
341 aead_append_src_dst(desc, FIFOLD_TYPE_MSG);
344 append_seq_fifo_load(desc, ctx->authsize, FIFOLD_CLASS_CLASS2 |
345 FIFOLD_TYPE_LAST2 | FIFOLD_TYPE_ICV);
346 append_dec_shr_done(desc);
348 ctx->sh_desc_dec_dma = dma_map_single(jrdev, desc,
351 if (dma_mapping_error(jrdev, ctx->sh_desc_dec_dma)) {
352 dev_err(jrdev, "unable to map shared descriptor\n");
356 print_hex_dump(KERN_ERR, "aead dec shdesc@"xstr(__LINE__)": ",
357 DUMP_PREFIX_ADDRESS, 16, 4, desc,
358 desc_bytes(desc), 1);
362 * Job Descriptor and Shared Descriptors
363 * must all fit into the 64-word Descriptor h/w Buffer
365 if (DESC_AEAD_GIVENC_LEN + DESC_JOB_IO_LEN +
366 ctx->split_key_pad_len + ctx->enckeylen <=
368 keys_fit_inline = true;
370 /* aead_givencrypt shared descriptor */
371 desc = ctx->sh_desc_givenc;
373 init_sh_desc_key_aead(desc, ctx, keys_fit_inline);
376 geniv = NFIFOENTRY_STYPE_PAD | NFIFOENTRY_DEST_DECO |
377 NFIFOENTRY_DTYPE_MSG | NFIFOENTRY_LC1 |
378 NFIFOENTRY_PTYPE_RND | (tfm->ivsize << NFIFOENTRY_DLEN_SHIFT);
379 append_load_imm_u32(desc, geniv, LDST_CLASS_IND_CCB |
380 LDST_SRCDST_WORD_INFO_FIFO | LDST_IMM);
381 append_cmd(desc, CMD_LOAD | DISABLE_AUTO_INFO_FIFO);
382 append_move(desc, MOVE_SRC_INFIFO |
383 MOVE_DEST_CLASS1CTX | (tfm->ivsize << MOVE_LEN_SHIFT));
384 append_cmd(desc, CMD_LOAD | ENABLE_AUTO_INFO_FIFO);
386 /* Copy IV to class 1 context */
387 append_move(desc, MOVE_SRC_CLASS1CTX |
388 MOVE_DEST_OUTFIFO | (tfm->ivsize << MOVE_LEN_SHIFT));
390 /* Return to encryption */
391 append_operation(desc, ctx->class2_alg_type |
392 OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT);
394 /* ivsize + cryptlen = seqoutlen - authsize */
395 append_math_sub_imm_u32(desc, REG3, SEQOUTLEN, IMM, ctx->authsize);
397 /* assoclen = seqinlen - (ivsize + cryptlen) */
398 append_math_sub(desc, VARSEQINLEN, SEQINLEN, REG3, CAAM_CMD_SZ);
400 /* read assoc before reading payload */
401 append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_MSG |
404 /* Copy iv from class 1 ctx to class 2 fifo*/
405 moveiv = NFIFOENTRY_STYPE_OFIFO | NFIFOENTRY_DEST_CLASS2 |
406 NFIFOENTRY_DTYPE_MSG | (tfm->ivsize << NFIFOENTRY_DLEN_SHIFT);
407 append_load_imm_u32(desc, moveiv, LDST_CLASS_IND_CCB |
408 LDST_SRCDST_WORD_INFO_FIFO | LDST_IMM);
409 append_load_imm_u32(desc, tfm->ivsize, LDST_CLASS_2_CCB |
410 LDST_SRCDST_WORD_DATASZ_REG | LDST_IMM);
412 /* Class 1 operation */
413 append_operation(desc, ctx->class1_alg_type |
414 OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT);
416 /* Will write ivsize + cryptlen */
417 append_math_add(desc, VARSEQOUTLEN, SEQINLEN, REG0, CAAM_CMD_SZ);
419 /* Not need to reload iv */
420 append_seq_fifo_load(desc, tfm->ivsize,
423 /* Will read cryptlen */
424 append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ);
425 aead_append_src_dst(desc, FIFOLD_TYPE_MSG1OUT2);
428 append_seq_store(desc, ctx->authsize, LDST_CLASS_2_CCB |
429 LDST_SRCDST_BYTE_CONTEXT);
431 ctx->sh_desc_givenc_dma = dma_map_single(jrdev, desc,
434 if (dma_mapping_error(jrdev, ctx->sh_desc_givenc_dma)) {
435 dev_err(jrdev, "unable to map shared descriptor\n");
439 print_hex_dump(KERN_ERR, "aead givenc shdesc@"xstr(__LINE__)": ",
440 DUMP_PREFIX_ADDRESS, 16, 4, desc,
441 desc_bytes(desc), 1);
447 static int aead_setauthsize(struct crypto_aead *authenc,
448 unsigned int authsize)
450 struct caam_ctx *ctx = crypto_aead_ctx(authenc);
452 ctx->authsize = authsize;
453 aead_set_sh_desc(authenc);
458 static u32 gen_split_aead_key(struct caam_ctx *ctx, const u8 *key_in,
461 return gen_split_key(ctx->jrdev, ctx->key, ctx->split_key_len,
462 ctx->split_key_pad_len, key_in, authkeylen,
466 static int aead_setkey(struct crypto_aead *aead,
467 const u8 *key, unsigned int keylen)
469 /* Sizes for MDHA pads (*not* keys): MD5, SHA1, 224, 256, 384, 512 */
470 static const u8 mdpadlen[] = { 16, 20, 32, 32, 64, 64 };
471 struct caam_ctx *ctx = crypto_aead_ctx(aead);
472 struct device *jrdev = ctx->jrdev;
473 struct rtattr *rta = (void *)key;
474 struct crypto_authenc_key_param *param;
475 unsigned int authkeylen;
476 unsigned int enckeylen;
479 param = RTA_DATA(rta);
480 enckeylen = be32_to_cpu(param->enckeylen);
482 key += RTA_ALIGN(rta->rta_len);
483 keylen -= RTA_ALIGN(rta->rta_len);
485 if (keylen < enckeylen)
488 authkeylen = keylen - enckeylen;
490 if (keylen > CAAM_MAX_KEY_SIZE)
493 /* Pick class 2 key length from algorithm submask */
494 ctx->split_key_len = mdpadlen[(ctx->alg_op & OP_ALG_ALGSEL_SUBMASK) >>
495 OP_ALG_ALGSEL_SHIFT] * 2;
496 ctx->split_key_pad_len = ALIGN(ctx->split_key_len, 16);
499 printk(KERN_ERR "keylen %d enckeylen %d authkeylen %d\n",
500 keylen, enckeylen, authkeylen);
501 printk(KERN_ERR "split_key_len %d split_key_pad_len %d\n",
502 ctx->split_key_len, ctx->split_key_pad_len);
503 print_hex_dump(KERN_ERR, "key in @"xstr(__LINE__)": ",
504 DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1);
507 ret = gen_split_aead_key(ctx, key, authkeylen);
512 /* postpend encryption key to auth split key */
513 memcpy(ctx->key + ctx->split_key_pad_len, key + authkeylen, enckeylen);
515 ctx->key_dma = dma_map_single(jrdev, ctx->key, ctx->split_key_pad_len +
516 enckeylen, DMA_TO_DEVICE);
517 if (dma_mapping_error(jrdev, ctx->key_dma)) {
518 dev_err(jrdev, "unable to map key i/o memory\n");
522 print_hex_dump(KERN_ERR, "ctx.key@"xstr(__LINE__)": ",
523 DUMP_PREFIX_ADDRESS, 16, 4, ctx->key,
524 ctx->split_key_pad_len + enckeylen, 1);
527 ctx->enckeylen = enckeylen;
529 ret = aead_set_sh_desc(aead);
531 dma_unmap_single(jrdev, ctx->key_dma, ctx->split_key_pad_len +
532 enckeylen, DMA_TO_DEVICE);
537 crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN);
541 static int ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher,
542 const u8 *key, unsigned int keylen)
544 struct caam_ctx *ctx = crypto_ablkcipher_ctx(ablkcipher);
545 struct ablkcipher_tfm *tfm = &ablkcipher->base.crt_ablkcipher;
546 struct device *jrdev = ctx->jrdev;
548 u32 *key_jump_cmd, *jump_cmd;
552 print_hex_dump(KERN_ERR, "key in @"xstr(__LINE__)": ",
553 DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1);
556 memcpy(ctx->key, key, keylen);
557 ctx->key_dma = dma_map_single(jrdev, ctx->key, keylen,
559 if (dma_mapping_error(jrdev, ctx->key_dma)) {
560 dev_err(jrdev, "unable to map key i/o memory\n");
563 ctx->enckeylen = keylen;
565 /* ablkcipher_encrypt shared descriptor */
566 desc = ctx->sh_desc_enc;
567 init_sh_desc(desc, HDR_SHARE_SERIAL);
568 /* Skip if already shared */
569 key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL |
572 /* Load class1 key only */
573 append_key_as_imm(desc, (void *)ctx->key, ctx->enckeylen,
574 ctx->enckeylen, CLASS_1 |
577 set_jump_tgt_here(desc, key_jump_cmd);
579 /* Propagate errors from shared to job descriptor */
580 append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD);
583 append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_BYTE_CONTEXT |
584 LDST_CLASS_1_CCB | tfm->ivsize);
587 append_operation(desc, ctx->class1_alg_type |
588 OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT);
590 /* Perform operation */
591 ablkcipher_append_src_dst(desc);
593 ctx->sh_desc_enc_dma = dma_map_single(jrdev, desc,
596 if (dma_mapping_error(jrdev, ctx->sh_desc_enc_dma)) {
597 dev_err(jrdev, "unable to map shared descriptor\n");
601 print_hex_dump(KERN_ERR, "ablkcipher enc shdesc@"xstr(__LINE__)": ",
602 DUMP_PREFIX_ADDRESS, 16, 4, desc,
603 desc_bytes(desc), 1);
605 /* ablkcipher_decrypt shared descriptor */
606 desc = ctx->sh_desc_dec;
608 init_sh_desc(desc, HDR_SHARE_SERIAL);
609 /* Skip if already shared */
610 key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL |
613 /* Load class1 key only */
614 append_key_as_imm(desc, (void *)ctx->key, ctx->enckeylen,
615 ctx->enckeylen, CLASS_1 |
618 /* For aead, only propagate error immediately if shared */
619 jump_cmd = append_jump(desc, JUMP_TEST_ALL);
620 set_jump_tgt_here(desc, key_jump_cmd);
621 append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD);
622 set_jump_tgt_here(desc, jump_cmd);
625 append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_BYTE_CONTEXT |
626 LDST_CLASS_1_CCB | tfm->ivsize);
628 /* Choose operation */
629 append_dec_op1(desc, ctx->class1_alg_type);
631 /* Perform operation */
632 ablkcipher_append_src_dst(desc);
634 /* Wait for key to load before allowing propagating error */
635 append_dec_shr_done(desc);
637 ctx->sh_desc_dec_dma = dma_map_single(jrdev, desc,
640 if (dma_mapping_error(jrdev, ctx->sh_desc_enc_dma)) {
641 dev_err(jrdev, "unable to map shared descriptor\n");
646 print_hex_dump(KERN_ERR, "ablkcipher dec shdesc@"xstr(__LINE__)": ",
647 DUMP_PREFIX_ADDRESS, 16, 4, desc,
648 desc_bytes(desc), 1);
655 * aead_edesc - s/w-extended aead descriptor
656 * @assoc_nents: number of segments in associated data (SPI+Seq) scatterlist
657 * @assoc_chained: if source is chained
658 * @src_nents: number of segments in input scatterlist
659 * @src_chained: if source is chained
660 * @dst_nents: number of segments in output scatterlist
661 * @dst_chained: if destination is chained
662 * @iv_dma: dma address of iv for checking continuity and link table
663 * @desc: h/w descriptor (variable length; must not exceed MAX_CAAM_DESCSIZE)
664 * @sec4_sg_bytes: length of dma mapped sec4_sg space
665 * @sec4_sg_dma: bus physical mapped address of h/w link table
666 * @hw_desc: the h/w job descriptor followed by any referenced link tables
677 dma_addr_t sec4_sg_dma;
678 struct sec4_sg_entry *sec4_sg;
683 * ablkcipher_edesc - s/w-extended ablkcipher descriptor
684 * @src_nents: number of segments in input scatterlist
685 * @src_chained: if source is chained
686 * @dst_nents: number of segments in output scatterlist
687 * @dst_chained: if destination is chained
688 * @iv_dma: dma address of iv for checking continuity and link table
689 * @desc: h/w descriptor (variable length; must not exceed MAX_CAAM_DESCSIZE)
690 * @sec4_sg_bytes: length of dma mapped sec4_sg space
691 * @sec4_sg_dma: bus physical mapped address of h/w link table
692 * @hw_desc: the h/w job descriptor followed by any referenced link tables
694 struct ablkcipher_edesc {
701 dma_addr_t sec4_sg_dma;
702 struct sec4_sg_entry *sec4_sg;
706 static void caam_unmap(struct device *dev, struct scatterlist *src,
707 struct scatterlist *dst, int src_nents,
708 bool src_chained, int dst_nents, bool dst_chained,
709 dma_addr_t iv_dma, int ivsize, dma_addr_t sec4_sg_dma,
713 dma_unmap_sg_chained(dev, src, src_nents ? : 1, DMA_TO_DEVICE,
715 dma_unmap_sg_chained(dev, dst, dst_nents ? : 1, DMA_FROM_DEVICE,
718 dma_unmap_sg_chained(dev, src, src_nents ? : 1,
719 DMA_BIDIRECTIONAL, src_chained);
723 dma_unmap_single(dev, iv_dma, ivsize, DMA_TO_DEVICE);
725 dma_unmap_single(dev, sec4_sg_dma, sec4_sg_bytes,
729 static void aead_unmap(struct device *dev,
730 struct aead_edesc *edesc,
731 struct aead_request *req)
733 struct crypto_aead *aead = crypto_aead_reqtfm(req);
734 int ivsize = crypto_aead_ivsize(aead);
736 dma_unmap_sg_chained(dev, req->assoc, edesc->assoc_nents,
737 DMA_TO_DEVICE, edesc->assoc_chained);
739 caam_unmap(dev, req->src, req->dst,
740 edesc->src_nents, edesc->src_chained, edesc->dst_nents,
741 edesc->dst_chained, edesc->iv_dma, ivsize,
742 edesc->sec4_sg_dma, edesc->sec4_sg_bytes);
745 static void ablkcipher_unmap(struct device *dev,
746 struct ablkcipher_edesc *edesc,
747 struct ablkcipher_request *req)
749 struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
750 int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
752 caam_unmap(dev, req->src, req->dst,
753 edesc->src_nents, edesc->src_chained, edesc->dst_nents,
754 edesc->dst_chained, edesc->iv_dma, ivsize,
755 edesc->sec4_sg_dma, edesc->sec4_sg_bytes);
758 static void aead_encrypt_done(struct device *jrdev, u32 *desc, u32 err,
761 struct aead_request *req = context;
762 struct aead_edesc *edesc;
764 struct crypto_aead *aead = crypto_aead_reqtfm(req);
765 struct caam_ctx *ctx = crypto_aead_ctx(aead);
766 int ivsize = crypto_aead_ivsize(aead);
768 dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
771 edesc = (struct aead_edesc *)((char *)desc -
772 offsetof(struct aead_edesc, hw_desc));
775 char tmp[CAAM_ERROR_STR_MAX];
777 dev_err(jrdev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
780 aead_unmap(jrdev, edesc, req);
783 print_hex_dump(KERN_ERR, "assoc @"xstr(__LINE__)": ",
784 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->assoc),
786 print_hex_dump(KERN_ERR, "dstiv @"xstr(__LINE__)": ",
787 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->src) - ivsize,
788 edesc->src_nents ? 100 : ivsize, 1);
789 print_hex_dump(KERN_ERR, "dst @"xstr(__LINE__)": ",
790 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->src),
791 edesc->src_nents ? 100 : req->cryptlen +
792 ctx->authsize + 4, 1);
797 aead_request_complete(req, err);
800 static void aead_decrypt_done(struct device *jrdev, u32 *desc, u32 err,
803 struct aead_request *req = context;
804 struct aead_edesc *edesc;
806 struct crypto_aead *aead = crypto_aead_reqtfm(req);
807 struct caam_ctx *ctx = crypto_aead_ctx(aead);
808 int ivsize = crypto_aead_ivsize(aead);
810 dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
813 edesc = (struct aead_edesc *)((char *)desc -
814 offsetof(struct aead_edesc, hw_desc));
817 print_hex_dump(KERN_ERR, "dstiv @"xstr(__LINE__)": ",
818 DUMP_PREFIX_ADDRESS, 16, 4, req->iv,
820 print_hex_dump(KERN_ERR, "dst @"xstr(__LINE__)": ",
821 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->dst),
826 char tmp[CAAM_ERROR_STR_MAX];
828 dev_err(jrdev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
831 aead_unmap(jrdev, edesc, req);
834 * verify hw auth check passed else return -EBADMSG
836 if ((err & JRSTA_CCBERR_ERRID_MASK) == JRSTA_CCBERR_ERRID_ICVCHK)
840 print_hex_dump(KERN_ERR, "iphdrout@"xstr(__LINE__)": ",
841 DUMP_PREFIX_ADDRESS, 16, 4,
842 ((char *)sg_virt(req->assoc) - sizeof(struct iphdr)),
843 sizeof(struct iphdr) + req->assoclen +
844 ((req->cryptlen > 1500) ? 1500 : req->cryptlen) +
845 ctx->authsize + 36, 1);
846 if (!err && edesc->sec4_sg_bytes) {
847 struct scatterlist *sg = sg_last(req->src, edesc->src_nents);
848 print_hex_dump(KERN_ERR, "sglastout@"xstr(__LINE__)": ",
849 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(sg),
850 sg->length + ctx->authsize + 16, 1);
856 aead_request_complete(req, err);
859 static void ablkcipher_encrypt_done(struct device *jrdev, u32 *desc, u32 err,
862 struct ablkcipher_request *req = context;
863 struct ablkcipher_edesc *edesc;
865 struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
866 int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
868 dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
871 edesc = (struct ablkcipher_edesc *)((char *)desc -
872 offsetof(struct ablkcipher_edesc, hw_desc));
875 char tmp[CAAM_ERROR_STR_MAX];
877 dev_err(jrdev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
881 print_hex_dump(KERN_ERR, "dstiv @"xstr(__LINE__)": ",
882 DUMP_PREFIX_ADDRESS, 16, 4, req->info,
883 edesc->src_nents > 1 ? 100 : ivsize, 1);
884 print_hex_dump(KERN_ERR, "dst @"xstr(__LINE__)": ",
885 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->src),
886 edesc->dst_nents > 1 ? 100 : req->nbytes, 1);
889 ablkcipher_unmap(jrdev, edesc, req);
892 ablkcipher_request_complete(req, err);
895 static void ablkcipher_decrypt_done(struct device *jrdev, u32 *desc, u32 err,
898 struct ablkcipher_request *req = context;
899 struct ablkcipher_edesc *edesc;
901 struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
902 int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
904 dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
907 edesc = (struct ablkcipher_edesc *)((char *)desc -
908 offsetof(struct ablkcipher_edesc, hw_desc));
910 char tmp[CAAM_ERROR_STR_MAX];
912 dev_err(jrdev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
916 print_hex_dump(KERN_ERR, "dstiv @"xstr(__LINE__)": ",
917 DUMP_PREFIX_ADDRESS, 16, 4, req->info,
919 print_hex_dump(KERN_ERR, "dst @"xstr(__LINE__)": ",
920 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->src),
921 edesc->dst_nents > 1 ? 100 : req->nbytes, 1);
924 ablkcipher_unmap(jrdev, edesc, req);
927 ablkcipher_request_complete(req, err);
931 * Fill in aead job descriptor
933 static void init_aead_job(u32 *sh_desc, dma_addr_t ptr,
934 struct aead_edesc *edesc,
935 struct aead_request *req,
936 bool all_contig, bool encrypt)
938 struct crypto_aead *aead = crypto_aead_reqtfm(req);
939 struct caam_ctx *ctx = crypto_aead_ctx(aead);
940 int ivsize = crypto_aead_ivsize(aead);
941 int authsize = ctx->authsize;
942 u32 *desc = edesc->hw_desc;
943 u32 out_options = 0, in_options;
944 dma_addr_t dst_dma, src_dma;
945 int len, sec4_sg_index = 0;
948 debug("assoclen %d cryptlen %d authsize %d\n",
949 req->assoclen, req->cryptlen, authsize);
950 print_hex_dump(KERN_ERR, "assoc @"xstr(__LINE__)": ",
951 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->assoc),
953 print_hex_dump(KERN_ERR, "presciv@"xstr(__LINE__)": ",
954 DUMP_PREFIX_ADDRESS, 16, 4, req->iv,
955 edesc->src_nents ? 100 : ivsize, 1);
956 print_hex_dump(KERN_ERR, "src @"xstr(__LINE__)": ",
957 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->src),
958 edesc->src_nents ? 100 : req->cryptlen, 1);
959 print_hex_dump(KERN_ERR, "shrdesc@"xstr(__LINE__)": ",
960 DUMP_PREFIX_ADDRESS, 16, 4, sh_desc,
961 desc_bytes(sh_desc), 1);
964 len = desc_len(sh_desc);
965 init_job_desc_shared(desc, ptr, len, HDR_SHARE_DEFER | HDR_REVERSE);
968 src_dma = sg_dma_address(req->assoc);
971 src_dma = edesc->sec4_sg_dma;
972 sec4_sg_index += (edesc->assoc_nents ? : 1) + 1 +
973 (edesc->src_nents ? : 1);
974 in_options = LDST_SGF;
977 append_seq_in_ptr(desc, src_dma, req->assoclen + ivsize +
978 req->cryptlen - authsize, in_options);
980 append_seq_in_ptr(desc, src_dma, req->assoclen + ivsize +
981 req->cryptlen, in_options);
983 if (likely(req->src == req->dst)) {
985 dst_dma = sg_dma_address(req->src);
987 dst_dma = src_dma + sizeof(struct sec4_sg_entry) *
988 ((edesc->assoc_nents ? : 1) + 1);
989 out_options = LDST_SGF;
992 if (!edesc->dst_nents) {
993 dst_dma = sg_dma_address(req->dst);
995 dst_dma = edesc->sec4_sg_dma +
997 sizeof(struct sec4_sg_entry);
998 out_options = LDST_SGF;
1002 append_seq_out_ptr(desc, dst_dma, req->cryptlen, out_options);
1004 append_seq_out_ptr(desc, dst_dma, req->cryptlen - authsize,
1009 * Fill in aead givencrypt job descriptor
1011 static void init_aead_giv_job(u32 *sh_desc, dma_addr_t ptr,
1012 struct aead_edesc *edesc,
1013 struct aead_request *req,
1016 struct crypto_aead *aead = crypto_aead_reqtfm(req);
1017 struct caam_ctx *ctx = crypto_aead_ctx(aead);
1018 int ivsize = crypto_aead_ivsize(aead);
1019 int authsize = ctx->authsize;
1020 u32 *desc = edesc->hw_desc;
1021 u32 out_options = 0, in_options;
1022 dma_addr_t dst_dma, src_dma;
1023 int len, sec4_sg_index = 0;
1026 debug("assoclen %d cryptlen %d authsize %d\n",
1027 req->assoclen, req->cryptlen, authsize);
1028 print_hex_dump(KERN_ERR, "assoc @"xstr(__LINE__)": ",
1029 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->assoc),
1031 print_hex_dump(KERN_ERR, "presciv@"xstr(__LINE__)": ",
1032 DUMP_PREFIX_ADDRESS, 16, 4, req->iv, ivsize, 1);
1033 print_hex_dump(KERN_ERR, "src @"xstr(__LINE__)": ",
1034 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->src),
1035 edesc->src_nents > 1 ? 100 : req->cryptlen, 1);
1036 print_hex_dump(KERN_ERR, "shrdesc@"xstr(__LINE__)": ",
1037 DUMP_PREFIX_ADDRESS, 16, 4, sh_desc,
1038 desc_bytes(sh_desc), 1);
1041 len = desc_len(sh_desc);
1042 init_job_desc_shared(desc, ptr, len, HDR_SHARE_DEFER | HDR_REVERSE);
1044 if (contig & GIV_SRC_CONTIG) {
1045 src_dma = sg_dma_address(req->assoc);
1048 src_dma = edesc->sec4_sg_dma;
1049 sec4_sg_index += edesc->assoc_nents + 1 + edesc->src_nents;
1050 in_options = LDST_SGF;
1052 append_seq_in_ptr(desc, src_dma, req->assoclen + ivsize +
1053 req->cryptlen - authsize, in_options);
1055 if (contig & GIV_DST_CONTIG) {
1056 dst_dma = edesc->iv_dma;
1058 if (likely(req->src == req->dst)) {
1059 dst_dma = src_dma + sizeof(struct sec4_sg_entry) *
1061 out_options = LDST_SGF;
1063 dst_dma = edesc->sec4_sg_dma +
1065 sizeof(struct sec4_sg_entry);
1066 out_options = LDST_SGF;
1070 append_seq_out_ptr(desc, dst_dma, ivsize + req->cryptlen, out_options);
1074 * Fill in ablkcipher job descriptor
1076 static void init_ablkcipher_job(u32 *sh_desc, dma_addr_t ptr,
1077 struct ablkcipher_edesc *edesc,
1078 struct ablkcipher_request *req,
1081 struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
1082 int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
1083 u32 *desc = edesc->hw_desc;
1084 u32 out_options = 0, in_options;
1085 dma_addr_t dst_dma, src_dma;
1086 int len, sec4_sg_index = 0;
1089 print_hex_dump(KERN_ERR, "presciv@"xstr(__LINE__)": ",
1090 DUMP_PREFIX_ADDRESS, 16, 4, req->info,
1092 print_hex_dump(KERN_ERR, "src @"xstr(__LINE__)": ",
1093 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->src),
1094 edesc->src_nents ? 100 : req->nbytes, 1);
1097 len = desc_len(sh_desc);
1098 init_job_desc_shared(desc, ptr, len, HDR_SHARE_DEFER | HDR_REVERSE);
1101 src_dma = edesc->iv_dma;
1104 src_dma = edesc->sec4_sg_dma;
1105 sec4_sg_index += (iv_contig ? 0 : 1) + edesc->src_nents;
1106 in_options = LDST_SGF;
1108 append_seq_in_ptr(desc, src_dma, req->nbytes + ivsize, in_options);
1110 if (likely(req->src == req->dst)) {
1111 if (!edesc->src_nents && iv_contig) {
1112 dst_dma = sg_dma_address(req->src);
1114 dst_dma = edesc->sec4_sg_dma +
1115 sizeof(struct sec4_sg_entry);
1116 out_options = LDST_SGF;
1119 if (!edesc->dst_nents) {
1120 dst_dma = sg_dma_address(req->dst);
1122 dst_dma = edesc->sec4_sg_dma +
1123 sec4_sg_index * sizeof(struct sec4_sg_entry);
1124 out_options = LDST_SGF;
1127 append_seq_out_ptr(desc, dst_dma, req->nbytes, out_options);
1131 * allocate and map the aead extended descriptor
1133 static struct aead_edesc *aead_edesc_alloc(struct aead_request *req,
1134 int desc_bytes, bool *all_contig_ptr)
1136 struct crypto_aead *aead = crypto_aead_reqtfm(req);
1137 struct caam_ctx *ctx = crypto_aead_ctx(aead);
1138 struct device *jrdev = ctx->jrdev;
1139 gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
1140 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
1141 int assoc_nents, src_nents, dst_nents = 0;
1142 struct aead_edesc *edesc;
1143 dma_addr_t iv_dma = 0;
1145 bool all_contig = true;
1146 bool assoc_chained = false, src_chained = false, dst_chained = false;
1147 int ivsize = crypto_aead_ivsize(aead);
1148 int sec4_sg_index, sec4_sg_len = 0, sec4_sg_bytes;
1150 assoc_nents = sg_count(req->assoc, req->assoclen, &assoc_chained);
1151 src_nents = sg_count(req->src, req->cryptlen, &src_chained);
1153 if (unlikely(req->dst != req->src))
1154 dst_nents = sg_count(req->dst, req->cryptlen, &dst_chained);
1156 sgc = dma_map_sg_chained(jrdev, req->assoc, assoc_nents ? : 1,
1157 DMA_TO_DEVICE, assoc_chained);
1158 if (likely(req->src == req->dst)) {
1159 sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
1160 DMA_BIDIRECTIONAL, src_chained);
1162 sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
1163 DMA_TO_DEVICE, src_chained);
1164 sgc = dma_map_sg_chained(jrdev, req->dst, dst_nents ? : 1,
1165 DMA_FROM_DEVICE, dst_chained);
1168 /* Check if data are contiguous */
1169 iv_dma = dma_map_single(jrdev, req->iv, ivsize, DMA_TO_DEVICE);
1170 if (assoc_nents || sg_dma_address(req->assoc) + req->assoclen !=
1171 iv_dma || src_nents || iv_dma + ivsize !=
1172 sg_dma_address(req->src)) {
1174 assoc_nents = assoc_nents ? : 1;
1175 src_nents = src_nents ? : 1;
1176 sec4_sg_len = assoc_nents + 1 + src_nents;
1178 sec4_sg_len += dst_nents;
1180 sec4_sg_bytes = sec4_sg_len * sizeof(struct sec4_sg_entry);
1182 /* allocate space for base edesc and hw desc commands, link tables */
1183 edesc = kmalloc(sizeof(struct aead_edesc) + desc_bytes +
1184 sec4_sg_bytes, GFP_DMA | flags);
1186 dev_err(jrdev, "could not allocate extended descriptor\n");
1187 return ERR_PTR(-ENOMEM);
1190 edesc->assoc_nents = assoc_nents;
1191 edesc->assoc_chained = assoc_chained;
1192 edesc->src_nents = src_nents;
1193 edesc->src_chained = src_chained;
1194 edesc->dst_nents = dst_nents;
1195 edesc->dst_chained = dst_chained;
1196 edesc->iv_dma = iv_dma;
1197 edesc->sec4_sg_bytes = sec4_sg_bytes;
1198 edesc->sec4_sg = (void *)edesc + sizeof(struct aead_edesc) +
1200 edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
1201 sec4_sg_bytes, DMA_TO_DEVICE);
1202 *all_contig_ptr = all_contig;
1206 sg_to_sec4_sg(req->assoc,
1207 (assoc_nents ? : 1),
1210 sec4_sg_index += assoc_nents ? : 1;
1211 dma_to_sec4_sg_one(edesc->sec4_sg + sec4_sg_index,
1214 sg_to_sec4_sg_last(req->src,
1218 sec4_sg_index += src_nents ? : 1;
1221 sg_to_sec4_sg_last(req->dst, dst_nents,
1222 edesc->sec4_sg + sec4_sg_index, 0);
1228 static int aead_encrypt(struct aead_request *req)
1230 struct aead_edesc *edesc;
1231 struct crypto_aead *aead = crypto_aead_reqtfm(req);
1232 struct caam_ctx *ctx = crypto_aead_ctx(aead);
1233 struct device *jrdev = ctx->jrdev;
1238 req->cryptlen += ctx->authsize;
1240 /* allocate extended descriptor */
1241 edesc = aead_edesc_alloc(req, DESC_JOB_IO_LEN *
1242 CAAM_CMD_SZ, &all_contig);
1244 return PTR_ERR(edesc);
1246 /* Create and submit job descriptor */
1247 init_aead_job(ctx->sh_desc_enc, ctx->sh_desc_enc_dma, edesc, req,
1250 print_hex_dump(KERN_ERR, "aead jobdesc@"xstr(__LINE__)": ",
1251 DUMP_PREFIX_ADDRESS, 16, 4, edesc->hw_desc,
1252 desc_bytes(edesc->hw_desc), 1);
1255 desc = edesc->hw_desc;
1256 ret = caam_jr_enqueue(jrdev, desc, aead_encrypt_done, req);
1260 aead_unmap(jrdev, edesc, req);
1267 static int aead_decrypt(struct aead_request *req)
1269 struct aead_edesc *edesc;
1270 struct crypto_aead *aead = crypto_aead_reqtfm(req);
1271 struct caam_ctx *ctx = crypto_aead_ctx(aead);
1272 struct device *jrdev = ctx->jrdev;
1277 /* allocate extended descriptor */
1278 edesc = aead_edesc_alloc(req, DESC_JOB_IO_LEN *
1279 CAAM_CMD_SZ, &all_contig);
1281 return PTR_ERR(edesc);
1284 print_hex_dump(KERN_ERR, "dec src@"xstr(__LINE__)": ",
1285 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->src),
1289 /* Create and submit job descriptor*/
1290 init_aead_job(ctx->sh_desc_dec,
1291 ctx->sh_desc_dec_dma, edesc, req, all_contig, false);
1293 print_hex_dump(KERN_ERR, "aead jobdesc@"xstr(__LINE__)": ",
1294 DUMP_PREFIX_ADDRESS, 16, 4, edesc->hw_desc,
1295 desc_bytes(edesc->hw_desc), 1);
1298 desc = edesc->hw_desc;
1299 ret = caam_jr_enqueue(jrdev, desc, aead_decrypt_done, req);
1303 aead_unmap(jrdev, edesc, req);
1311 * allocate and map the aead extended descriptor for aead givencrypt
1313 static struct aead_edesc *aead_giv_edesc_alloc(struct aead_givcrypt_request
1314 *greq, int desc_bytes,
1317 struct aead_request *req = &greq->areq;
1318 struct crypto_aead *aead = crypto_aead_reqtfm(req);
1319 struct caam_ctx *ctx = crypto_aead_ctx(aead);
1320 struct device *jrdev = ctx->jrdev;
1321 gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
1322 CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
1323 int assoc_nents, src_nents, dst_nents = 0;
1324 struct aead_edesc *edesc;
1325 dma_addr_t iv_dma = 0;
1327 u32 contig = GIV_SRC_CONTIG | GIV_DST_CONTIG;
1328 int ivsize = crypto_aead_ivsize(aead);
1329 bool assoc_chained = false, src_chained = false, dst_chained = false;
1330 int sec4_sg_index, sec4_sg_len = 0, sec4_sg_bytes;
1332 assoc_nents = sg_count(req->assoc, req->assoclen, &assoc_chained);
1333 src_nents = sg_count(req->src, req->cryptlen, &src_chained);
1335 if (unlikely(req->dst != req->src))
1336 dst_nents = sg_count(req->dst, req->cryptlen, &dst_chained);
1338 sgc = dma_map_sg_chained(jrdev, req->assoc, assoc_nents ? : 1,
1339 DMA_TO_DEVICE, assoc_chained);
1340 if (likely(req->src == req->dst)) {
1341 sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
1342 DMA_BIDIRECTIONAL, src_chained);
1344 sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
1345 DMA_TO_DEVICE, src_chained);
1346 sgc = dma_map_sg_chained(jrdev, req->dst, dst_nents ? : 1,
1347 DMA_FROM_DEVICE, dst_chained);
1350 /* Check if data are contiguous */
1351 iv_dma = dma_map_single(jrdev, greq->giv, ivsize, DMA_TO_DEVICE);
1352 if (assoc_nents || sg_dma_address(req->assoc) + req->assoclen !=
1353 iv_dma || src_nents || iv_dma + ivsize != sg_dma_address(req->src))
1354 contig &= ~GIV_SRC_CONTIG;
1355 if (dst_nents || iv_dma + ivsize != sg_dma_address(req->dst))
1356 contig &= ~GIV_DST_CONTIG;
1357 if (unlikely(req->src != req->dst)) {
1358 dst_nents = dst_nents ? : 1;
1361 if (!(contig & GIV_SRC_CONTIG)) {
1362 assoc_nents = assoc_nents ? : 1;
1363 src_nents = src_nents ? : 1;
1364 sec4_sg_len += assoc_nents + 1 + src_nents;
1365 if (likely(req->src == req->dst))
1366 contig &= ~GIV_DST_CONTIG;
1368 sec4_sg_len += dst_nents;
1370 sec4_sg_bytes = sec4_sg_len * sizeof(struct sec4_sg_entry);
1372 /* allocate space for base edesc and hw desc commands, link tables */
1373 edesc = kmalloc(sizeof(struct aead_edesc) + desc_bytes +
1374 sec4_sg_bytes, GFP_DMA | flags);
1376 dev_err(jrdev, "could not allocate extended descriptor\n");
1377 return ERR_PTR(-ENOMEM);
1380 edesc->assoc_nents = assoc_nents;
1381 edesc->assoc_chained = assoc_chained;
1382 edesc->src_nents = src_nents;
1383 edesc->src_chained = src_chained;
1384 edesc->dst_nents = dst_nents;
1385 edesc->dst_chained = dst_chained;
1386 edesc->iv_dma = iv_dma;
1387 edesc->sec4_sg_bytes = sec4_sg_bytes;
1388 edesc->sec4_sg = (void *)edesc + sizeof(struct aead_edesc) +
1390 edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
1391 sec4_sg_bytes, DMA_TO_DEVICE);
1392 *contig_ptr = contig;
1395 if (!(contig & GIV_SRC_CONTIG)) {
1396 sg_to_sec4_sg(req->assoc, assoc_nents,
1399 sec4_sg_index += assoc_nents;
1400 dma_to_sec4_sg_one(edesc->sec4_sg + sec4_sg_index,
1403 sg_to_sec4_sg_last(req->src, src_nents,
1406 sec4_sg_index += src_nents;
1408 if (unlikely(req->src != req->dst && !(contig & GIV_DST_CONTIG))) {
1409 dma_to_sec4_sg_one(edesc->sec4_sg + sec4_sg_index,
1412 sg_to_sec4_sg_last(req->dst, dst_nents,
1413 edesc->sec4_sg + sec4_sg_index, 0);
1419 static int aead_givencrypt(struct aead_givcrypt_request *areq)
1421 struct aead_request *req = &areq->areq;
1422 struct aead_edesc *edesc;
1423 struct crypto_aead *aead = crypto_aead_reqtfm(req);
1424 struct caam_ctx *ctx = crypto_aead_ctx(aead);
1425 struct device *jrdev = ctx->jrdev;
1430 req->cryptlen += ctx->authsize;
1432 /* allocate extended descriptor */
1433 edesc = aead_giv_edesc_alloc(areq, DESC_JOB_IO_LEN *
1434 CAAM_CMD_SZ, &contig);
1437 return PTR_ERR(edesc);
1440 print_hex_dump(KERN_ERR, "giv src@"xstr(__LINE__)": ",
1441 DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(req->src),
1445 /* Create and submit job descriptor*/
1446 init_aead_giv_job(ctx->sh_desc_givenc,
1447 ctx->sh_desc_givenc_dma, edesc, req, contig);
1449 print_hex_dump(KERN_ERR, "aead jobdesc@"xstr(__LINE__)": ",
1450 DUMP_PREFIX_ADDRESS, 16, 4, edesc->hw_desc,
1451 desc_bytes(edesc->hw_desc), 1);
1454 desc = edesc->hw_desc;
1455 ret = caam_jr_enqueue(jrdev, desc, aead_encrypt_done, req);
1459 aead_unmap(jrdev, edesc, req);
1467 * allocate and map the ablkcipher extended descriptor for ablkcipher
1469 static struct ablkcipher_edesc *ablkcipher_edesc_alloc(struct ablkcipher_request
1470 *req, int desc_bytes,
1471 bool *iv_contig_out)
1473 struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
1474 struct caam_ctx *ctx = crypto_ablkcipher_ctx(ablkcipher);
1475 struct device *jrdev = ctx->jrdev;
1476 gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
1477 CRYPTO_TFM_REQ_MAY_SLEEP)) ?
1478 GFP_KERNEL : GFP_ATOMIC;
1479 int src_nents, dst_nents = 0, sec4_sg_bytes;
1480 struct ablkcipher_edesc *edesc;
1481 dma_addr_t iv_dma = 0;
1482 bool iv_contig = false;
1484 int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
1485 bool src_chained = false, dst_chained = false;
1488 src_nents = sg_count(req->src, req->nbytes, &src_chained);
1490 if (req->dst != req->src)
1491 dst_nents = sg_count(req->dst, req->nbytes, &dst_chained);
1493 if (likely(req->src == req->dst)) {
1494 sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
1495 DMA_BIDIRECTIONAL, src_chained);
1497 sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
1498 DMA_TO_DEVICE, src_chained);
1499 sgc = dma_map_sg_chained(jrdev, req->dst, dst_nents ? : 1,
1500 DMA_FROM_DEVICE, dst_chained);
1504 * Check if iv can be contiguous with source and destination.
1505 * If so, include it. If not, create scatterlist.
1507 iv_dma = dma_map_single(jrdev, req->info, ivsize, DMA_TO_DEVICE);
1508 if (!src_nents && iv_dma + ivsize == sg_dma_address(req->src))
1511 src_nents = src_nents ? : 1;
1512 sec4_sg_bytes = ((iv_contig ? 0 : 1) + src_nents + dst_nents) *
1513 sizeof(struct sec4_sg_entry);
1515 /* allocate space for base edesc and hw desc commands, link tables */
1516 edesc = kmalloc(sizeof(struct ablkcipher_edesc) + desc_bytes +
1517 sec4_sg_bytes, GFP_DMA | flags);
1519 dev_err(jrdev, "could not allocate extended descriptor\n");
1520 return ERR_PTR(-ENOMEM);
1523 edesc->src_nents = src_nents;
1524 edesc->src_chained = src_chained;
1525 edesc->dst_nents = dst_nents;
1526 edesc->dst_chained = dst_chained;
1527 edesc->sec4_sg_bytes = sec4_sg_bytes;
1528 edesc->sec4_sg = (void *)edesc + sizeof(struct ablkcipher_edesc) +
1533 dma_to_sec4_sg_one(edesc->sec4_sg, iv_dma, ivsize, 0);
1534 sg_to_sec4_sg_last(req->src, src_nents,
1535 edesc->sec4_sg + 1, 0);
1536 sec4_sg_index += 1 + src_nents;
1540 sg_to_sec4_sg_last(req->dst, dst_nents,
1541 edesc->sec4_sg + sec4_sg_index, 0);
1544 edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
1545 sec4_sg_bytes, DMA_TO_DEVICE);
1546 edesc->iv_dma = iv_dma;
1549 print_hex_dump(KERN_ERR, "ablkcipher sec4_sg@"xstr(__LINE__)": ",
1550 DUMP_PREFIX_ADDRESS, 16, 4, edesc->sec4_sg,
1554 *iv_contig_out = iv_contig;
1558 static int ablkcipher_encrypt(struct ablkcipher_request *req)
1560 struct ablkcipher_edesc *edesc;
1561 struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
1562 struct caam_ctx *ctx = crypto_ablkcipher_ctx(ablkcipher);
1563 struct device *jrdev = ctx->jrdev;
1568 /* allocate extended descriptor */
1569 edesc = ablkcipher_edesc_alloc(req, DESC_JOB_IO_LEN *
1570 CAAM_CMD_SZ, &iv_contig);
1572 return PTR_ERR(edesc);
1574 /* Create and submit job descriptor*/
1575 init_ablkcipher_job(ctx->sh_desc_enc,
1576 ctx->sh_desc_enc_dma, edesc, req, iv_contig);
1578 print_hex_dump(KERN_ERR, "ablkcipher jobdesc@"xstr(__LINE__)": ",
1579 DUMP_PREFIX_ADDRESS, 16, 4, edesc->hw_desc,
1580 desc_bytes(edesc->hw_desc), 1);
1582 desc = edesc->hw_desc;
1583 ret = caam_jr_enqueue(jrdev, desc, ablkcipher_encrypt_done, req);
1588 ablkcipher_unmap(jrdev, edesc, req);
1595 static int ablkcipher_decrypt(struct ablkcipher_request *req)
1597 struct ablkcipher_edesc *edesc;
1598 struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
1599 struct caam_ctx *ctx = crypto_ablkcipher_ctx(ablkcipher);
1600 struct device *jrdev = ctx->jrdev;
1605 /* allocate extended descriptor */
1606 edesc = ablkcipher_edesc_alloc(req, DESC_JOB_IO_LEN *
1607 CAAM_CMD_SZ, &iv_contig);
1609 return PTR_ERR(edesc);
1611 /* Create and submit job descriptor*/
1612 init_ablkcipher_job(ctx->sh_desc_dec,
1613 ctx->sh_desc_dec_dma, edesc, req, iv_contig);
1614 desc = edesc->hw_desc;
1616 print_hex_dump(KERN_ERR, "ablkcipher jobdesc@"xstr(__LINE__)": ",
1617 DUMP_PREFIX_ADDRESS, 16, 4, edesc->hw_desc,
1618 desc_bytes(edesc->hw_desc), 1);
1621 ret = caam_jr_enqueue(jrdev, desc, ablkcipher_decrypt_done, req);
1625 ablkcipher_unmap(jrdev, edesc, req);
1632 #define template_aead template_u.aead
1633 #define template_ablkcipher template_u.ablkcipher
1634 struct caam_alg_template {
1635 char name[CRYPTO_MAX_ALG_NAME];
1636 char driver_name[CRYPTO_MAX_ALG_NAME];
1637 unsigned int blocksize;
1640 struct ablkcipher_alg ablkcipher;
1641 struct aead_alg aead;
1642 struct blkcipher_alg blkcipher;
1643 struct cipher_alg cipher;
1644 struct compress_alg compress;
1647 u32 class1_alg_type;
1648 u32 class2_alg_type;
1652 static struct caam_alg_template driver_algs[] = {
1653 /* single-pass ipsec_esp descriptor */
1655 .name = "authenc(hmac(md5),cbc(aes))",
1656 .driver_name = "authenc-hmac-md5-cbc-aes-caam",
1657 .blocksize = AES_BLOCK_SIZE,
1658 .type = CRYPTO_ALG_TYPE_AEAD,
1660 .setkey = aead_setkey,
1661 .setauthsize = aead_setauthsize,
1662 .encrypt = aead_encrypt,
1663 .decrypt = aead_decrypt,
1664 .givencrypt = aead_givencrypt,
1665 .geniv = "<built-in>",
1666 .ivsize = AES_BLOCK_SIZE,
1667 .maxauthsize = MD5_DIGEST_SIZE,
1669 .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC,
1670 .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP,
1671 .alg_op = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC,
1674 .name = "authenc(hmac(sha1),cbc(aes))",
1675 .driver_name = "authenc-hmac-sha1-cbc-aes-caam",
1676 .blocksize = AES_BLOCK_SIZE,
1677 .type = CRYPTO_ALG_TYPE_AEAD,
1679 .setkey = aead_setkey,
1680 .setauthsize = aead_setauthsize,
1681 .encrypt = aead_encrypt,
1682 .decrypt = aead_decrypt,
1683 .givencrypt = aead_givencrypt,
1684 .geniv = "<built-in>",
1685 .ivsize = AES_BLOCK_SIZE,
1686 .maxauthsize = SHA1_DIGEST_SIZE,
1688 .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC,
1689 .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP,
1690 .alg_op = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC,
1693 .name = "authenc(hmac(sha224),cbc(aes))",
1694 .driver_name = "authenc-hmac-sha224-cbc-aes-caam",
1695 .blocksize = AES_BLOCK_SIZE,
1696 .type = CRYPTO_ALG_TYPE_AEAD,
1698 .setkey = aead_setkey,
1699 .setauthsize = aead_setauthsize,
1700 .encrypt = aead_encrypt,
1701 .decrypt = aead_decrypt,
1702 .givencrypt = aead_givencrypt,
1703 .geniv = "<built-in>",
1704 .ivsize = AES_BLOCK_SIZE,
1705 .maxauthsize = SHA224_DIGEST_SIZE,
1707 .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC,
1708 .class2_alg_type = OP_ALG_ALGSEL_SHA224 |
1709 OP_ALG_AAI_HMAC_PRECOMP,
1710 .alg_op = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC,
1713 .name = "authenc(hmac(sha256),cbc(aes))",
1714 .driver_name = "authenc-hmac-sha256-cbc-aes-caam",
1715 .blocksize = AES_BLOCK_SIZE,
1716 .type = CRYPTO_ALG_TYPE_AEAD,
1718 .setkey = aead_setkey,
1719 .setauthsize = aead_setauthsize,
1720 .encrypt = aead_encrypt,
1721 .decrypt = aead_decrypt,
1722 .givencrypt = aead_givencrypt,
1723 .geniv = "<built-in>",
1724 .ivsize = AES_BLOCK_SIZE,
1725 .maxauthsize = SHA256_DIGEST_SIZE,
1727 .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC,
1728 .class2_alg_type = OP_ALG_ALGSEL_SHA256 |
1729 OP_ALG_AAI_HMAC_PRECOMP,
1730 .alg_op = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC,
1733 .name = "authenc(hmac(sha384),cbc(aes))",
1734 .driver_name = "authenc-hmac-sha384-cbc-aes-caam",
1735 .blocksize = AES_BLOCK_SIZE,
1736 .type = CRYPTO_ALG_TYPE_AEAD,
1738 .setkey = aead_setkey,
1739 .setauthsize = aead_setauthsize,
1740 .encrypt = aead_encrypt,
1741 .decrypt = aead_decrypt,
1742 .givencrypt = aead_givencrypt,
1743 .geniv = "<built-in>",
1744 .ivsize = AES_BLOCK_SIZE,
1745 .maxauthsize = SHA384_DIGEST_SIZE,
1747 .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC,
1748 .class2_alg_type = OP_ALG_ALGSEL_SHA384 |
1749 OP_ALG_AAI_HMAC_PRECOMP,
1750 .alg_op = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC,
1754 .name = "authenc(hmac(sha512),cbc(aes))",
1755 .driver_name = "authenc-hmac-sha512-cbc-aes-caam",
1756 .blocksize = AES_BLOCK_SIZE,
1757 .type = CRYPTO_ALG_TYPE_AEAD,
1759 .setkey = aead_setkey,
1760 .setauthsize = aead_setauthsize,
1761 .encrypt = aead_encrypt,
1762 .decrypt = aead_decrypt,
1763 .givencrypt = aead_givencrypt,
1764 .geniv = "<built-in>",
1765 .ivsize = AES_BLOCK_SIZE,
1766 .maxauthsize = SHA512_DIGEST_SIZE,
1768 .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC,
1769 .class2_alg_type = OP_ALG_ALGSEL_SHA512 |
1770 OP_ALG_AAI_HMAC_PRECOMP,
1771 .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC,
1774 .name = "authenc(hmac(md5),cbc(des3_ede))",
1775 .driver_name = "authenc-hmac-md5-cbc-des3_ede-caam",
1776 .blocksize = DES3_EDE_BLOCK_SIZE,
1777 .type = CRYPTO_ALG_TYPE_AEAD,
1779 .setkey = aead_setkey,
1780 .setauthsize = aead_setauthsize,
1781 .encrypt = aead_encrypt,
1782 .decrypt = aead_decrypt,
1783 .givencrypt = aead_givencrypt,
1784 .geniv = "<built-in>",
1785 .ivsize = DES3_EDE_BLOCK_SIZE,
1786 .maxauthsize = MD5_DIGEST_SIZE,
1788 .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC,
1789 .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP,
1790 .alg_op = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC,
1793 .name = "authenc(hmac(sha1),cbc(des3_ede))",
1794 .driver_name = "authenc-hmac-sha1-cbc-des3_ede-caam",
1795 .blocksize = DES3_EDE_BLOCK_SIZE,
1796 .type = CRYPTO_ALG_TYPE_AEAD,
1798 .setkey = aead_setkey,
1799 .setauthsize = aead_setauthsize,
1800 .encrypt = aead_encrypt,
1801 .decrypt = aead_decrypt,
1802 .givencrypt = aead_givencrypt,
1803 .geniv = "<built-in>",
1804 .ivsize = DES3_EDE_BLOCK_SIZE,
1805 .maxauthsize = SHA1_DIGEST_SIZE,
1807 .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC,
1808 .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP,
1809 .alg_op = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC,
1812 .name = "authenc(hmac(sha224),cbc(des3_ede))",
1813 .driver_name = "authenc-hmac-sha224-cbc-des3_ede-caam",
1814 .blocksize = DES3_EDE_BLOCK_SIZE,
1815 .type = CRYPTO_ALG_TYPE_AEAD,
1817 .setkey = aead_setkey,
1818 .setauthsize = aead_setauthsize,
1819 .encrypt = aead_encrypt,
1820 .decrypt = aead_decrypt,
1821 .givencrypt = aead_givencrypt,
1822 .geniv = "<built-in>",
1823 .ivsize = DES3_EDE_BLOCK_SIZE,
1824 .maxauthsize = SHA224_DIGEST_SIZE,
1826 .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC,
1827 .class2_alg_type = OP_ALG_ALGSEL_SHA224 |
1828 OP_ALG_AAI_HMAC_PRECOMP,
1829 .alg_op = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC,
1832 .name = "authenc(hmac(sha256),cbc(des3_ede))",
1833 .driver_name = "authenc-hmac-sha256-cbc-des3_ede-caam",
1834 .blocksize = DES3_EDE_BLOCK_SIZE,
1835 .type = CRYPTO_ALG_TYPE_AEAD,
1837 .setkey = aead_setkey,
1838 .setauthsize = aead_setauthsize,
1839 .encrypt = aead_encrypt,
1840 .decrypt = aead_decrypt,
1841 .givencrypt = aead_givencrypt,
1842 .geniv = "<built-in>",
1843 .ivsize = DES3_EDE_BLOCK_SIZE,
1844 .maxauthsize = SHA256_DIGEST_SIZE,
1846 .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC,
1847 .class2_alg_type = OP_ALG_ALGSEL_SHA256 |
1848 OP_ALG_AAI_HMAC_PRECOMP,
1849 .alg_op = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC,
1852 .name = "authenc(hmac(sha384),cbc(des3_ede))",
1853 .driver_name = "authenc-hmac-sha384-cbc-des3_ede-caam",
1854 .blocksize = DES3_EDE_BLOCK_SIZE,
1855 .type = CRYPTO_ALG_TYPE_AEAD,
1857 .setkey = aead_setkey,
1858 .setauthsize = aead_setauthsize,
1859 .encrypt = aead_encrypt,
1860 .decrypt = aead_decrypt,
1861 .givencrypt = aead_givencrypt,
1862 .geniv = "<built-in>",
1863 .ivsize = DES3_EDE_BLOCK_SIZE,
1864 .maxauthsize = SHA384_DIGEST_SIZE,
1866 .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC,
1867 .class2_alg_type = OP_ALG_ALGSEL_SHA384 |
1868 OP_ALG_AAI_HMAC_PRECOMP,
1869 .alg_op = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC,
1872 .name = "authenc(hmac(sha512),cbc(des3_ede))",
1873 .driver_name = "authenc-hmac-sha512-cbc-des3_ede-caam",
1874 .blocksize = DES3_EDE_BLOCK_SIZE,
1875 .type = CRYPTO_ALG_TYPE_AEAD,
1877 .setkey = aead_setkey,
1878 .setauthsize = aead_setauthsize,
1879 .encrypt = aead_encrypt,
1880 .decrypt = aead_decrypt,
1881 .givencrypt = aead_givencrypt,
1882 .geniv = "<built-in>",
1883 .ivsize = DES3_EDE_BLOCK_SIZE,
1884 .maxauthsize = SHA512_DIGEST_SIZE,
1886 .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC,
1887 .class2_alg_type = OP_ALG_ALGSEL_SHA512 |
1888 OP_ALG_AAI_HMAC_PRECOMP,
1889 .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC,
1892 .name = "authenc(hmac(md5),cbc(des))",
1893 .driver_name = "authenc-hmac-md5-cbc-des-caam",
1894 .blocksize = DES_BLOCK_SIZE,
1895 .type = CRYPTO_ALG_TYPE_AEAD,
1897 .setkey = aead_setkey,
1898 .setauthsize = aead_setauthsize,
1899 .encrypt = aead_encrypt,
1900 .decrypt = aead_decrypt,
1901 .givencrypt = aead_givencrypt,
1902 .geniv = "<built-in>",
1903 .ivsize = DES_BLOCK_SIZE,
1904 .maxauthsize = MD5_DIGEST_SIZE,
1906 .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC,
1907 .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP,
1908 .alg_op = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC,
1911 .name = "authenc(hmac(sha1),cbc(des))",
1912 .driver_name = "authenc-hmac-sha1-cbc-des-caam",
1913 .blocksize = DES_BLOCK_SIZE,
1914 .type = CRYPTO_ALG_TYPE_AEAD,
1916 .setkey = aead_setkey,
1917 .setauthsize = aead_setauthsize,
1918 .encrypt = aead_encrypt,
1919 .decrypt = aead_decrypt,
1920 .givencrypt = aead_givencrypt,
1921 .geniv = "<built-in>",
1922 .ivsize = DES_BLOCK_SIZE,
1923 .maxauthsize = SHA1_DIGEST_SIZE,
1925 .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC,
1926 .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP,
1927 .alg_op = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC,
1930 .name = "authenc(hmac(sha224),cbc(des))",
1931 .driver_name = "authenc-hmac-sha224-cbc-des-caam",
1932 .blocksize = DES_BLOCK_SIZE,
1933 .type = CRYPTO_ALG_TYPE_AEAD,
1935 .setkey = aead_setkey,
1936 .setauthsize = aead_setauthsize,
1937 .encrypt = aead_encrypt,
1938 .decrypt = aead_decrypt,
1939 .givencrypt = aead_givencrypt,
1940 .geniv = "<built-in>",
1941 .ivsize = DES_BLOCK_SIZE,
1942 .maxauthsize = SHA224_DIGEST_SIZE,
1944 .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC,
1945 .class2_alg_type = OP_ALG_ALGSEL_SHA224 |
1946 OP_ALG_AAI_HMAC_PRECOMP,
1947 .alg_op = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC,
1950 .name = "authenc(hmac(sha256),cbc(des))",
1951 .driver_name = "authenc-hmac-sha256-cbc-des-caam",
1952 .blocksize = DES_BLOCK_SIZE,
1953 .type = CRYPTO_ALG_TYPE_AEAD,
1955 .setkey = aead_setkey,
1956 .setauthsize = aead_setauthsize,
1957 .encrypt = aead_encrypt,
1958 .decrypt = aead_decrypt,
1959 .givencrypt = aead_givencrypt,
1960 .geniv = "<built-in>",
1961 .ivsize = DES_BLOCK_SIZE,
1962 .maxauthsize = SHA256_DIGEST_SIZE,
1964 .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC,
1965 .class2_alg_type = OP_ALG_ALGSEL_SHA256 |
1966 OP_ALG_AAI_HMAC_PRECOMP,
1967 .alg_op = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC,
1970 .name = "authenc(hmac(sha384),cbc(des))",
1971 .driver_name = "authenc-hmac-sha384-cbc-des-caam",
1972 .blocksize = DES_BLOCK_SIZE,
1973 .type = CRYPTO_ALG_TYPE_AEAD,
1975 .setkey = aead_setkey,
1976 .setauthsize = aead_setauthsize,
1977 .encrypt = aead_encrypt,
1978 .decrypt = aead_decrypt,
1979 .givencrypt = aead_givencrypt,
1980 .geniv = "<built-in>",
1981 .ivsize = DES_BLOCK_SIZE,
1982 .maxauthsize = SHA384_DIGEST_SIZE,
1984 .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC,
1985 .class2_alg_type = OP_ALG_ALGSEL_SHA384 |
1986 OP_ALG_AAI_HMAC_PRECOMP,
1987 .alg_op = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC,
1990 .name = "authenc(hmac(sha512),cbc(des))",
1991 .driver_name = "authenc-hmac-sha512-cbc-des-caam",
1992 .blocksize = DES_BLOCK_SIZE,
1993 .type = CRYPTO_ALG_TYPE_AEAD,
1995 .setkey = aead_setkey,
1996 .setauthsize = aead_setauthsize,
1997 .encrypt = aead_encrypt,
1998 .decrypt = aead_decrypt,
1999 .givencrypt = aead_givencrypt,
2000 .geniv = "<built-in>",
2001 .ivsize = DES_BLOCK_SIZE,
2002 .maxauthsize = SHA512_DIGEST_SIZE,
2004 .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC,
2005 .class2_alg_type = OP_ALG_ALGSEL_SHA512 |
2006 OP_ALG_AAI_HMAC_PRECOMP,
2007 .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC,
2009 /* ablkcipher descriptor */
2012 .driver_name = "cbc-aes-caam",
2013 .blocksize = AES_BLOCK_SIZE,
2014 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
2015 .template_ablkcipher = {
2016 .setkey = ablkcipher_setkey,
2017 .encrypt = ablkcipher_encrypt,
2018 .decrypt = ablkcipher_decrypt,
2020 .min_keysize = AES_MIN_KEY_SIZE,
2021 .max_keysize = AES_MAX_KEY_SIZE,
2022 .ivsize = AES_BLOCK_SIZE,
2024 .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC,
2027 .name = "cbc(des3_ede)",
2028 .driver_name = "cbc-3des-caam",
2029 .blocksize = DES3_EDE_BLOCK_SIZE,
2030 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
2031 .template_ablkcipher = {
2032 .setkey = ablkcipher_setkey,
2033 .encrypt = ablkcipher_encrypt,
2034 .decrypt = ablkcipher_decrypt,
2036 .min_keysize = DES3_EDE_KEY_SIZE,
2037 .max_keysize = DES3_EDE_KEY_SIZE,
2038 .ivsize = DES3_EDE_BLOCK_SIZE,
2040 .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC,
2044 .driver_name = "cbc-des-caam",
2045 .blocksize = DES_BLOCK_SIZE,
2046 .type = CRYPTO_ALG_TYPE_ABLKCIPHER,
2047 .template_ablkcipher = {
2048 .setkey = ablkcipher_setkey,
2049 .encrypt = ablkcipher_encrypt,
2050 .decrypt = ablkcipher_decrypt,
2052 .min_keysize = DES_KEY_SIZE,
2053 .max_keysize = DES_KEY_SIZE,
2054 .ivsize = DES_BLOCK_SIZE,
2056 .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC,
2060 struct caam_crypto_alg {
2061 struct list_head entry;
2062 struct device *ctrldev;
2063 int class1_alg_type;
2064 int class2_alg_type;
2066 struct crypto_alg crypto_alg;
2069 static int caam_cra_init(struct crypto_tfm *tfm)
2071 struct crypto_alg *alg = tfm->__crt_alg;
2072 struct caam_crypto_alg *caam_alg =
2073 container_of(alg, struct caam_crypto_alg, crypto_alg);
2074 struct caam_ctx *ctx = crypto_tfm_ctx(tfm);
2075 struct caam_drv_private *priv = dev_get_drvdata(caam_alg->ctrldev);
2076 int tgt_jr = atomic_inc_return(&priv->tfm_count);
2079 * distribute tfms across job rings to ensure in-order
2080 * crypto request processing per tfm
2082 ctx->jrdev = priv->jrdev[(tgt_jr / 2) % priv->total_jobrs];
2084 /* copy descriptor header template value */
2085 ctx->class1_alg_type = OP_TYPE_CLASS1_ALG | caam_alg->class1_alg_type;
2086 ctx->class2_alg_type = OP_TYPE_CLASS2_ALG | caam_alg->class2_alg_type;
2087 ctx->alg_op = OP_TYPE_CLASS2_ALG | caam_alg->alg_op;
2092 static void caam_cra_exit(struct crypto_tfm *tfm)
2094 struct caam_ctx *ctx = crypto_tfm_ctx(tfm);
2096 if (ctx->sh_desc_enc_dma &&
2097 !dma_mapping_error(ctx->jrdev, ctx->sh_desc_enc_dma))
2098 dma_unmap_single(ctx->jrdev, ctx->sh_desc_enc_dma,
2099 desc_bytes(ctx->sh_desc_enc), DMA_TO_DEVICE);
2100 if (ctx->sh_desc_dec_dma &&
2101 !dma_mapping_error(ctx->jrdev, ctx->sh_desc_dec_dma))
2102 dma_unmap_single(ctx->jrdev, ctx->sh_desc_dec_dma,
2103 desc_bytes(ctx->sh_desc_dec), DMA_TO_DEVICE);
2104 if (ctx->sh_desc_givenc_dma &&
2105 !dma_mapping_error(ctx->jrdev, ctx->sh_desc_givenc_dma))
2106 dma_unmap_single(ctx->jrdev, ctx->sh_desc_givenc_dma,
2107 desc_bytes(ctx->sh_desc_givenc),
2111 static void __exit caam_algapi_exit(void)
2114 struct device_node *dev_node;
2115 struct platform_device *pdev;
2116 struct device *ctrldev;
2117 struct caam_drv_private *priv;
2118 struct caam_crypto_alg *t_alg, *n;
2120 dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
2122 dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec4.0");
2127 pdev = of_find_device_by_node(dev_node);
2131 ctrldev = &pdev->dev;
2132 of_node_put(dev_node);
2133 priv = dev_get_drvdata(ctrldev);
2135 if (!priv->alg_list.next)
2138 list_for_each_entry_safe(t_alg, n, &priv->alg_list, entry) {
2139 crypto_unregister_alg(&t_alg->crypto_alg);
2140 list_del(&t_alg->entry);
2145 static struct caam_crypto_alg *caam_alg_alloc(struct device *ctrldev,
2146 struct caam_alg_template
2149 struct caam_crypto_alg *t_alg;
2150 struct crypto_alg *alg;
2152 t_alg = kzalloc(sizeof(struct caam_crypto_alg), GFP_KERNEL);
2154 dev_err(ctrldev, "failed to allocate t_alg\n");
2155 return ERR_PTR(-ENOMEM);
2158 alg = &t_alg->crypto_alg;
2160 snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", template->name);
2161 snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
2162 template->driver_name);
2163 alg->cra_module = THIS_MODULE;
2164 alg->cra_init = caam_cra_init;
2165 alg->cra_exit = caam_cra_exit;
2166 alg->cra_priority = CAAM_CRA_PRIORITY;
2167 alg->cra_blocksize = template->blocksize;
2168 alg->cra_alignmask = 0;
2169 alg->cra_ctxsize = sizeof(struct caam_ctx);
2170 alg->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY |
2172 switch (template->type) {
2173 case CRYPTO_ALG_TYPE_ABLKCIPHER:
2174 alg->cra_type = &crypto_ablkcipher_type;
2175 alg->cra_ablkcipher = template->template_ablkcipher;
2177 case CRYPTO_ALG_TYPE_AEAD:
2178 alg->cra_type = &crypto_aead_type;
2179 alg->cra_aead = template->template_aead;
2183 t_alg->class1_alg_type = template->class1_alg_type;
2184 t_alg->class2_alg_type = template->class2_alg_type;
2185 t_alg->alg_op = template->alg_op;
2186 t_alg->ctrldev = ctrldev;
2191 static int __init caam_algapi_init(void)
2193 struct device_node *dev_node;
2194 struct platform_device *pdev;
2195 struct device *ctrldev;
2196 struct caam_drv_private *priv;
2199 dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
2201 dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec4.0");
2206 pdev = of_find_device_by_node(dev_node);
2210 ctrldev = &pdev->dev;
2211 priv = dev_get_drvdata(ctrldev);
2212 of_node_put(dev_node);
2214 INIT_LIST_HEAD(&priv->alg_list);
2216 atomic_set(&priv->tfm_count, -1);
2218 /* register crypto algorithms the device supports */
2219 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
2220 /* TODO: check if h/w supports alg */
2221 struct caam_crypto_alg *t_alg;
2223 t_alg = caam_alg_alloc(ctrldev, &driver_algs[i]);
2224 if (IS_ERR(t_alg)) {
2225 err = PTR_ERR(t_alg);
2226 dev_warn(ctrldev, "%s alg allocation failed\n",
2227 driver_algs[i].driver_name);
2231 err = crypto_register_alg(&t_alg->crypto_alg);
2233 dev_warn(ctrldev, "%s alg registration failed\n",
2234 t_alg->crypto_alg.cra_driver_name);
2237 list_add_tail(&t_alg->entry, &priv->alg_list);
2239 if (!list_empty(&priv->alg_list))
2240 dev_info(ctrldev, "%s algorithms registered in /proc/crypto\n",
2241 (char *)of_get_property(dev_node, "compatible", NULL));
2246 module_init(caam_algapi_init);
2247 module_exit(caam_algapi_exit);
2249 MODULE_LICENSE("GPL");
2250 MODULE_DESCRIPTION("FSL CAAM support for crypto API");
2251 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");