2 * Routines supporting the Power 7+ Nest Accelerators driver
4 * Copyright (C) 2011-2012 International Business Machines Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 only.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Author: Kent Yoder <yoder1@us.ibm.com>
22 #include <crypto/internal/hash.h>
23 #include <crypto/hash.h>
24 #include <crypto/aes.h>
25 #include <crypto/sha.h>
26 #include <crypto/algapi.h>
27 #include <crypto/scatterwalk.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/types.h>
32 #include <linux/crypto.h>
33 #include <linux/scatterlist.h>
34 #include <linux/device.h>
36 #include <asm/pSeries_reconfig.h>
37 #include <asm/hvcall.h>
40 #include "nx_csbcpb.h"
45 * nx_hcall_sync - make an H_COP_OP hcall for the passed in op structure
47 * @nx_ctx: the crypto context handle
48 * @op: PFO operation struct to pass in
49 * @may_sleep: flag indicating the request can sleep
51 * Make the hcall, retrying while the hardware is busy. If we cannot yield
52 * the thread, limit the number of retries to 10 here.
54 int nx_hcall_sync(struct nx_crypto_ctx *nx_ctx,
55 struct vio_pfo_op *op,
59 struct vio_dev *viodev = nx_driver.viodev;
61 atomic_inc(&(nx_ctx->stats->sync_ops));
64 rc = vio_h_cop_sync(viodev, op);
65 } while ((rc == -EBUSY && !may_sleep && retries--) ||
66 (rc == -EBUSY && may_sleep && cond_resched()));
69 dev_dbg(&viodev->dev, "vio_h_cop_sync failed: rc: %d "
70 "hcall rc: %ld\n", rc, op->hcall_err);
71 atomic_inc(&(nx_ctx->stats->errors));
72 atomic_set(&(nx_ctx->stats->last_error), op->hcall_err);
73 atomic_set(&(nx_ctx->stats->last_error_pid), current->pid);
80 * nx_build_sg_list - build an NX scatter list describing a single buffer
82 * @sg_head: pointer to the first scatter list element to build
83 * @start_addr: pointer to the linear buffer
84 * @len: length of the data at @start_addr
85 * @sgmax: the largest number of scatter list elements we're allowed to create
87 * This function will start writing nx_sg elements at @sg_head and keep
88 * writing them until all of the data from @start_addr is described or
89 * until sgmax elements have been written. Scatter list elements will be
90 * created such that none of the elements describes a buffer that crosses a 4K
93 struct nx_sg *nx_build_sg_list(struct nx_sg *sg_head,
98 unsigned int sg_len = 0;
100 u64 sg_addr = (u64)start_addr;
103 /* determine the start and end for this address range - slightly
104 * different if this is in VMALLOC_REGION */
105 if (is_vmalloc_addr(start_addr))
106 sg_addr = page_to_phys(vmalloc_to_page(start_addr))
107 + offset_in_page(sg_addr);
109 sg_addr = __pa(sg_addr);
111 end_addr = sg_addr + len;
113 /* each iteration will write one struct nx_sg element and add the
114 * length of data described by that element to sg_len. Once @len bytes
115 * have been described (or @sgmax elements have been written), the
116 * loop ends. min_t is used to ensure @end_addr falls on the same page
117 * as sg_addr, if not, we need to create another nx_sg element for the
118 * data on the next page */
119 for (sg = sg_head; sg_len < len; sg++) {
121 sg_addr = min_t(u64, NX_PAGE_NUM(sg_addr + NX_PAGE_SIZE), end_addr);
122 sg->len = sg_addr - sg->addr;
125 if ((sg - sg_head) == sgmax) {
126 pr_err("nx: scatter/gather list overflow, pid: %d\n",
132 /* return the moved sg_head pointer */
137 * nx_walk_and_build - walk a linux scatterlist and build an nx scatterlist
139 * @nx_dst: pointer to the first nx_sg element to write
140 * @sglen: max number of nx_sg entries we're allowed to write
141 * @sg_src: pointer to the source linux scatterlist to walk
142 * @start: number of bytes to fast-forward past at the beginning of @sg_src
143 * @src_len: number of bytes to walk in @sg_src
145 struct nx_sg *nx_walk_and_build(struct nx_sg *nx_dst,
147 struct scatterlist *sg_src,
149 unsigned int src_len)
151 struct scatter_walk walk;
152 struct nx_sg *nx_sg = nx_dst;
153 unsigned int n, offset = 0, len = src_len;
156 /* we need to fast forward through @start bytes first */
158 scatterwalk_start(&walk, sg_src);
160 if (start < offset + sg_src->length)
163 offset += sg_src->length;
164 sg_src = scatterwalk_sg_next(sg_src);
167 /* start - offset is the number of bytes to advance in the scatterlist
168 * element we're currently looking at */
169 scatterwalk_advance(&walk, start - offset);
171 while (len && nx_sg) {
172 n = scatterwalk_clamp(&walk, len);
174 scatterwalk_start(&walk, sg_next(walk.sg));
175 n = scatterwalk_clamp(&walk, len);
177 dst = scatterwalk_map(&walk);
179 nx_sg = nx_build_sg_list(nx_sg, dst, n, sglen);
182 scatterwalk_unmap(dst);
183 scatterwalk_advance(&walk, n);
184 scatterwalk_done(&walk, SCATTERWALK_FROM_SG, len);
187 /* return the moved destination pointer */
192 * nx_build_sg_lists - walk the input scatterlists and build arrays of NX
193 * scatterlists based on them.
195 * @nx_ctx: NX crypto context for the lists we're building
196 * @desc: the block cipher descriptor for the operation
197 * @dst: destination scatterlist
198 * @src: source scatterlist
199 * @nbytes: length of data described in the scatterlists
200 * @iv: destination for the iv data, if the algorithm requires it
202 * This is common code shared by all the AES algorithms. It uses the block
203 * cipher walk routines to traverse input and output scatterlists, building
204 * corresponding NX scatterlists
206 int nx_build_sg_lists(struct nx_crypto_ctx *nx_ctx,
207 struct blkcipher_desc *desc,
208 struct scatterlist *dst,
209 struct scatterlist *src,
213 struct nx_sg *nx_insg = nx_ctx->in_sg;
214 struct nx_sg *nx_outsg = nx_ctx->out_sg;
215 struct blkcipher_walk walk;
218 blkcipher_walk_init(&walk, dst, src, nbytes);
219 rc = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
224 memcpy(iv, walk.iv, AES_BLOCK_SIZE);
226 while (walk.nbytes) {
227 nx_insg = nx_build_sg_list(nx_insg, walk.src.virt.addr,
228 walk.nbytes, nx_ctx->ap->sglen);
229 nx_outsg = nx_build_sg_list(nx_outsg, walk.dst.virt.addr,
230 walk.nbytes, nx_ctx->ap->sglen);
232 rc = blkcipher_walk_done(desc, &walk, 0);
238 nx_insg = nx_build_sg_list(nx_insg, walk.src.virt.addr,
239 walk.nbytes, nx_ctx->ap->sglen);
240 nx_outsg = nx_build_sg_list(nx_outsg, walk.dst.virt.addr,
241 walk.nbytes, nx_ctx->ap->sglen);
246 /* these lengths should be negative, which will indicate to phyp that
247 * the input and output parameters are scatterlists, not linear
249 nx_ctx->op.inlen = (nx_ctx->in_sg - nx_insg) * sizeof(struct nx_sg);
250 nx_ctx->op.outlen = (nx_ctx->out_sg - nx_outsg) * sizeof(struct nx_sg);
256 * nx_ctx_init - initialize an nx_ctx's vio_pfo_op struct
258 * @nx_ctx: the nx context to initialize
259 * @function: the function code for the op
261 void nx_ctx_init(struct nx_crypto_ctx *nx_ctx, unsigned int function)
263 memset(nx_ctx->kmem, 0, nx_ctx->kmem_len);
264 nx_ctx->csbcpb->csb.valid |= NX_CSB_VALID_BIT;
266 nx_ctx->op.flags = function;
267 nx_ctx->op.csbcpb = __pa(nx_ctx->csbcpb);
268 nx_ctx->op.in = __pa(nx_ctx->in_sg);
269 nx_ctx->op.out = __pa(nx_ctx->out_sg);
271 if (nx_ctx->csbcpb_aead) {
272 nx_ctx->csbcpb_aead->csb.valid |= NX_CSB_VALID_BIT;
274 nx_ctx->op_aead.flags = function;
275 nx_ctx->op_aead.csbcpb = __pa(nx_ctx->csbcpb_aead);
276 nx_ctx->op_aead.in = __pa(nx_ctx->in_sg);
277 nx_ctx->op_aead.out = __pa(nx_ctx->out_sg);
281 static void nx_of_update_status(struct device *dev,
285 if (!strncmp(p->value, "okay", p->length)) {
286 props->status = NX_WAITING;
287 props->flags |= NX_OF_FLAG_STATUS_SET;
289 dev_info(dev, "%s: status '%s' is not 'okay'\n", __func__,
294 static void nx_of_update_sglen(struct device *dev,
298 if (p->length != sizeof(props->max_sg_len)) {
299 dev_err(dev, "%s: unexpected format for "
300 "ibm,max-sg-len property\n", __func__);
301 dev_dbg(dev, "%s: ibm,max-sg-len is %d bytes "
302 "long, expected %zd bytes\n", __func__,
303 p->length, sizeof(props->max_sg_len));
307 props->max_sg_len = *(u32 *)p->value;
308 props->flags |= NX_OF_FLAG_MAXSGLEN_SET;
311 static void nx_of_update_msc(struct device *dev,
315 struct msc_triplet *trip;
316 struct max_sync_cop *msc;
317 unsigned int bytes_so_far, i, lenp;
319 msc = (struct max_sync_cop *)p->value;
322 /* You can't tell if the data read in for this property is sane by its
323 * size alone. This is because there are sizes embedded in the data
324 * structure. The best we can do is check lengths as we parse and bail
325 * as soon as a length error is detected. */
328 while ((bytes_so_far + sizeof(struct max_sync_cop)) <= lenp) {
329 bytes_so_far += sizeof(struct max_sync_cop);
334 ((bytes_so_far + sizeof(struct msc_triplet)) <= lenp) &&
337 if (msc->fc > NX_MAX_FC || msc->mode > NX_MAX_MODE) {
338 dev_err(dev, "unknown function code/mode "
339 "combo: %d/%d (ignored)\n", msc->fc,
344 switch (trip->keybitlen) {
347 props->ap[msc->fc][msc->mode][0].databytelen =
349 props->ap[msc->fc][msc->mode][0].sglen =
353 props->ap[msc->fc][msc->mode][1].databytelen =
355 props->ap[msc->fc][msc->mode][1].sglen =
359 if (msc->fc == NX_FC_AES) {
360 props->ap[msc->fc][msc->mode][2].
361 databytelen = trip->databytelen;
362 props->ap[msc->fc][msc->mode][2].sglen =
364 } else if (msc->fc == NX_FC_AES_HMAC ||
365 msc->fc == NX_FC_SHA) {
366 props->ap[msc->fc][msc->mode][1].
367 databytelen = trip->databytelen;
368 props->ap[msc->fc][msc->mode][1].sglen =
371 dev_warn(dev, "unknown function "
372 "code/key bit len combo"
373 ": (%u/256)\n", msc->fc);
377 props->ap[msc->fc][msc->mode][2].databytelen =
379 props->ap[msc->fc][msc->mode][2].sglen =
383 dev_warn(dev, "unknown function code/key bit "
384 "len combo: (%u/%u)\n", msc->fc,
389 bytes_so_far += sizeof(struct msc_triplet);
393 msc = (struct max_sync_cop *)trip;
396 props->flags |= NX_OF_FLAG_MAXSYNCCOP_SET;
400 * nx_of_init - read openFirmware values from the device tree
402 * @dev: device handle
403 * @props: pointer to struct to hold the properties values
405 * Called once at driver probe time, this function will read out the
406 * openFirmware properties we use at runtime. If all the OF properties are
407 * acceptable, when we exit this function props->flags will indicate that
408 * we're ready to register our crypto algorithms.
410 static void nx_of_init(struct device *dev, struct nx_of *props)
412 struct device_node *base_node = dev->of_node;
415 p = of_find_property(base_node, "status", NULL);
417 dev_info(dev, "%s: property 'status' not found\n", __func__);
419 nx_of_update_status(dev, p, props);
421 p = of_find_property(base_node, "ibm,max-sg-len", NULL);
423 dev_info(dev, "%s: property 'ibm,max-sg-len' not found\n",
426 nx_of_update_sglen(dev, p, props);
428 p = of_find_property(base_node, "ibm,max-sync-cop", NULL);
430 dev_info(dev, "%s: property 'ibm,max-sync-cop' not found\n",
433 nx_of_update_msc(dev, p, props);
437 * nx_register_algs - register algorithms with the crypto API
439 * Called from nx_probe()
441 * If all OF properties are in an acceptable state, the driver flags will
442 * indicate that we're ready and we'll create our debugfs files and register
443 * out crypto algorithms.
445 static int nx_register_algs(void)
449 if (nx_driver.of.flags != NX_OF_FLAG_MASK_READY)
452 memset(&nx_driver.stats, 0, sizeof(struct nx_stats));
454 rc = NX_DEBUGFS_INIT(&nx_driver);
458 rc = crypto_register_alg(&nx_ecb_aes_alg);
462 rc = crypto_register_alg(&nx_cbc_aes_alg);
466 rc = crypto_register_alg(&nx_ctr_aes_alg);
470 rc = crypto_register_alg(&nx_ctr3686_aes_alg);
474 rc = crypto_register_alg(&nx_gcm_aes_alg);
476 goto out_unreg_ctr3686;
478 rc = crypto_register_alg(&nx_gcm4106_aes_alg);
482 rc = crypto_register_alg(&nx_ccm_aes_alg);
484 goto out_unreg_gcm4106;
486 rc = crypto_register_alg(&nx_ccm4309_aes_alg);
490 rc = crypto_register_shash(&nx_shash_sha256_alg);
492 goto out_unreg_ccm4309;
494 rc = crypto_register_shash(&nx_shash_sha512_alg);
498 rc = crypto_register_shash(&nx_shash_aes_xcbc_alg);
502 nx_driver.of.status = NX_OKAY;
507 crypto_unregister_shash(&nx_shash_sha512_alg);
509 crypto_unregister_shash(&nx_shash_sha256_alg);
511 crypto_unregister_alg(&nx_ccm4309_aes_alg);
513 crypto_unregister_alg(&nx_ccm_aes_alg);
515 crypto_unregister_alg(&nx_gcm4106_aes_alg);
517 crypto_unregister_alg(&nx_gcm_aes_alg);
519 crypto_unregister_alg(&nx_ctr3686_aes_alg);
521 crypto_unregister_alg(&nx_ctr_aes_alg);
523 crypto_unregister_alg(&nx_cbc_aes_alg);
525 crypto_unregister_alg(&nx_ecb_aes_alg);
531 * nx_crypto_ctx_init - create and initialize a crypto api context
533 * @nx_ctx: the crypto api context
534 * @fc: function code for the context
535 * @mode: the function code specific mode for this context
537 static int nx_crypto_ctx_init(struct nx_crypto_ctx *nx_ctx, u32 fc, u32 mode)
539 if (nx_driver.of.status != NX_OKAY) {
540 pr_err("Attempt to initialize NX crypto context while device "
541 "is not available!\n");
545 /* we need an extra page for csbcpb_aead for these modes */
546 if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM)
547 nx_ctx->kmem_len = (4 * NX_PAGE_SIZE) +
548 sizeof(struct nx_csbcpb);
550 nx_ctx->kmem_len = (3 * NX_PAGE_SIZE) +
551 sizeof(struct nx_csbcpb);
553 nx_ctx->kmem = kmalloc(nx_ctx->kmem_len, GFP_KERNEL);
557 /* the csbcpb and scatterlists must be 4K aligned pages */
558 nx_ctx->csbcpb = (struct nx_csbcpb *)(round_up((u64)nx_ctx->kmem,
560 nx_ctx->in_sg = (struct nx_sg *)((u8 *)nx_ctx->csbcpb + NX_PAGE_SIZE);
561 nx_ctx->out_sg = (struct nx_sg *)((u8 *)nx_ctx->in_sg + NX_PAGE_SIZE);
563 if (mode == NX_MODE_AES_GCM || mode == NX_MODE_AES_CCM)
564 nx_ctx->csbcpb_aead =
565 (struct nx_csbcpb *)((u8 *)nx_ctx->out_sg +
568 /* give each context a pointer to global stats and their OF
570 nx_ctx->stats = &nx_driver.stats;
571 memcpy(nx_ctx->props, nx_driver.of.ap[fc][mode],
572 sizeof(struct alg_props) * 3);
577 /* entry points from the crypto tfm initializers */
578 int nx_crypto_ctx_aes_ccm_init(struct crypto_tfm *tfm)
580 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
584 int nx_crypto_ctx_aes_gcm_init(struct crypto_tfm *tfm)
586 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
590 int nx_crypto_ctx_aes_ctr_init(struct crypto_tfm *tfm)
592 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
596 int nx_crypto_ctx_aes_cbc_init(struct crypto_tfm *tfm)
598 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
602 int nx_crypto_ctx_aes_ecb_init(struct crypto_tfm *tfm)
604 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
608 int nx_crypto_ctx_sha_init(struct crypto_tfm *tfm)
610 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_SHA, NX_MODE_SHA);
613 int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm *tfm)
615 return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,
616 NX_MODE_AES_XCBC_MAC);
620 * nx_crypto_ctx_exit - destroy a crypto api context
622 * @tfm: the crypto transform pointer for the context
624 * As crypto API contexts are destroyed, this exit hook is called to free the
625 * memory associated with it.
627 void nx_crypto_ctx_exit(struct crypto_tfm *tfm)
629 struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);
631 kzfree(nx_ctx->kmem);
632 nx_ctx->csbcpb = NULL;
633 nx_ctx->csbcpb_aead = NULL;
634 nx_ctx->in_sg = NULL;
635 nx_ctx->out_sg = NULL;
638 static int __devinit nx_probe(struct vio_dev *viodev,
639 const struct vio_device_id *id)
641 dev_dbg(&viodev->dev, "driver probed: %s resource id: 0x%x\n",
642 viodev->name, viodev->resource_id);
644 if (nx_driver.viodev) {
645 dev_err(&viodev->dev, "%s: Attempt to register more than one "
646 "instance of the hardware\n", __func__);
650 nx_driver.viodev = viodev;
652 nx_of_init(&viodev->dev, &nx_driver.of);
654 return nx_register_algs();
657 static int __devexit nx_remove(struct vio_dev *viodev)
659 dev_dbg(&viodev->dev, "entering nx_remove for UA 0x%x\n",
660 viodev->unit_address);
662 if (nx_driver.of.status == NX_OKAY) {
663 NX_DEBUGFS_FINI(&nx_driver);
665 crypto_unregister_alg(&nx_ccm_aes_alg);
666 crypto_unregister_alg(&nx_ccm4309_aes_alg);
667 crypto_unregister_alg(&nx_gcm_aes_alg);
668 crypto_unregister_alg(&nx_gcm4106_aes_alg);
669 crypto_unregister_alg(&nx_ctr_aes_alg);
670 crypto_unregister_alg(&nx_ctr3686_aes_alg);
671 crypto_unregister_alg(&nx_cbc_aes_alg);
672 crypto_unregister_alg(&nx_ecb_aes_alg);
673 crypto_unregister_shash(&nx_shash_sha256_alg);
674 crypto_unregister_shash(&nx_shash_sha512_alg);
675 crypto_unregister_shash(&nx_shash_aes_xcbc_alg);
682 /* module wide initialization/cleanup */
683 static int __init nx_init(void)
685 return vio_register_driver(&nx_driver.viodriver);
688 static void __exit nx_fini(void)
690 vio_unregister_driver(&nx_driver.viodriver);
693 static struct vio_device_id nx_crypto_driver_ids[] __devinitdata = {
694 { "ibm,sym-encryption-v1", "ibm,sym-encryption" },
697 MODULE_DEVICE_TABLE(vio, nx_crypto_driver_ids);
699 /* driver state structure */
700 struct nx_crypto_driver nx_driver = {
702 .id_table = nx_crypto_driver_ids,
709 module_init(nx_init);
710 module_exit(nx_fini);
712 MODULE_AUTHOR("Kent Yoder <yoder1@us.ibm.com>");
713 MODULE_DESCRIPTION(NX_STRING);
714 MODULE_LICENSE("GPL");
715 MODULE_VERSION(NX_VERSION);