2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
45 Say Y here if you have such a chipset.
49 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
53 bool "ARM PrimeCell PL080 or PL081 support"
54 depends on ARM_AMBA && EXPERIMENTAL
56 select DMA_VIRTUAL_CHANNELS
58 Platform has a PL08x DMAC device
59 which can provide DMA engine support
62 tristate "Intel I/OAT DMA support"
66 select ASYNC_TX_DISABLE_PQ_VAL_DMA
67 select ASYNC_TX_DISABLE_XOR_VAL_DMA
69 Enable support for the Intel(R) I/OAT DMA engine present
70 in recent Intel Xeon chipsets.
72 Say Y here if you have such a chipset.
77 tristate "Intel IOP ADMA support"
78 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
80 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
82 Enable support for the Intel(R) IOP Series RAID engines.
85 tristate "Synopsys DesignWare AHB DMA support"
88 default y if CPU_AT32AP7000
90 Support the Synopsys DesignWare AHB DMA controller. This
91 can be integrated in chips such as the Atmel AT32ap7000.
94 tristate "Atmel AHB DMA support"
98 Support the Atmel AHB DMA controller.
101 tristate "Freescale Elo and Elo Plus DMA support"
104 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
106 Enable support for the Freescale Elo and Elo Plus DMA controllers.
107 The Elo is the DMA controller on some 82xx and 83xx parts, and the
108 Elo Plus is the DMA controller on 85xx and 86xx parts.
111 tristate "Freescale MPC512x built-in DMA engine support"
112 depends on PPC_MPC512x || PPC_MPC831x
115 Enable support for the Freescale MPC512x built-in DMA engine.
118 bool "Marvell XOR engine support"
119 depends on PLAT_ORION
121 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
123 Enable support for the Marvell XOR engine.
126 bool "MX3x Image Processing Unit support"
131 If you plan to use the Image Processing unit in the i.MX3x, say
132 Y here. If unsure, select Y.
135 int "Number of dynamically mapped interrupts for IPU"
140 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
141 To avoid bloating the irq_desc[] array we allocate a sufficient
142 number of IRQ slots and map them dynamically to specific sources.
145 tristate "Toshiba TXx9 SoC DMA support"
146 depends on MACH_TX49XX || MACH_TX39XX
149 Support the TXx9 SoC internal DMA controller. This can be
150 integrated in chips such as the Toshiba TX4927/38/39.
152 config TEGRA20_APB_DMA
153 bool "NVIDIA Tegra20 APB DMA support"
154 depends on ARCH_TEGRA
157 Support for the NVIDIA Tegra20 APB DMA controller driver. The
158 DMA controller is having multiple DMA channel which can be
159 configured for different peripherals like audio, UART, SPI,
160 I2C etc which is in APB bus.
161 This DMA controller transfers data from memory to peripheral fifo
162 or vice versa. It does not support memory to memory data transfer.
167 tristate "Renesas SuperH DMAC support"
168 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
169 depends on !SH_DMA_API
172 Enable support for the Renesas SuperH DMA controllers.
175 bool "ST-Ericsson COH901318 DMA support"
179 Enable support for ST-Ericsson COH 901 318 DMA.
182 bool "ST-Ericsson DMA40 support"
183 depends on ARCH_U8500
186 Support for ST-Ericsson DMA40 controller
188 config AMCC_PPC440SPE_ADMA
189 tristate "AMCC PPC440SPe ADMA support"
190 depends on 440SPe || 440SP
192 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
193 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
195 Enable support for the AMCC PPC440SPe RAID engines.
198 tristate "Timberdale FPGA DMA support"
199 depends on MFD_TIMBERDALE || HAS_IOMEM
202 Enable support for the Timberdale FPGA DMA engine.
205 tristate "CSR SiRFprimaII DMA support"
206 depends on ARCH_PRIMA2
209 Enable support for the CSR SiRFprimaII DMA engine.
212 tristate "TI EDMA support"
213 depends on ARCH_DAVINCI
215 select DMA_VIRTUAL_CHANNELS
218 Enable support for the TI EDMA controller. This DMA
219 engine is found on TI DaVinci and AM33xx parts.
221 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
225 tristate "DMA API Driver for PL330"
229 Select if your platform has one or more PL330 DMACs.
230 You need to provide platform specific settings via
231 platform_data for a dma-pl330 device.
234 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
235 depends on PCI && X86
238 Enable support for Intel EG20T PCH DMA engine.
240 This driver also can be used for LAPIS Semiconductor IOH(Input/
241 Output Hub), ML7213, ML7223 and ML7831.
242 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
243 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
244 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
245 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
248 tristate "i.MX SDMA support"
252 Support the i.MX SDMA engine. This engine is integrated into
253 Freescale i.MX25/31/35/51/53 chips.
256 tristate "i.MX DMA support"
260 Support the i.MX DMA engine. This engine is integrated into
261 Freescale i.MX1/21/27 chips.
264 bool "MXS DMA support"
265 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
269 Support the MXS DMA engine. This engine including APBH-DMA
270 and APBX-DMA is integrated into Freescale i.MX23/28 chips.
273 bool "Cirrus Logic EP93xx DMA support"
274 depends on ARCH_EP93XX
277 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
280 tristate "SA-11x0 DMA support"
281 depends on ARCH_SA1100
283 select DMA_VIRTUAL_CHANNELS
285 Support the DMA engine found on Intel StrongARM SA-1100 and
286 SA-1110 SoCs. This DMA engine can only be used with on-chip
290 bool "MMP Two-Channel DMA support"
294 Support the MMP Two-Channel DMA engine.
295 This engine used for MMP Audio DMA and pxa910 SQU.
297 Say Y here if you enabled MMP ADMA, otherwise say N.
300 tristate "OMAP DMA support"
303 select DMA_VIRTUAL_CHANNELS
306 bool "MMP PDMA support"
307 depends on (ARCH_MMP || ARCH_PXA)
310 Support the MMP PDMA engine for PXA and MMP platfrom.
315 config DMA_VIRTUAL_CHANNELS
318 comment "DMA Clients"
319 depends on DMA_ENGINE
322 bool "Network: TCP receive copy offload"
323 depends on DMA_ENGINE && NET
324 default (INTEL_IOATDMA || FSL_DMA)
326 This enables the use of DMA engines in the network stack to
327 offload receive copy-to-user operations, freeing CPU cycles.
329 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
333 bool "Async_tx: Offload support for the async_tx api"
334 depends on DMA_ENGINE
336 This allows the async_tx api to take advantage of offload engines for
337 memcpy, memset, xor, and raid6 p+q operations. If your platform has
338 a dma engine that can perform raid operations and you have enabled
344 tristate "DMA Test client"
345 depends on DMA_ENGINE
347 Simple DMA test client. Say N unless you're debugging a