2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
45 Say Y here if you have such a chipset.
49 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
53 bool "ARM PrimeCell PL080 or PL081 support"
54 depends on ARM_AMBA && EXPERIMENTAL
57 Platform has a PL08x DMAC device
58 which can provide DMA engine support
61 tristate "Intel I/OAT DMA support"
65 select ASYNC_TX_DISABLE_PQ_VAL_DMA
66 select ASYNC_TX_DISABLE_XOR_VAL_DMA
68 Enable support for the Intel(R) I/OAT DMA engine present
69 in recent Intel Xeon chipsets.
71 Say Y here if you have such a chipset.
76 tristate "Intel IOP ADMA support"
77 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
79 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
81 Enable support for the Intel(R) IOP Series RAID engines.
84 tristate "Synopsys DesignWare AHB DMA support"
87 default y if CPU_AT32AP7000
89 Support the Synopsys DesignWare AHB DMA controller. This
90 can be integrated in chips such as the Atmel AT32ap7000.
93 tristate "Atmel AHB DMA support"
97 Support the Atmel AHB DMA controller.
100 tristate "Freescale Elo and Elo Plus DMA support"
103 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
105 Enable support for the Freescale Elo and Elo Plus DMA controllers.
106 The Elo is the DMA controller on some 82xx and 83xx parts, and the
107 Elo Plus is the DMA controller on 85xx and 86xx parts.
110 tristate "Freescale MPC512x built-in DMA engine support"
111 depends on PPC_MPC512x || PPC_MPC831x
114 Enable support for the Freescale MPC512x built-in DMA engine.
117 bool "Marvell XOR engine support"
118 depends on PLAT_ORION
120 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
122 Enable support for the Marvell XOR engine.
125 bool "MX3x Image Processing Unit support"
130 If you plan to use the Image Processing unit in the i.MX3x, say
131 Y here. If unsure, select Y.
134 int "Number of dynamically mapped interrupts for IPU"
139 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
140 To avoid bloating the irq_desc[] array we allocate a sufficient
141 number of IRQ slots and map them dynamically to specific sources.
144 tristate "Toshiba TXx9 SoC DMA support"
145 depends on MACH_TX49XX || MACH_TX39XX
148 Support the TXx9 SoC internal DMA controller. This can be
149 integrated in chips such as the Toshiba TX4927/38/39.
151 config TEGRA20_APB_DMA
152 bool "NVIDIA Tegra20 APB DMA support"
153 depends on ARCH_TEGRA
156 Support for the NVIDIA Tegra20 APB DMA controller driver. The
157 DMA controller is having multiple DMA channel which can be
158 configured for different peripherals like audio, UART, SPI,
159 I2C etc which is in APB bus.
160 This DMA controller transfers data from memory to peripheral fifo
161 or vice versa. It does not support memory to memory data transfer.
166 tristate "Renesas SuperH DMAC support"
167 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
168 depends on !SH_DMA_API
171 Enable support for the Renesas SuperH DMA controllers.
174 bool "ST-Ericsson COH901318 DMA support"
178 Enable support for ST-Ericsson COH 901 318 DMA.
181 bool "ST-Ericsson DMA40 support"
182 depends on ARCH_U8500
185 Support for ST-Ericsson DMA40 controller
187 config AMCC_PPC440SPE_ADMA
188 tristate "AMCC PPC440SPe ADMA support"
189 depends on 440SPe || 440SP
191 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
192 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
194 Enable support for the AMCC PPC440SPe RAID engines.
197 tristate "Timberdale FPGA DMA support"
198 depends on MFD_TIMBERDALE || HAS_IOMEM
201 Enable support for the Timberdale FPGA DMA engine.
204 tristate "CSR SiRFprimaII DMA support"
205 depends on ARCH_PRIMA2
208 Enable support for the CSR SiRFprimaII DMA engine.
210 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
214 tristate "DMA API Driver for PL330"
218 Select if your platform has one or more PL330 DMACs.
219 You need to provide platform specific settings via
220 platform_data for a dma-pl330 device.
223 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
224 depends on PCI && X86
227 Enable support for Intel EG20T PCH DMA engine.
229 This driver also can be used for LAPIS Semiconductor IOH(Input/
230 Output Hub), ML7213, ML7223 and ML7831.
231 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
232 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
233 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
234 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
237 tristate "i.MX SDMA support"
241 Support the i.MX SDMA engine. This engine is integrated into
242 Freescale i.MX25/31/35/51/53 chips.
245 tristate "i.MX DMA support"
249 Support the i.MX DMA engine. This engine is integrated into
250 Freescale i.MX1/21/27 chips.
253 bool "MXS DMA support"
254 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
258 Support the MXS DMA engine. This engine including APBH-DMA
259 and APBX-DMA is integrated into Freescale i.MX23/28 chips.
262 bool "Cirrus Logic EP93xx DMA support"
263 depends on ARCH_EP93XX
266 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
269 tristate "SA-11x0 DMA support"
270 depends on ARCH_SA1100
273 Support the DMA engine found on Intel StrongARM SA-1100 and
274 SA-1110 SoCs. This DMA engine can only be used with on-chip
278 bool "MMP Two-Channel DMA support"
282 Support the MMP Two-Channel DMA engine.
283 This engine used for MMP Audio DMA and pxa910 SQU.
285 Say Y here if you enabled MMP ADMA, otherwise say N.
290 comment "DMA Clients"
291 depends on DMA_ENGINE
294 bool "Network: TCP receive copy offload"
295 depends on DMA_ENGINE && NET
296 default (INTEL_IOATDMA || FSL_DMA)
298 This enables the use of DMA engines in the network stack to
299 offload receive copy-to-user operations, freeing CPU cycles.
301 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
305 bool "Async_tx: Offload support for the async_tx api"
306 depends on DMA_ENGINE
308 This allows the async_tx api to take advantage of offload engines for
309 memcpy, memset, xor, and raid6 p+q operations. If your platform has
310 a dma engine that can perform raid operations and you have enabled
316 tristate "DMA Test client"
317 depends on DMA_ENGINE
319 Simple DMA test client. Say N unless you're debugging a