2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
45 Say Y here if you have such a chipset.
49 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
53 bool "ARM PrimeCell PL080 or PL081 support"
56 select DMA_VIRTUAL_CHANNELS
58 Platform has a PL08x DMAC device
59 which can provide DMA engine support
62 tristate "Intel I/OAT DMA support"
66 select ASYNC_TX_DISABLE_PQ_VAL_DMA
67 select ASYNC_TX_DISABLE_XOR_VAL_DMA
69 Enable support for the Intel(R) I/OAT DMA engine present
70 in recent Intel Xeon chipsets.
72 Say Y here if you have such a chipset.
77 tristate "Intel IOP ADMA support"
78 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
80 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
82 Enable support for the Intel(R) IOP Series RAID engines.
85 tristate "Synopsys DesignWare AHB DMA support"
86 depends on GENERIC_HARDIRQS
88 default y if CPU_AT32AP7000
90 Support the Synopsys DesignWare AHB DMA controller. This
91 can be integrated in chips such as the Atmel AT32ap7000.
93 config DW_DMAC_BIG_ENDIAN_IO
94 bool "Use big endian I/O register access"
98 Say yes here to use big endian I/O access when reading and writing
99 to the DMA controller registers. This is needed on some platforms,
100 like the Atmel AVR32 architecture.
102 If unsure, use the default setting.
105 tristate "Atmel AHB DMA support"
109 Support the Atmel AHB DMA controller.
112 tristate "Freescale Elo and Elo Plus DMA support"
115 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
117 Enable support for the Freescale Elo and Elo Plus DMA controllers.
118 The Elo is the DMA controller on some 82xx and 83xx parts, and the
119 Elo Plus is the DMA controller on 85xx and 86xx parts.
122 tristate "Freescale MPC512x built-in DMA engine support"
123 depends on PPC_MPC512x || PPC_MPC831x
126 Enable support for the Freescale MPC512x built-in DMA engine.
128 source "drivers/dma/bestcomm/Kconfig"
131 bool "Marvell XOR engine support"
132 depends on PLAT_ORION
134 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
136 Enable support for the Marvell XOR engine.
139 bool "MX3x Image Processing Unit support"
144 If you plan to use the Image Processing unit in the i.MX3x, say
145 Y here. If unsure, select Y.
148 int "Number of dynamically mapped interrupts for IPU"
153 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
154 To avoid bloating the irq_desc[] array we allocate a sufficient
155 number of IRQ slots and map them dynamically to specific sources.
158 tristate "Toshiba TXx9 SoC DMA support"
159 depends on MACH_TX49XX || MACH_TX39XX
162 Support the TXx9 SoC internal DMA controller. This can be
163 integrated in chips such as the Toshiba TX4927/38/39.
165 config TEGRA20_APB_DMA
166 bool "NVIDIA Tegra20 APB DMA support"
167 depends on ARCH_TEGRA
170 Support for the NVIDIA Tegra20 APB DMA controller driver. The
171 DMA controller is having multiple DMA channel which can be
172 configured for different peripherals like audio, UART, SPI,
173 I2C etc which is in APB bus.
174 This DMA controller transfers data from memory to peripheral fifo
175 or vice versa. It does not support memory to memory data transfer.
180 tristate "Renesas SuperH DMAC support"
181 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
182 depends on !SH_DMA_API
185 Enable support for the Renesas SuperH DMA controllers.
188 bool "ST-Ericsson COH901318 DMA support"
192 Enable support for ST-Ericsson COH 901 318 DMA.
195 bool "ST-Ericsson DMA40 support"
196 depends on ARCH_U8500
199 Support for ST-Ericsson DMA40 controller
201 config AMCC_PPC440SPE_ADMA
202 tristate "AMCC PPC440SPe ADMA support"
203 depends on 440SPe || 440SP
205 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
206 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
208 Enable support for the AMCC PPC440SPe RAID engines.
211 tristate "Timberdale FPGA DMA support"
212 depends on MFD_TIMBERDALE || HAS_IOMEM
215 Enable support for the Timberdale FPGA DMA engine.
218 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
222 Enable support for the CSR SiRFprimaII DMA engine.
225 tristate "TI EDMA support"
226 depends on ARCH_DAVINCI
228 select DMA_VIRTUAL_CHANNELS
231 Enable support for the TI EDMA controller. This DMA
232 engine is found on TI DaVinci and AM33xx parts.
234 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
238 tristate "DMA API Driver for PL330"
242 Select if your platform has one or more PL330 DMACs.
243 You need to provide platform specific settings via
244 platform_data for a dma-pl330 device.
247 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
248 depends on PCI && X86
251 Enable support for Intel EG20T PCH DMA engine.
253 This driver also can be used for LAPIS Semiconductor IOH(Input/
254 Output Hub), ML7213, ML7223 and ML7831.
255 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
256 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
257 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
258 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
261 tristate "i.MX SDMA support"
265 Support the i.MX SDMA engine. This engine is integrated into
266 Freescale i.MX25/31/35/51/53 chips.
269 tristate "i.MX DMA support"
273 Support the i.MX DMA engine. This engine is integrated into
274 Freescale i.MX1/21/27 chips.
277 bool "MXS DMA support"
278 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
282 Support the MXS DMA engine. This engine including APBH-DMA
283 and APBX-DMA is integrated into Freescale i.MX23/28 chips.
286 bool "Cirrus Logic EP93xx DMA support"
287 depends on ARCH_EP93XX
290 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
293 tristate "SA-11x0 DMA support"
294 depends on ARCH_SA1100
296 select DMA_VIRTUAL_CHANNELS
298 Support the DMA engine found on Intel StrongARM SA-1100 and
299 SA-1110 SoCs. This DMA engine can only be used with on-chip
303 bool "MMP Two-Channel DMA support"
307 Support the MMP Two-Channel DMA engine.
308 This engine used for MMP Audio DMA and pxa910 SQU.
310 Say Y here if you enabled MMP ADMA, otherwise say N.
313 tristate "OMAP DMA support"
316 select DMA_VIRTUAL_CHANNELS
319 bool "MMP PDMA support"
320 depends on (ARCH_MMP || ARCH_PXA)
323 Support the MMP PDMA engine for PXA and MMP platfrom.
328 config DMA_VIRTUAL_CHANNELS
335 comment "DMA Clients"
336 depends on DMA_ENGINE
339 bool "Network: TCP receive copy offload"
340 depends on DMA_ENGINE && NET
341 default (INTEL_IOATDMA || FSL_DMA)
343 This enables the use of DMA engines in the network stack to
344 offload receive copy-to-user operations, freeing CPU cycles.
346 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
350 bool "Async_tx: Offload support for the async_tx api"
351 depends on DMA_ENGINE
353 This allows the async_tx api to take advantage of offload engines for
354 memcpy, memset, xor, and raid6 p+q operations. If your platform has
355 a dma engine that can perform raid operations and you have enabled
361 tristate "DMA Test client"
362 depends on DMA_ENGINE
364 Simple DMA test client. Say N unless you're debugging a