2 * Intel I/OAT DMA Linux driver
3 * Copyright(c) 2007 - 2009 Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in
15 * the file called "COPYING".
19 #include <linux/kernel.h>
20 #include <linux/pci.h>
21 #include <linux/smp.h>
22 #include <linux/interrupt.h>
23 #include <linux/dca.h>
25 /* either a kernel change is needed, or we need something like this in kernel */
28 #undef cpu_physical_id
29 #define cpu_physical_id(cpu) (cpuid_ebx(1) >> 24)
33 #include "registers.h"
37 * Bit 7 of a tag map entry is the "valid" bit, if it is set then bits 0:6
38 * contain the bit number of the APIC ID to map into the DCA tag. If the valid
39 * bit is not set, then the value must be 0 or 1 and defines the bit in the tag.
41 #define DCA_TAG_MAP_VALID 0x80
43 #define DCA3_TAG_MAP_BIT_TO_INV 0x80
44 #define DCA3_TAG_MAP_BIT_TO_SEL 0x40
45 #define DCA3_TAG_MAP_LITERAL_VAL 0x1
47 #define DCA_TAG_MAP_MASK 0xDF
49 /* expected tag map bytes for I/OAT ver.2 */
50 #define DCA2_TAG_MAP_BYTE0 0x80
51 #define DCA2_TAG_MAP_BYTE1 0x0
52 #define DCA2_TAG_MAP_BYTE2 0x81
53 #define DCA2_TAG_MAP_BYTE3 0x82
54 #define DCA2_TAG_MAP_BYTE4 0x82
56 /* verify if tag map matches expected values */
57 static inline int dca2_tag_map_valid(u8 *tag_map)
59 return ((tag_map[0] == DCA2_TAG_MAP_BYTE0) &&
60 (tag_map[1] == DCA2_TAG_MAP_BYTE1) &&
61 (tag_map[2] == DCA2_TAG_MAP_BYTE2) &&
62 (tag_map[3] == DCA2_TAG_MAP_BYTE3) &&
63 (tag_map[4] == DCA2_TAG_MAP_BYTE4));
67 * "Legacy" DCA systems do not implement the DCA register set in the
68 * I/OAT device. Software needs direct support for their tag mappings.
71 #define APICID_BIT(x) (DCA_TAG_MAP_VALID | (x))
72 #define IOAT_TAG_MAP_LEN 8
74 static u8 ioat_tag_map_BNB[IOAT_TAG_MAP_LEN] = {
75 1, APICID_BIT(1), APICID_BIT(2), APICID_BIT(2), };
76 static u8 ioat_tag_map_SCNB[IOAT_TAG_MAP_LEN] = {
77 1, APICID_BIT(1), APICID_BIT(2), APICID_BIT(2), };
78 static u8 ioat_tag_map_CNB[IOAT_TAG_MAP_LEN] = {
79 1, APICID_BIT(1), APICID_BIT(3), APICID_BIT(4), APICID_BIT(2), };
80 static u8 ioat_tag_map_UNISYS[IOAT_TAG_MAP_LEN] = { 0 };
82 /* pack PCI B/D/F into a u16 */
83 static inline u16 dcaid_from_pcidev(struct pci_dev *pci)
85 return (pci->bus->number << 8) | pci->devfn;
88 static int dca_enabled_in_bios(struct pci_dev *pdev)
90 /* CPUID level 9 returns DCA configuration */
91 /* Bit 0 indicates DCA enabled by the BIOS */
92 unsigned long cpuid_level_9;
95 cpuid_level_9 = cpuid_eax(9);
96 res = test_bit(0, &cpuid_level_9);
98 dev_dbg(&pdev->dev, "DCA is disabled in BIOS\n");
103 int system_has_dca_enabled(struct pci_dev *pdev)
105 if (boot_cpu_has(X86_FEATURE_DCA))
106 return dca_enabled_in_bios(pdev);
108 dev_dbg(&pdev->dev, "boot cpu doesn't have X86_FEATURE_DCA\n");
112 struct ioat_dca_slot {
113 struct pci_dev *pdev; /* requester device */
114 u16 rid; /* requester id, as used by IOAT */
117 #define IOAT_DCA_MAX_REQ 6
118 #define IOAT3_DCA_MAX_REQ 2
120 struct ioat_dca_priv {
121 void __iomem *iobase;
122 void __iomem *dca_base;
125 u8 tag_map[IOAT_TAG_MAP_LEN];
126 struct ioat_dca_slot req_slots[0];
129 /* 5000 series chipset DCA Port Requester ID Table Entry Format
130 * [15:8] PCI-Express Bus Number
131 * [7:3] PCI-Express Device Number
132 * [2:0] PCI-Express Function Number
134 * 5000 series chipset DCA control register format
136 * [0] Ignore Function Number
139 static int ioat_dca_add_requester(struct dca_provider *dca, struct device *dev)
141 struct ioat_dca_priv *ioatdca = dca_priv(dca);
142 struct pci_dev *pdev;
146 /* This implementation only supports PCI-Express */
147 if (!dev_is_pci(dev))
149 pdev = to_pci_dev(dev);
150 id = dcaid_from_pcidev(pdev);
152 if (ioatdca->requester_count == ioatdca->max_requesters)
155 for (i = 0; i < ioatdca->max_requesters; i++) {
156 if (ioatdca->req_slots[i].pdev == NULL) {
157 /* found an empty slot */
158 ioatdca->requester_count++;
159 ioatdca->req_slots[i].pdev = pdev;
160 ioatdca->req_slots[i].rid = id;
161 writew(id, ioatdca->dca_base + (i * 4));
162 /* make sure the ignore function bit is off */
163 writeb(0, ioatdca->dca_base + (i * 4) + 2);
167 /* Error, ioatdma->requester_count is out of whack */
171 static int ioat_dca_remove_requester(struct dca_provider *dca,
174 struct ioat_dca_priv *ioatdca = dca_priv(dca);
175 struct pci_dev *pdev;
178 /* This implementation only supports PCI-Express */
179 if (!dev_is_pci(dev))
181 pdev = to_pci_dev(dev);
183 for (i = 0; i < ioatdca->max_requesters; i++) {
184 if (ioatdca->req_slots[i].pdev == pdev) {
185 writew(0, ioatdca->dca_base + (i * 4));
186 ioatdca->req_slots[i].pdev = NULL;
187 ioatdca->req_slots[i].rid = 0;
188 ioatdca->requester_count--;
195 static u8 ioat_dca_get_tag(struct dca_provider *dca,
199 struct ioat_dca_priv *ioatdca = dca_priv(dca);
200 int i, apic_id, bit, value;
204 apic_id = cpu_physical_id(cpu);
206 for (i = 0; i < IOAT_TAG_MAP_LEN; i++) {
207 entry = ioatdca->tag_map[i];
208 if (entry & DCA_TAG_MAP_VALID) {
209 bit = entry & ~DCA_TAG_MAP_VALID;
210 value = (apic_id & (1 << bit)) ? 1 : 0;
212 value = entry ? 1 : 0;
219 static int ioat_dca_dev_managed(struct dca_provider *dca,
222 struct ioat_dca_priv *ioatdca = dca_priv(dca);
223 struct pci_dev *pdev;
226 pdev = to_pci_dev(dev);
227 for (i = 0; i < ioatdca->max_requesters; i++) {
228 if (ioatdca->req_slots[i].pdev == pdev)
234 static struct dca_ops ioat_dca_ops = {
235 .add_requester = ioat_dca_add_requester,
236 .remove_requester = ioat_dca_remove_requester,
237 .get_tag = ioat_dca_get_tag,
238 .dev_managed = ioat_dca_dev_managed,
242 struct dca_provider *ioat_dca_init(struct pci_dev *pdev, void __iomem *iobase)
244 struct dca_provider *dca;
245 struct ioat_dca_priv *ioatdca;
252 if (!system_has_dca_enabled(pdev))
255 /* I/OAT v1 systems must have a known tag_map to support DCA */
256 switch (pdev->vendor) {
257 case PCI_VENDOR_ID_INTEL:
258 switch (pdev->device) {
259 case PCI_DEVICE_ID_INTEL_IOAT:
260 tag_map = ioat_tag_map_BNB;
262 case PCI_DEVICE_ID_INTEL_IOAT_CNB:
263 tag_map = ioat_tag_map_CNB;
265 case PCI_DEVICE_ID_INTEL_IOAT_SCNB:
266 tag_map = ioat_tag_map_SCNB;
270 case PCI_VENDOR_ID_UNISYS:
271 switch (pdev->device) {
272 case PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR:
273 tag_map = ioat_tag_map_UNISYS;
281 version = readb(iobase + IOAT_VER_OFFSET);
282 if (version == IOAT_VER_3_0)
283 max_requesters = IOAT3_DCA_MAX_REQ;
285 max_requesters = IOAT_DCA_MAX_REQ;
287 dca = alloc_dca_provider(&ioat_dca_ops,
289 (sizeof(struct ioat_dca_slot) * max_requesters));
293 ioatdca = dca_priv(dca);
294 ioatdca->max_requesters = max_requesters;
295 ioatdca->dca_base = iobase + 0x54;
297 /* copy over the APIC ID to DCA tag mapping */
298 for (i = 0; i < IOAT_TAG_MAP_LEN; i++)
299 ioatdca->tag_map[i] = tag_map[i];
301 err = register_dca_provider(dca, &pdev->dev);
303 free_dca_provider(dca);
311 static int ioat2_dca_add_requester(struct dca_provider *dca, struct device *dev)
313 struct ioat_dca_priv *ioatdca = dca_priv(dca);
314 struct pci_dev *pdev;
317 u16 global_req_table;
319 /* This implementation only supports PCI-Express */
320 if (!dev_is_pci(dev))
322 pdev = to_pci_dev(dev);
323 id = dcaid_from_pcidev(pdev);
325 if (ioatdca->requester_count == ioatdca->max_requesters)
328 for (i = 0; i < ioatdca->max_requesters; i++) {
329 if (ioatdca->req_slots[i].pdev == NULL) {
330 /* found an empty slot */
331 ioatdca->requester_count++;
332 ioatdca->req_slots[i].pdev = pdev;
333 ioatdca->req_slots[i].rid = id;
335 readw(ioatdca->dca_base + IOAT_DCA_GREQID_OFFSET);
336 writel(id | IOAT_DCA_GREQID_VALID,
337 ioatdca->iobase + global_req_table + (i * 4));
341 /* Error, ioatdma->requester_count is out of whack */
345 static int ioat2_dca_remove_requester(struct dca_provider *dca,
348 struct ioat_dca_priv *ioatdca = dca_priv(dca);
349 struct pci_dev *pdev;
351 u16 global_req_table;
353 /* This implementation only supports PCI-Express */
354 if (!dev_is_pci(dev))
356 pdev = to_pci_dev(dev);
358 for (i = 0; i < ioatdca->max_requesters; i++) {
359 if (ioatdca->req_slots[i].pdev == pdev) {
361 readw(ioatdca->dca_base + IOAT_DCA_GREQID_OFFSET);
362 writel(0, ioatdca->iobase + global_req_table + (i * 4));
363 ioatdca->req_slots[i].pdev = NULL;
364 ioatdca->req_slots[i].rid = 0;
365 ioatdca->requester_count--;
372 static u8 ioat2_dca_get_tag(struct dca_provider *dca,
378 tag = ioat_dca_get_tag(dca, dev, cpu);
383 static struct dca_ops ioat2_dca_ops = {
384 .add_requester = ioat2_dca_add_requester,
385 .remove_requester = ioat2_dca_remove_requester,
386 .get_tag = ioat2_dca_get_tag,
387 .dev_managed = ioat_dca_dev_managed,
390 static int ioat2_dca_count_dca_slots(void __iomem *iobase, u16 dca_offset)
394 u16 global_req_table;
396 global_req_table = readw(iobase + dca_offset + IOAT_DCA_GREQID_OFFSET);
397 if (global_req_table == 0)
400 req = readl(iobase + global_req_table + (slots * sizeof(u32)));
402 } while ((req & IOAT_DCA_GREQID_LASTID) == 0);
407 struct dca_provider *ioat2_dca_init(struct pci_dev *pdev, void __iomem *iobase)
409 struct dca_provider *dca;
410 struct ioat_dca_priv *ioatdca;
420 if (!system_has_dca_enabled(pdev))
423 dca_offset = readw(iobase + IOAT_DCAOFFSET_OFFSET);
427 slots = ioat2_dca_count_dca_slots(iobase, dca_offset);
431 dca = alloc_dca_provider(&ioat2_dca_ops,
433 + (sizeof(struct ioat_dca_slot) * slots));
437 ioatdca = dca_priv(dca);
438 ioatdca->iobase = iobase;
439 ioatdca->dca_base = iobase + dca_offset;
440 ioatdca->max_requesters = slots;
442 /* some bios might not know to turn these on */
443 csi_fsb_control = readw(ioatdca->dca_base + IOAT_FSB_CAP_ENABLE_OFFSET);
444 if ((csi_fsb_control & IOAT_FSB_CAP_ENABLE_PREFETCH) == 0) {
445 csi_fsb_control |= IOAT_FSB_CAP_ENABLE_PREFETCH;
446 writew(csi_fsb_control,
447 ioatdca->dca_base + IOAT_FSB_CAP_ENABLE_OFFSET);
449 pcie_control = readw(ioatdca->dca_base + IOAT_PCI_CAP_ENABLE_OFFSET);
450 if ((pcie_control & IOAT_PCI_CAP_ENABLE_MEMWR) == 0) {
451 pcie_control |= IOAT_PCI_CAP_ENABLE_MEMWR;
453 ioatdca->dca_base + IOAT_PCI_CAP_ENABLE_OFFSET);
457 /* TODO version, compatibility and configuration checks */
459 /* copy out the APIC to DCA tag map */
460 tag_map = readl(ioatdca->dca_base + IOAT_APICID_TAG_MAP_OFFSET);
461 for (i = 0; i < 5; i++) {
462 bit = (tag_map >> (4 * i)) & 0x0f;
464 ioatdca->tag_map[i] = bit | DCA_TAG_MAP_VALID;
466 ioatdca->tag_map[i] = 0;
469 if (!dca2_tag_map_valid(ioatdca->tag_map)) {
470 WARN_TAINT_ONCE(1, TAINT_FIRMWARE_WORKAROUND,
471 "%s %s: APICID_TAG_MAP set incorrectly by BIOS, disabling DCA\n",
472 dev_driver_string(&pdev->dev),
473 dev_name(&pdev->dev));
474 free_dca_provider(dca);
478 err = register_dca_provider(dca, &pdev->dev);
480 free_dca_provider(dca);
487 static int ioat3_dca_add_requester(struct dca_provider *dca, struct device *dev)
489 struct ioat_dca_priv *ioatdca = dca_priv(dca);
490 struct pci_dev *pdev;
493 u16 global_req_table;
495 /* This implementation only supports PCI-Express */
496 if (!dev_is_pci(dev))
498 pdev = to_pci_dev(dev);
499 id = dcaid_from_pcidev(pdev);
501 if (ioatdca->requester_count == ioatdca->max_requesters)
504 for (i = 0; i < ioatdca->max_requesters; i++) {
505 if (ioatdca->req_slots[i].pdev == NULL) {
506 /* found an empty slot */
507 ioatdca->requester_count++;
508 ioatdca->req_slots[i].pdev = pdev;
509 ioatdca->req_slots[i].rid = id;
511 readw(ioatdca->dca_base + IOAT3_DCA_GREQID_OFFSET);
512 writel(id | IOAT_DCA_GREQID_VALID,
513 ioatdca->iobase + global_req_table + (i * 4));
517 /* Error, ioatdma->requester_count is out of whack */
521 static int ioat3_dca_remove_requester(struct dca_provider *dca,
524 struct ioat_dca_priv *ioatdca = dca_priv(dca);
525 struct pci_dev *pdev;
527 u16 global_req_table;
529 /* This implementation only supports PCI-Express */
530 if (!dev_is_pci(dev))
532 pdev = to_pci_dev(dev);
534 for (i = 0; i < ioatdca->max_requesters; i++) {
535 if (ioatdca->req_slots[i].pdev == pdev) {
537 readw(ioatdca->dca_base + IOAT3_DCA_GREQID_OFFSET);
538 writel(0, ioatdca->iobase + global_req_table + (i * 4));
539 ioatdca->req_slots[i].pdev = NULL;
540 ioatdca->req_slots[i].rid = 0;
541 ioatdca->requester_count--;
548 static u8 ioat3_dca_get_tag(struct dca_provider *dca,
554 struct ioat_dca_priv *ioatdca = dca_priv(dca);
555 int i, apic_id, bit, value;
559 apic_id = cpu_physical_id(cpu);
561 for (i = 0; i < IOAT_TAG_MAP_LEN; i++) {
562 entry = ioatdca->tag_map[i];
563 if (entry & DCA3_TAG_MAP_BIT_TO_SEL) {
565 ~(DCA3_TAG_MAP_BIT_TO_SEL | DCA3_TAG_MAP_BIT_TO_INV);
566 value = (apic_id & (1 << bit)) ? 1 : 0;
567 } else if (entry & DCA3_TAG_MAP_BIT_TO_INV) {
568 bit = entry & ~DCA3_TAG_MAP_BIT_TO_INV;
569 value = (apic_id & (1 << bit)) ? 0 : 1;
571 value = (entry & DCA3_TAG_MAP_LITERAL_VAL) ? 1 : 0;
579 static struct dca_ops ioat3_dca_ops = {
580 .add_requester = ioat3_dca_add_requester,
581 .remove_requester = ioat3_dca_remove_requester,
582 .get_tag = ioat3_dca_get_tag,
583 .dev_managed = ioat_dca_dev_managed,
586 static int ioat3_dca_count_dca_slots(void *iobase, u16 dca_offset)
590 u16 global_req_table;
592 global_req_table = readw(iobase + dca_offset + IOAT3_DCA_GREQID_OFFSET);
593 if (global_req_table == 0)
597 req = readl(iobase + global_req_table + (slots * sizeof(u32)));
599 } while ((req & IOAT_DCA_GREQID_LASTID) == 0);
604 static inline int dca3_tag_map_invalid(u8 *tag_map)
607 * If the tag map is not programmed by the BIOS the default is:
608 * 0x80 0x80 0x80 0x80 0x80 0x00 0x00 0x00
610 * This an invalid map and will result in only 2 possible tags
611 * 0x1F and 0x00. 0x00 is an invalid DCA tag so we know that
612 * this entire definition is invalid.
614 return ((tag_map[0] == DCA_TAG_MAP_VALID) &&
615 (tag_map[1] == DCA_TAG_MAP_VALID) &&
616 (tag_map[2] == DCA_TAG_MAP_VALID) &&
617 (tag_map[3] == DCA_TAG_MAP_VALID) &&
618 (tag_map[4] == DCA_TAG_MAP_VALID));
621 struct dca_provider *ioat3_dca_init(struct pci_dev *pdev, void __iomem *iobase)
623 struct dca_provider *dca;
624 struct ioat_dca_priv *ioatdca;
641 if (!system_has_dca_enabled(pdev))
644 dca_offset = readw(iobase + IOAT_DCAOFFSET_OFFSET);
648 slots = ioat3_dca_count_dca_slots(iobase, dca_offset);
652 dca = alloc_dca_provider(&ioat3_dca_ops,
654 + (sizeof(struct ioat_dca_slot) * slots));
658 ioatdca = dca_priv(dca);
659 ioatdca->iobase = iobase;
660 ioatdca->dca_base = iobase + dca_offset;
661 ioatdca->max_requesters = slots;
663 /* some bios might not know to turn these on */
664 csi_fsb_control = readw(ioatdca->dca_base + IOAT3_CSI_CONTROL_OFFSET);
665 if ((csi_fsb_control & IOAT3_CSI_CONTROL_PREFETCH) == 0) {
666 csi_fsb_control |= IOAT3_CSI_CONTROL_PREFETCH;
667 writew(csi_fsb_control,
668 ioatdca->dca_base + IOAT3_CSI_CONTROL_OFFSET);
670 pcie_control = readw(ioatdca->dca_base + IOAT3_PCI_CONTROL_OFFSET);
671 if ((pcie_control & IOAT3_PCI_CONTROL_MEMWR) == 0) {
672 pcie_control |= IOAT3_PCI_CONTROL_MEMWR;
674 ioatdca->dca_base + IOAT3_PCI_CONTROL_OFFSET);
678 /* TODO version, compatibility and configuration checks */
680 /* copy out the APIC to DCA tag map */
682 readl(ioatdca->dca_base + IOAT3_APICID_TAG_MAP_OFFSET_LOW);
684 readl(ioatdca->dca_base + IOAT3_APICID_TAG_MAP_OFFSET_HIGH);
685 for (i = 0; i < 8; i++) {
686 bit = tag_map.full >> (8 * i);
687 ioatdca->tag_map[i] = bit & DCA_TAG_MAP_MASK;
690 if (dca3_tag_map_invalid(ioatdca->tag_map)) {
691 WARN_TAINT_ONCE(1, TAINT_FIRMWARE_WORKAROUND,
692 "%s %s: APICID_TAG_MAP set incorrectly by BIOS, disabling DCA\n",
693 dev_driver_string(&pdev->dev),
694 dev_name(&pdev->dev));
695 free_dca_provider(dca);
699 err = register_dca_provider(dca, &pdev->dev);
701 free_dca_provider(dca);