2 * Intel 82860 Memory Controller kernel module
3 * (C) 2005 Red Hat (http://www.redhat.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
7 * Written by Ben Woodard <woodard@redhat.com>
8 * shamelessly copied from and based upon the edac_i82875 driver
9 * by Thayne Harbaugh of Linux Networx. (http://lnxi.com)
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/pci_ids.h>
16 #include <linux/slab.h>
17 #include "edac_core.h"
19 #define I82860_REVISION " Ver: 2.0.2 " __DATE__
20 #define EDAC_MOD_STR "i82860_edac"
22 #define i82860_printk(level, fmt, arg...) \
23 edac_printk(level, "i82860", fmt, ##arg)
25 #define i82860_mc_printk(mci, level, fmt, arg...) \
26 edac_mc_chipset_printk(mci, level, "i82860", fmt, ##arg)
28 #ifndef PCI_DEVICE_ID_INTEL_82860_0
29 #define PCI_DEVICE_ID_INTEL_82860_0 0x2531
30 #endif /* PCI_DEVICE_ID_INTEL_82860_0 */
32 #define I82860_MCHCFG 0x50
33 #define I82860_GBA 0x60
34 #define I82860_GBA_MASK 0x7FF
35 #define I82860_GBA_SHIFT 24
36 #define I82860_ERRSTS 0xC8
37 #define I82860_EAP 0xE4
38 #define I82860_DERRCTL_STS 0xE2
44 struct i82860_dev_info {
48 struct i82860_error_info {
55 static const struct i82860_dev_info i82860_devs[] = {
57 .ctl_name = "i82860"},
60 static struct pci_dev *mci_pdev = NULL; /* init dev: in case that AGP code
61 * has already registered driver
64 static void i82860_get_error_info(struct mem_ctl_info *mci,
65 struct i82860_error_info *info)
69 pdev = to_pci_dev(mci->dev);
72 * This is a mess because there is no atomic way to read all the
73 * registers at once and the registers can transition from CE being
76 pci_read_config_word(pdev, I82860_ERRSTS, &info->errsts);
77 pci_read_config_dword(pdev, I82860_EAP, &info->eap);
78 pci_read_config_word(pdev, I82860_DERRCTL_STS, &info->derrsyn);
79 pci_read_config_word(pdev, I82860_ERRSTS, &info->errsts2);
81 pci_write_bits16(pdev, I82860_ERRSTS, 0x0003, 0x0003);
84 * If the error is the same for both reads then the first set of reads
85 * is valid. If there is a change then there is a CE no info and the
86 * second set of reads is valid and should be UE info.
88 if (!(info->errsts2 & 0x0003))
91 if ((info->errsts ^ info->errsts2) & 0x0003) {
92 pci_read_config_dword(pdev, I82860_EAP, &info->eap);
93 pci_read_config_word(pdev, I82860_DERRCTL_STS, &info->derrsyn);
97 static int i82860_process_error_info(struct mem_ctl_info *mci,
98 struct i82860_error_info *info,
103 if (!(info->errsts2 & 0x0003))
109 if ((info->errsts ^ info->errsts2) & 0x0003) {
110 edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
111 info->errsts = info->errsts2;
114 info->eap >>= PAGE_SHIFT;
115 row = edac_mc_find_csrow_by_page(mci, info->eap);
117 if (info->errsts & 0x0002)
118 edac_mc_handle_ue(mci, info->eap, 0, row, "i82860 UE");
120 edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row, 0,
126 static void i82860_check(struct mem_ctl_info *mci)
128 struct i82860_error_info info;
130 debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
131 i82860_get_error_info(mci, &info);
132 i82860_process_error_info(mci, &info, 1);
135 static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev)
137 unsigned long last_cumul_size;
138 u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */
141 struct csrow_info *csrow;
144 pci_read_config_word(pdev, I82860_MCHCFG, &mchcfg_ddim);
145 mchcfg_ddim = mchcfg_ddim & 0x180;
148 /* The group row boundary (GRA) reg values are boundary address
149 * for each DRAM row with a granularity of 16MB. GRA regs are
150 * cumulative; therefore GRA15 will contain the total memory contained
153 for (index = 0; index < mci->nr_csrows; index++) {
154 csrow = &mci->csrows[index];
155 pci_read_config_word(pdev, I82860_GBA + index * 2, &value);
156 cumul_size = (value & I82860_GBA_MASK) <<
157 (I82860_GBA_SHIFT - PAGE_SHIFT);
158 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
161 if (cumul_size == last_cumul_size)
162 continue; /* not populated */
164 csrow->first_page = last_cumul_size;
165 csrow->last_page = cumul_size - 1;
166 csrow->nr_pages = cumul_size - last_cumul_size;
167 last_cumul_size = cumul_size;
168 csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */
169 csrow->mtype = MEM_RMBS;
170 csrow->dtype = DEV_UNKNOWN;
171 csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;
175 static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
177 struct mem_ctl_info *mci;
178 struct i82860_error_info discard;
180 /* RDRAM has channels but these don't map onto the abstractions that
182 The device groups from the GRA registers seem to map reasonably
183 well onto the notion of a chip select row.
184 There are 16 GRA registers and since the name is associated with
185 the channel and the GRA registers map to physical devices so we are
186 going to make 1 channel for group.
188 mci = edac_mc_alloc(0, 16, 1);
193 debugf3("%s(): init mci\n", __func__);
194 mci->dev = &pdev->dev;
195 mci->mtype_cap = MEM_FLAG_DDR;
196 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
197 /* I"m not sure about this but I think that all RDRAM is SECDED */
198 mci->edac_cap = EDAC_FLAG_SECDED;
199 mci->mod_name = EDAC_MOD_STR;
200 mci->mod_ver = I82860_REVISION;
201 mci->ctl_name = i82860_devs[dev_idx].ctl_name;
202 mci->dev_name = pci_name(pdev);
203 mci->edac_check = i82860_check;
204 mci->ctl_page_to_phys = NULL;
205 i82860_init_csrows(mci, pdev);
206 i82860_get_error_info(mci, &discard); /* clear counters */
208 /* Here we assume that we will never see multiple instances of this
209 * type of memory controller. The ID is therefore hardcoded to 0.
211 if (edac_mc_add_mc(mci, 0)) {
212 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
216 /* get this far and it's successful */
217 debugf3("%s(): success\n", __func__);
226 /* returns count (>= 0), or negative on error */
227 static int __devinit i82860_init_one(struct pci_dev *pdev,
228 const struct pci_device_id *ent)
232 debugf0("%s()\n", __func__);
233 i82860_printk(KERN_INFO, "i82860 init one\n");
235 if (pci_enable_device(pdev) < 0)
238 rc = i82860_probe1(pdev, ent->driver_data);
241 mci_pdev = pci_dev_get(pdev);
246 static void __devexit i82860_remove_one(struct pci_dev *pdev)
248 struct mem_ctl_info *mci;
250 debugf0("%s()\n", __func__);
252 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
258 static const struct pci_device_id i82860_pci_tbl[] __devinitdata = {
260 PCI_VEND_DEV(INTEL, 82860_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
264 } /* 0 terminated list. */
267 MODULE_DEVICE_TABLE(pci, i82860_pci_tbl);
269 static struct pci_driver i82860_driver = {
270 .name = EDAC_MOD_STR,
271 .probe = i82860_init_one,
272 .remove = __devexit_p(i82860_remove_one),
273 .id_table = i82860_pci_tbl,
276 static int __init i82860_init(void)
280 debugf3("%s()\n", __func__);
282 if ((pci_rc = pci_register_driver(&i82860_driver)) < 0)
286 mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
287 PCI_DEVICE_ID_INTEL_82860_0, NULL);
289 if (mci_pdev == NULL) {
290 debugf0("860 pci_get_device fail\n");
295 pci_rc = i82860_init_one(mci_pdev, i82860_pci_tbl);
298 debugf0("860 init fail\n");
307 pci_unregister_driver(&i82860_driver);
310 if (mci_pdev != NULL)
311 pci_dev_put(mci_pdev);
316 static void __exit i82860_exit(void)
318 debugf3("%s()\n", __func__);
320 pci_unregister_driver(&i82860_driver);
322 if (mci_pdev != NULL)
323 pci_dev_put(mci_pdev);
326 module_init(i82860_init);
327 module_exit(i82860_exit);
329 MODULE_LICENSE("GPL");
330 MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com) "
331 "Ben Woodard <woodard@redhat.com>");
332 MODULE_DESCRIPTION("ECC support for Intel 82860 memory hub controllers");