4 * Copyright (C) 2013-2015 Altera Corporation
6 * With code from the mailing list:
7 * Copyright (C) 2013 Xilinx, Inc.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms and conditions of the GNU General Public License,
11 * version 2, as published by the Free Software Foundation.
13 * This program is distributed in the hope it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 * You should have received a copy of the GNU General Public License along with
19 * this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <linux/firmware.h>
22 #include <linux/fpga/fpga-mgr.h>
23 #include <linux/idr.h>
24 #include <linux/module.h>
26 #include <linux/mutex.h>
27 #include <linux/slab.h>
29 static DEFINE_IDA(fpga_mgr_ida);
30 static struct class *fpga_mgr_class;
33 * fpga_mgr_buf_load - load fpga from image in buffer
35 * @flags: flags setting fpga confuration modes
36 * @buf: buffer contain fpga image
37 * @count: byte count of buf
39 * Step the low level fpga manager through the device-specific steps of getting
40 * an FPGA ready to be configured, writing the image to it, then doing whatever
41 * post-configuration steps necessary.
43 * Return: 0 on success, negative error code otherwise.
45 int fpga_mgr_buf_load(struct fpga_manager *mgr, u32 flags, const char *buf,
48 struct device *dev = &mgr->dev;
55 * Call the low level driver's write_init function. This will do the
56 * device-specific things to get the FPGA into the state where it is
57 * ready to receive an FPGA image.
59 mgr->state = FPGA_MGR_STATE_WRITE_INIT;
60 ret = mgr->mops->write_init(mgr, flags, buf, count);
62 dev_err(dev, "Error preparing FPGA for writing\n");
63 mgr->state = FPGA_MGR_STATE_WRITE_INIT_ERR;
68 * Write the FPGA image to the FPGA.
70 mgr->state = FPGA_MGR_STATE_WRITE;
71 ret = mgr->mops->write(mgr, buf, count);
73 dev_err(dev, "Error while writing image data to FPGA\n");
74 mgr->state = FPGA_MGR_STATE_WRITE_ERR;
79 * After all the FPGA image has been written, do the device specific
80 * steps to finish and set the FPGA into operating mode.
82 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE;
83 ret = mgr->mops->write_complete(mgr, flags);
85 dev_err(dev, "Error after writing image data to FPGA\n");
86 mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR;
89 mgr->state = FPGA_MGR_STATE_OPERATING;
93 EXPORT_SYMBOL_GPL(fpga_mgr_buf_load);
96 * fpga_mgr_firmware_load - request firmware and load to fpga
98 * @flags: flags setting fpga confuration modes
99 * @image_name: name of image file on the firmware search path
101 * Request an FPGA image using the firmware class, then write out to the FPGA.
102 * Update the state before each step to provide info on what step failed if
103 * there is a failure.
105 * Return: 0 on success, negative error code otherwise.
107 int fpga_mgr_firmware_load(struct fpga_manager *mgr, u32 flags,
108 const char *image_name)
110 struct device *dev = &mgr->dev;
111 const struct firmware *fw;
117 dev_info(dev, "writing %s to %s\n", image_name, mgr->name);
119 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ;
121 ret = request_firmware(&fw, image_name, dev);
123 mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR;
124 dev_err(dev, "Error requesting firmware %s\n", image_name);
128 ret = fpga_mgr_buf_load(mgr, flags, fw->data, fw->size);
132 release_firmware(fw);
136 EXPORT_SYMBOL_GPL(fpga_mgr_firmware_load);
138 static const char * const state_str[] = {
139 [FPGA_MGR_STATE_UNKNOWN] = "unknown",
140 [FPGA_MGR_STATE_POWER_OFF] = "power off",
141 [FPGA_MGR_STATE_POWER_UP] = "power up",
142 [FPGA_MGR_STATE_RESET] = "reset",
144 /* requesting FPGA image from firmware */
145 [FPGA_MGR_STATE_FIRMWARE_REQ] = "firmware request",
146 [FPGA_MGR_STATE_FIRMWARE_REQ_ERR] = "firmware request error",
148 /* Preparing FPGA to receive image */
149 [FPGA_MGR_STATE_WRITE_INIT] = "write init",
150 [FPGA_MGR_STATE_WRITE_INIT_ERR] = "write init error",
152 /* Writing image to FPGA */
153 [FPGA_MGR_STATE_WRITE] = "write",
154 [FPGA_MGR_STATE_WRITE_ERR] = "write error",
156 /* Finishing configuration after image has been written */
157 [FPGA_MGR_STATE_WRITE_COMPLETE] = "write complete",
158 [FPGA_MGR_STATE_WRITE_COMPLETE_ERR] = "write complete error",
160 /* FPGA reports to be in normal operating mode */
161 [FPGA_MGR_STATE_OPERATING] = "operating",
164 static ssize_t name_show(struct device *dev,
165 struct device_attribute *attr, char *buf)
167 struct fpga_manager *mgr = to_fpga_manager(dev);
169 return sprintf(buf, "%s\n", mgr->name);
172 static ssize_t state_show(struct device *dev,
173 struct device_attribute *attr, char *buf)
175 struct fpga_manager *mgr = to_fpga_manager(dev);
177 return sprintf(buf, "%s\n", state_str[mgr->state]);
180 static DEVICE_ATTR_RO(name);
181 static DEVICE_ATTR_RO(state);
183 static struct attribute *fpga_mgr_attrs[] = {
185 &dev_attr_state.attr,
188 ATTRIBUTE_GROUPS(fpga_mgr);
190 static int fpga_mgr_of_node_match(struct device *dev, const void *data)
192 return dev->of_node == data;
196 * of_fpga_mgr_get - get an exclusive reference to a fpga mgr
199 * Given a device node, get an exclusive reference to a fpga mgr.
201 * Return: fpga manager struct or IS_ERR() condition containing error code.
203 struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
205 struct fpga_manager *mgr;
209 return ERR_PTR(-EINVAL);
211 dev = class_find_device(fpga_mgr_class, NULL, node,
212 fpga_mgr_of_node_match);
214 return ERR_PTR(-ENODEV);
216 mgr = to_fpga_manager(dev);
219 return ERR_PTR(-ENODEV);
221 /* Get exclusive use of fpga manager */
222 if (!mutex_trylock(&mgr->ref_mutex))
223 return ERR_PTR(-EBUSY);
225 if (!try_module_get(THIS_MODULE)) {
226 mutex_unlock(&mgr->ref_mutex);
227 return ERR_PTR(-ENODEV);
232 EXPORT_SYMBOL_GPL(of_fpga_mgr_get);
235 * fpga_mgr_put - release a reference to a fpga manager
236 * @mgr: fpga manager structure
238 void fpga_mgr_put(struct fpga_manager *mgr)
241 module_put(THIS_MODULE);
242 mutex_unlock(&mgr->ref_mutex);
245 EXPORT_SYMBOL_GPL(fpga_mgr_put);
248 * fpga_mgr_register - register a low level fpga manager driver
249 * @dev: fpga manager device from pdev
250 * @name: fpga manager name
251 * @mops: pointer to structure of fpga manager ops
252 * @priv: fpga manager private data
254 * Return: 0 on success, negative error code otherwise.
256 int fpga_mgr_register(struct device *dev, const char *name,
257 const struct fpga_manager_ops *mops,
260 struct fpga_manager *mgr;
261 const char *dt_label;
264 if (!mops || !mops->write_init || !mops->write ||
265 !mops->write_complete || !mops->state) {
266 dev_err(dev, "Attempt to register without fpga_manager_ops\n");
270 if (!name || !strlen(name)) {
271 dev_err(dev, "Attempt to register with no name!\n");
275 mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
279 id = ida_simple_get(&fpga_mgr_ida, 0, 0, GFP_KERNEL);
285 mutex_init(&mgr->ref_mutex);
292 * Initialize framework state by requesting low level driver read state
293 * from device. FPGA may be in reset mode or may have been programmed
294 * by bootloader or EEPROM.
296 mgr->state = mgr->mops->state(mgr);
298 device_initialize(&mgr->dev);
299 mgr->dev.class = fpga_mgr_class;
300 mgr->dev.parent = dev;
301 mgr->dev.of_node = dev->of_node;
303 dev_set_drvdata(dev, mgr);
305 dt_label = of_get_property(mgr->dev.of_node, "label", NULL);
307 ret = dev_set_name(&mgr->dev, "%s", dt_label);
309 ret = dev_set_name(&mgr->dev, "fpga%d", id);
311 ret = device_add(&mgr->dev);
315 dev_info(&mgr->dev, "%s registered\n", mgr->name);
320 ida_simple_remove(&fpga_mgr_ida, id);
326 EXPORT_SYMBOL_GPL(fpga_mgr_register);
329 * fpga_mgr_unregister - unregister a low level fpga manager driver
330 * @dev: fpga manager device from pdev
332 void fpga_mgr_unregister(struct device *dev)
334 struct fpga_manager *mgr = dev_get_drvdata(dev);
336 dev_info(&mgr->dev, "%s %s\n", __func__, mgr->name);
339 * If the low level driver provides a method for putting fpga into
340 * a desired state upon unregister, do it.
342 if (mgr->mops->fpga_remove)
343 mgr->mops->fpga_remove(mgr);
345 device_unregister(&mgr->dev);
347 EXPORT_SYMBOL_GPL(fpga_mgr_unregister);
349 static void fpga_mgr_dev_release(struct device *dev)
351 struct fpga_manager *mgr = to_fpga_manager(dev);
353 ida_simple_remove(&fpga_mgr_ida, mgr->dev.id);
357 static int __init fpga_mgr_class_init(void)
359 pr_info("FPGA manager framework\n");
361 fpga_mgr_class = class_create(THIS_MODULE, "fpga_manager");
362 if (IS_ERR(fpga_mgr_class))
363 return PTR_ERR(fpga_mgr_class);
365 fpga_mgr_class->dev_groups = fpga_mgr_groups;
366 fpga_mgr_class->dev_release = fpga_mgr_dev_release;
371 static void __exit fpga_mgr_class_exit(void)
373 class_destroy(fpga_mgr_class);
374 ida_destroy(&fpga_mgr_ida);
377 MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
378 MODULE_DESCRIPTION("FPGA manager framework");
379 MODULE_LICENSE("GPL v2");
381 subsys_initcall(fpga_mgr_class_init);
382 module_exit(fpga_mgr_class_exit);