2 * Renesas R-Car GPIO Support
4 * Copyright (C) 2013 Magnus Damm
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
21 #include <linux/ioport.h>
22 #include <linux/irq.h>
23 #include <linux/irqdomain.h>
24 #include <linux/module.h>
25 #include <linux/pinctrl/consumer.h>
26 #include <linux/platform_data/gpio-rcar.h>
27 #include <linux/platform_device.h>
28 #include <linux/spinlock.h>
29 #include <linux/slab.h>
31 struct gpio_rcar_priv {
34 struct gpio_rcar_config config;
35 struct platform_device *pdev;
36 struct gpio_chip gpio_chip;
37 struct irq_chip irq_chip;
38 struct irq_domain *irq_domain;
54 static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs)
56 return ioread32(p->base + offs);
59 static inline void gpio_rcar_write(struct gpio_rcar_priv *p, int offs,
62 iowrite32(value, p->base + offs);
65 static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs,
68 u32 tmp = gpio_rcar_read(p, offs);
75 gpio_rcar_write(p, offs, tmp);
78 static void gpio_rcar_irq_disable(struct irq_data *d)
80 struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
82 gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d)));
85 static void gpio_rcar_irq_enable(struct irq_data *d)
87 struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
89 gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d)));
92 static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p,
94 bool active_high_rising_edge,
100 /* follow steps in the GPIO documentation for
101 * "Setting Edge-Sensitive Interrupt Input Mode" and
102 * "Setting Level-Sensitive Interrupt Input Mode"
105 spin_lock_irqsave(&p->lock, flags);
107 /* Configure postive or negative logic in POSNEG */
108 gpio_rcar_modify_bit(p, POSNEG, hwirq, !active_high_rising_edge);
110 /* Configure edge or level trigger in EDGLEVEL */
111 gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger);
113 /* Select one edge or both edges in BOTHEDGE */
114 if (p->config.has_both_edge_trigger)
115 gpio_rcar_modify_bit(p, BOTHEDGE, hwirq, both);
117 /* Select "Interrupt Input Mode" in IOINTSEL */
118 gpio_rcar_modify_bit(p, IOINTSEL, hwirq, true);
120 /* Write INTCLR in case of edge trigger */
122 gpio_rcar_write(p, INTCLR, BIT(hwirq));
124 spin_unlock_irqrestore(&p->lock, flags);
127 static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type)
129 struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
130 unsigned int hwirq = irqd_to_hwirq(d);
132 dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type);
134 switch (type & IRQ_TYPE_SENSE_MASK) {
135 case IRQ_TYPE_LEVEL_HIGH:
136 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true,
139 case IRQ_TYPE_LEVEL_LOW:
140 gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true,
143 case IRQ_TYPE_EDGE_RISING:
144 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
147 case IRQ_TYPE_EDGE_FALLING:
148 gpio_rcar_config_interrupt_input_mode(p, hwirq, false, false,
151 case IRQ_TYPE_EDGE_BOTH:
152 if (!p->config.has_both_edge_trigger)
154 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
163 static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
165 struct gpio_rcar_priv *p = dev_id;
167 unsigned int offset, irqs_handled = 0;
169 while ((pending = gpio_rcar_read(p, INTDT))) {
170 offset = __ffs(pending);
171 gpio_rcar_write(p, INTCLR, BIT(offset));
172 generic_handle_irq(irq_find_mapping(p->irq_domain, offset));
176 return irqs_handled ? IRQ_HANDLED : IRQ_NONE;
179 static inline struct gpio_rcar_priv *gpio_to_priv(struct gpio_chip *chip)
181 return container_of(chip, struct gpio_rcar_priv, gpio_chip);
184 static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip,
188 struct gpio_rcar_priv *p = gpio_to_priv(chip);
191 /* follow steps in the GPIO documentation for
192 * "Setting General Output Mode" and
193 * "Setting General Input Mode"
196 spin_lock_irqsave(&p->lock, flags);
198 /* Configure postive logic in POSNEG */
199 gpio_rcar_modify_bit(p, POSNEG, gpio, false);
201 /* Select "General Input/Output Mode" in IOINTSEL */
202 gpio_rcar_modify_bit(p, IOINTSEL, gpio, false);
204 /* Select Input Mode or Output Mode in INOUTSEL */
205 gpio_rcar_modify_bit(p, INOUTSEL, gpio, output);
207 spin_unlock_irqrestore(&p->lock, flags);
210 static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
212 return pinctrl_request_gpio(chip->base + offset);
215 static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
217 pinctrl_free_gpio(chip->base + offset);
219 /* Set the GPIO as an input to ensure that the next GPIO request won't
220 * drive the GPIO pin as an output.
222 gpio_rcar_config_general_input_output_mode(chip, offset, false);
225 static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)
227 gpio_rcar_config_general_input_output_mode(chip, offset, false);
231 static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset)
233 return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & BIT(offset));
236 static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value)
238 struct gpio_rcar_priv *p = gpio_to_priv(chip);
241 spin_lock_irqsave(&p->lock, flags);
242 gpio_rcar_modify_bit(p, OUTDT, offset, value);
243 spin_unlock_irqrestore(&p->lock, flags);
246 static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset,
249 /* write GPIO value to output before selecting output mode of pin */
250 gpio_rcar_set(chip, offset, value);
251 gpio_rcar_config_general_input_output_mode(chip, offset, true);
255 static int gpio_rcar_to_irq(struct gpio_chip *chip, unsigned offset)
257 return irq_create_mapping(gpio_to_priv(chip)->irq_domain, offset);
260 static int gpio_rcar_irq_domain_map(struct irq_domain *h, unsigned int virq,
263 struct gpio_rcar_priv *p = h->host_data;
265 dev_dbg(&p->pdev->dev, "map hw irq = %d, virq = %d\n", (int)hw, virq);
267 irq_set_chip_data(virq, h->host_data);
268 irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq);
269 set_irq_flags(virq, IRQF_VALID); /* kill me now */
273 static struct irq_domain_ops gpio_rcar_irq_domain_ops = {
274 .map = gpio_rcar_irq_domain_map,
277 static int gpio_rcar_probe(struct platform_device *pdev)
279 struct gpio_rcar_config *pdata = pdev->dev.platform_data;
280 struct gpio_rcar_priv *p;
281 struct resource *io, *irq;
282 struct gpio_chip *gpio_chip;
283 struct irq_chip *irq_chip;
284 const char *name = dev_name(&pdev->dev);
287 p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
289 dev_err(&pdev->dev, "failed to allocate driver data\n");
294 /* deal with driver instance configuration */
299 platform_set_drvdata(pdev, p);
300 spin_lock_init(&p->lock);
302 io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
303 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
306 dev_err(&pdev->dev, "missing IRQ or IOMEM\n");
311 p->base = devm_ioremap_nocache(&pdev->dev, io->start,
314 dev_err(&pdev->dev, "failed to remap I/O memory\n");
319 gpio_chip = &p->gpio_chip;
320 gpio_chip->request = gpio_rcar_request;
321 gpio_chip->free = gpio_rcar_free;
322 gpio_chip->direction_input = gpio_rcar_direction_input;
323 gpio_chip->get = gpio_rcar_get;
324 gpio_chip->direction_output = gpio_rcar_direction_output;
325 gpio_chip->set = gpio_rcar_set;
326 gpio_chip->to_irq = gpio_rcar_to_irq;
327 gpio_chip->label = name;
328 gpio_chip->owner = THIS_MODULE;
329 gpio_chip->base = p->config.gpio_base;
330 gpio_chip->ngpio = p->config.number_of_pins;
332 irq_chip = &p->irq_chip;
333 irq_chip->name = name;
334 irq_chip->irq_mask = gpio_rcar_irq_disable;
335 irq_chip->irq_unmask = gpio_rcar_irq_enable;
336 irq_chip->irq_enable = gpio_rcar_irq_enable;
337 irq_chip->irq_disable = gpio_rcar_irq_disable;
338 irq_chip->irq_set_type = gpio_rcar_irq_set_type;
339 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED;
341 p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
342 p->config.number_of_pins,
344 &gpio_rcar_irq_domain_ops, p);
345 if (!p->irq_domain) {
347 dev_err(&pdev->dev, "cannot initialize irq domain\n");
351 if (devm_request_irq(&pdev->dev, irq->start,
352 gpio_rcar_irq_handler, IRQF_SHARED, name, p)) {
353 dev_err(&pdev->dev, "failed to request IRQ\n");
358 ret = gpiochip_add(gpio_chip);
360 dev_err(&pdev->dev, "failed to add GPIO controller\n");
364 dev_info(&pdev->dev, "driving %d GPIOs\n", p->config.number_of_pins);
366 /* warn in case of mismatch if irq base is specified */
367 if (p->config.irq_base) {
368 ret = irq_find_mapping(p->irq_domain, 0);
369 if (p->config.irq_base != ret)
370 dev_warn(&pdev->dev, "irq base mismatch (%u/%u)\n",
371 p->config.irq_base, ret);
374 ret = gpiochip_add_pin_range(gpio_chip, p->config.pctl_name, 0,
375 gpio_chip->base, gpio_chip->ngpio);
377 dev_warn(&pdev->dev, "failed to add pin range\n");
382 irq_domain_remove(p->irq_domain);
387 static int gpio_rcar_remove(struct platform_device *pdev)
389 struct gpio_rcar_priv *p = platform_get_drvdata(pdev);
392 ret = gpiochip_remove(&p->gpio_chip);
396 irq_domain_remove(p->irq_domain);
400 static struct platform_driver gpio_rcar_device_driver = {
401 .probe = gpio_rcar_probe,
402 .remove = gpio_rcar_remove,
408 module_platform_driver(gpio_rcar_device_driver);
410 MODULE_AUTHOR("Magnus Damm");
411 MODULE_DESCRIPTION("Renesas R-Car GPIO Driver");
412 MODULE_LICENSE("GPL v2");