2 * Copyright 2012 Red Hat Inc.
3 * Parts based on xf86-video-ast
4 * Copyright (c) 2005 ASPEED Technology Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
28 * Authors: Dave Airlie <airlied@redhat.com>
30 #include <linux/export.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_crtc_helper.h>
36 #include "ast_tables.h"
38 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
39 static void ast_i2c_destroy(struct ast_i2c_chan *i2c);
40 static int ast_cursor_set(struct drm_crtc *crtc,
41 struct drm_file *file_priv,
45 static int ast_cursor_move(struct drm_crtc *crtc,
48 static inline void ast_load_palette_index(struct ast_private *ast,
49 u8 index, u8 red, u8 green,
52 ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);
53 ast_io_read8(ast, AST_IO_SEQ_PORT);
54 ast_io_write8(ast, AST_IO_DAC_DATA, red);
55 ast_io_read8(ast, AST_IO_SEQ_PORT);
56 ast_io_write8(ast, AST_IO_DAC_DATA, green);
57 ast_io_read8(ast, AST_IO_SEQ_PORT);
58 ast_io_write8(ast, AST_IO_DAC_DATA, blue);
59 ast_io_read8(ast, AST_IO_SEQ_PORT);
62 static void ast_crtc_load_lut(struct drm_crtc *crtc)
64 struct ast_private *ast = crtc->dev->dev_private;
65 struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
71 for (i = 0; i < 256; i++)
72 ast_load_palette_index(ast, i, ast_crtc->lut_r[i],
73 ast_crtc->lut_g[i], ast_crtc->lut_b[i]);
76 static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode,
77 struct drm_display_mode *adjusted_mode,
78 struct ast_vbios_mode_info *vbios_mode)
80 struct ast_private *ast = crtc->dev->dev_private;
81 u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate;
84 switch (crtc->fb->bits_per_pixel) {
86 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
87 color_index = VGAModeIndex - 1;
90 vbios_mode->std_table = &vbios_stdtable[HiCModeIndex];
91 color_index = HiCModeIndex;
95 vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex];
96 color_index = TrueCModeIndex;
102 switch (crtc->mode.crtc_hdisplay) {
104 vbios_mode->enh_table = &res_640x480[refresh_rate_index];
107 vbios_mode->enh_table = &res_800x600[refresh_rate_index];
110 vbios_mode->enh_table = &res_1024x768[refresh_rate_index];
113 if (crtc->mode.crtc_vdisplay == 800)
114 vbios_mode->enh_table = &res_1280x800[refresh_rate_index];
116 vbios_mode->enh_table = &res_1280x1024[refresh_rate_index];
119 vbios_mode->enh_table = &res_1360x768[refresh_rate_index];
122 vbios_mode->enh_table = &res_1440x900[refresh_rate_index];
125 if (crtc->mode.crtc_vdisplay == 900)
126 vbios_mode->enh_table = &res_1600x900[refresh_rate_index];
128 vbios_mode->enh_table = &res_1600x1200[refresh_rate_index];
131 vbios_mode->enh_table = &res_1680x1050[refresh_rate_index];
134 if (crtc->mode.crtc_vdisplay == 1080)
135 vbios_mode->enh_table = &res_1920x1080[refresh_rate_index];
137 vbios_mode->enh_table = &res_1920x1200[refresh_rate_index];
143 refresh_rate = drm_mode_vrefresh(mode);
144 while (vbios_mode->enh_table->refresh_rate < refresh_rate) {
145 vbios_mode->enh_table++;
146 if ((vbios_mode->enh_table->refresh_rate > refresh_rate) ||
147 (vbios_mode->enh_table->refresh_rate == 0xff)) {
148 vbios_mode->enh_table--;
153 hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
154 vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;
156 adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht;
157 adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder;
158 adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder;
159 adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
160 vbios_mode->enh_table->hfp;
161 adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder +
162 vbios_mode->enh_table->hfp +
163 vbios_mode->enh_table->hsync);
165 adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt;
166 adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder;
167 adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder;
168 adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder +
169 vbios_mode->enh_table->vfp;
170 adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder +
171 vbios_mode->enh_table->vfp +
172 vbios_mode->enh_table->vsync);
174 refresh_rate_index = vbios_mode->enh_table->refresh_rate_index;
175 mode_id = vbios_mode->enh_table->mode_id;
177 if (ast->chip == AST1180) {
180 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0xf) << 4));
181 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);
182 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);
184 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
185 if (vbios_mode->enh_table->flags & NewModeInfo) {
186 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
187 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, crtc->fb->bits_per_pixel);
188 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);
189 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);
190 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);
192 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);
193 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);
201 static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
202 struct ast_vbios_mode_info *vbios_mode)
204 struct ast_private *ast = crtc->dev->dev_private;
205 struct ast_vbios_stdtable *stdtable;
209 stdtable = vbios_mode->std_table;
211 jreg = stdtable->misc;
212 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
215 ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);
216 for (i = 0; i < 4; i++) {
217 jreg = stdtable->seq[i];
220 ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg);
224 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
225 for (i = 0; i < 25; i++)
226 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
229 jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
230 for (i = 0; i < 20; i++) {
231 jreg = stdtable->ar[i];
232 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);
233 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);
235 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);
236 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);
238 jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
239 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);
242 for (i = 0; i < 9; i++)
243 ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);
246 static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
247 struct ast_vbios_mode_info *vbios_mode)
249 struct ast_private *ast = crtc->dev->dev_private;
250 u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
253 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
255 temp = (mode->crtc_htotal >> 3) - 5;
257 jregAC |= 0x01; /* HT D[8] */
258 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);
260 temp = (mode->crtc_hdisplay >> 3) - 1;
262 jregAC |= 0x04; /* HDE D[8] */
263 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);
265 temp = (mode->crtc_hblank_start >> 3) - 1;
267 jregAC |= 0x10; /* HBS D[8] */
268 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);
270 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
272 jreg05 |= 0x80; /* HBE D[5] */
274 jregAD |= 0x01; /* HBE D[5] */
275 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f));
277 temp = (mode->crtc_hsync_start >> 3) - 1;
279 jregAC |= 0x40; /* HRS D[5] */
280 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);
282 temp = ((mode->crtc_hsync_end >> 3) - 1) & 0x3f;
284 jregAD |= 0x04; /* HRE D[5] */
285 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));
287 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);
288 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);
291 temp = (mode->crtc_vtotal) - 2;
298 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);
300 temp = (mode->crtc_vsync_start) - 1;
307 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);
309 temp = (mode->crtc_vsync_end - 1) & 0x3f;
314 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf);
316 temp = mode->crtc_vdisplay - 1;
323 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);
325 temp = mode->crtc_vblank_start - 1;
332 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);
334 temp = mode->crtc_vblank_end - 1;
337 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);
339 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);
340 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);
341 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));
343 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);
346 static void ast_set_offset_reg(struct drm_crtc *crtc)
348 struct ast_private *ast = crtc->dev->dev_private;
352 offset = crtc->fb->pitches[0] >> 3;
353 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));
354 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);
357 static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mode,
358 struct ast_vbios_mode_info *vbios_mode)
360 struct ast_private *ast = dev->dev_private;
361 struct ast_vbios_dclk_info *clk_info;
363 clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
365 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);
366 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);
367 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,
368 (clk_info->param3 & 0x80) | ((clk_info->param3 & 0x3) << 4));
371 static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
372 struct ast_vbios_mode_info *vbios_mode)
374 struct ast_private *ast = crtc->dev->dev_private;
375 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
377 switch (crtc->fb->bits_per_pixel) {
396 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);
397 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);
398 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);
401 if (ast->chip == AST2300 || ast->chip == AST2400) {
402 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);
403 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);
404 } else if (ast->chip == AST2100 ||
405 ast->chip == AST1100 ||
406 ast->chip == AST2200 ||
407 ast->chip == AST2150) {
408 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);
409 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);
411 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);
412 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);
416 static void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mode,
417 struct ast_vbios_mode_info *vbios_mode)
419 struct ast_private *ast = dev->dev_private;
422 jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
423 jreg |= (vbios_mode->enh_table->flags & SyncNN);
424 ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
427 static bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
428 struct ast_vbios_mode_info *vbios_mode)
430 switch (crtc->fb->bits_per_pixel) {
439 static void ast_set_start_address_crt1(struct drm_crtc *crtc, unsigned offset)
441 struct ast_private *ast = crtc->dev->dev_private;
445 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));
446 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));
447 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));
451 static void ast_crtc_dpms(struct drm_crtc *crtc, int mode)
453 struct ast_private *ast = crtc->dev->dev_private;
455 if (ast->chip == AST1180)
459 case DRM_MODE_DPMS_ON:
460 case DRM_MODE_DPMS_STANDBY:
461 case DRM_MODE_DPMS_SUSPEND:
462 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
463 ast_crtc_load_lut(crtc);
465 case DRM_MODE_DPMS_OFF:
466 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20);
471 static bool ast_crtc_mode_fixup(struct drm_crtc *crtc,
472 const struct drm_display_mode *mode,
473 struct drm_display_mode *adjusted_mode)
478 /* ast is different - we will force move buffers out of VRAM */
479 static int ast_crtc_do_set_base(struct drm_crtc *crtc,
480 struct drm_framebuffer *fb,
481 int x, int y, int atomic)
483 struct ast_private *ast = crtc->dev->dev_private;
484 struct drm_gem_object *obj;
485 struct ast_framebuffer *ast_fb;
490 /* push the previous fb to system ram */
492 ast_fb = to_ast_framebuffer(fb);
494 bo = gem_to_ast_bo(obj);
495 ret = ast_bo_reserve(bo, false);
498 ast_bo_push_sysram(bo);
499 ast_bo_unreserve(bo);
502 ast_fb = to_ast_framebuffer(crtc->fb);
504 bo = gem_to_ast_bo(obj);
506 ret = ast_bo_reserve(bo, false);
510 ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr);
512 ast_bo_unreserve(bo);
516 if (&ast->fbdev->afb == ast_fb) {
517 /* if pushing console in kmap it */
518 ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap);
520 DRM_ERROR("failed to kmap fbcon\n");
522 ast_bo_unreserve(bo);
524 ast_set_start_address_crt1(crtc, (u32)gpu_addr);
529 static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
530 struct drm_framebuffer *old_fb)
532 return ast_crtc_do_set_base(crtc, old_fb, x, y, 0);
535 static int ast_crtc_mode_set(struct drm_crtc *crtc,
536 struct drm_display_mode *mode,
537 struct drm_display_mode *adjusted_mode,
539 struct drm_framebuffer *old_fb)
541 struct drm_device *dev = crtc->dev;
542 struct ast_private *ast = crtc->dev->dev_private;
543 struct ast_vbios_mode_info vbios_mode;
545 if (ast->chip == AST1180) {
546 DRM_ERROR("AST 1180 modesetting not supported\n");
550 ret = ast_get_vbios_mode_info(crtc, mode, adjusted_mode, &vbios_mode);
555 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04);
557 ast_set_std_reg(crtc, adjusted_mode, &vbios_mode);
558 ast_set_crtc_reg(crtc, adjusted_mode, &vbios_mode);
559 ast_set_offset_reg(crtc);
560 ast_set_dclk_reg(dev, adjusted_mode, &vbios_mode);
561 ast_set_ext_reg(crtc, adjusted_mode, &vbios_mode);
562 ast_set_sync_reg(dev, adjusted_mode, &vbios_mode);
563 ast_set_dac_reg(crtc, adjusted_mode, &vbios_mode);
565 ast_crtc_mode_set_base(crtc, x, y, old_fb);
570 static void ast_crtc_disable(struct drm_crtc *crtc)
575 static void ast_crtc_prepare(struct drm_crtc *crtc)
580 static void ast_crtc_commit(struct drm_crtc *crtc)
582 struct ast_private *ast = crtc->dev->dev_private;
583 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
587 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
588 .dpms = ast_crtc_dpms,
589 .mode_fixup = ast_crtc_mode_fixup,
590 .mode_set = ast_crtc_mode_set,
591 .mode_set_base = ast_crtc_mode_set_base,
592 .disable = ast_crtc_disable,
593 .load_lut = ast_crtc_load_lut,
594 .prepare = ast_crtc_prepare,
595 .commit = ast_crtc_commit,
599 static void ast_crtc_reset(struct drm_crtc *crtc)
604 static void ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
605 u16 *blue, uint32_t start, uint32_t size)
607 struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
608 int end = (start + size > 256) ? 256 : start + size, i;
610 /* userspace palettes are always correct as is */
611 for (i = start; i < end; i++) {
612 ast_crtc->lut_r[i] = red[i] >> 8;
613 ast_crtc->lut_g[i] = green[i] >> 8;
614 ast_crtc->lut_b[i] = blue[i] >> 8;
616 ast_crtc_load_lut(crtc);
620 static void ast_crtc_destroy(struct drm_crtc *crtc)
622 drm_crtc_cleanup(crtc);
626 static const struct drm_crtc_funcs ast_crtc_funcs = {
627 .cursor_set = ast_cursor_set,
628 .cursor_move = ast_cursor_move,
629 .reset = ast_crtc_reset,
630 .set_config = drm_crtc_helper_set_config,
631 .gamma_set = ast_crtc_gamma_set,
632 .destroy = ast_crtc_destroy,
635 static int ast_crtc_init(struct drm_device *dev)
637 struct ast_crtc *crtc;
640 crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL);
644 drm_crtc_init(dev, &crtc->base, &ast_crtc_funcs);
645 drm_mode_crtc_set_gamma_size(&crtc->base, 256);
646 drm_crtc_helper_add(&crtc->base, &ast_crtc_helper_funcs);
648 for (i = 0; i < 256; i++) {
656 static void ast_encoder_destroy(struct drm_encoder *encoder)
658 drm_encoder_cleanup(encoder);
663 static struct drm_encoder *ast_best_single_encoder(struct drm_connector *connector)
665 int enc_id = connector->encoder_ids[0];
666 struct drm_mode_object *obj;
667 struct drm_encoder *encoder;
669 /* pick the encoder ids */
671 obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER);
674 encoder = obj_to_encoder(obj);
681 static const struct drm_encoder_funcs ast_enc_funcs = {
682 .destroy = ast_encoder_destroy,
685 static void ast_encoder_dpms(struct drm_encoder *encoder, int mode)
690 static bool ast_mode_fixup(struct drm_encoder *encoder,
691 const struct drm_display_mode *mode,
692 struct drm_display_mode *adjusted_mode)
697 static void ast_encoder_mode_set(struct drm_encoder *encoder,
698 struct drm_display_mode *mode,
699 struct drm_display_mode *adjusted_mode)
703 static void ast_encoder_prepare(struct drm_encoder *encoder)
708 static void ast_encoder_commit(struct drm_encoder *encoder)
714 static const struct drm_encoder_helper_funcs ast_enc_helper_funcs = {
715 .dpms = ast_encoder_dpms,
716 .mode_fixup = ast_mode_fixup,
717 .prepare = ast_encoder_prepare,
718 .commit = ast_encoder_commit,
719 .mode_set = ast_encoder_mode_set,
722 static int ast_encoder_init(struct drm_device *dev)
724 struct ast_encoder *ast_encoder;
726 ast_encoder = kzalloc(sizeof(struct ast_encoder), GFP_KERNEL);
730 drm_encoder_init(dev, &ast_encoder->base, &ast_enc_funcs,
731 DRM_MODE_ENCODER_DAC);
732 drm_encoder_helper_add(&ast_encoder->base, &ast_enc_helper_funcs);
734 ast_encoder->base.possible_crtcs = 1;
738 static int ast_get_modes(struct drm_connector *connector)
740 struct ast_connector *ast_connector = to_ast_connector(connector);
744 edid = drm_get_edid(connector, &ast_connector->i2c->adapter);
746 drm_mode_connector_update_edid_property(&ast_connector->base, edid);
747 ret = drm_add_edid_modes(connector, edid);
751 drm_mode_connector_update_edid_property(&ast_connector->base, NULL);
755 static int ast_mode_valid(struct drm_connector *connector,
756 struct drm_display_mode *mode)
758 struct ast_private *ast = connector->dev->dev_private;
759 int flags = MODE_NOMODE;
762 if (ast->support_wide_screen) {
763 if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050))
765 if ((mode->hdisplay == 1280) && (mode->vdisplay == 800))
767 if ((mode->hdisplay == 1440) && (mode->vdisplay == 900))
769 if ((mode->hdisplay == 1360) && (mode->vdisplay == 768))
771 if ((mode->hdisplay == 1600) && (mode->vdisplay == 900))
774 if ((ast->chip == AST2100) || (ast->chip == AST2200) || (ast->chip == AST2300) || (ast->chip == AST2400) || (ast->chip == AST1180)) {
775 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080))
778 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) {
779 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
787 switch (mode->hdisplay) {
789 if (mode->vdisplay == 480) flags = MODE_OK;
792 if (mode->vdisplay == 600) flags = MODE_OK;
795 if (mode->vdisplay == 768) flags = MODE_OK;
798 if (mode->vdisplay == 1024) flags = MODE_OK;
801 if (mode->vdisplay == 1200) flags = MODE_OK;
810 static void ast_connector_destroy(struct drm_connector *connector)
812 struct ast_connector *ast_connector = to_ast_connector(connector);
813 ast_i2c_destroy(ast_connector->i2c);
814 drm_sysfs_connector_remove(connector);
815 drm_connector_cleanup(connector);
819 static enum drm_connector_status
820 ast_connector_detect(struct drm_connector *connector, bool force)
822 return connector_status_connected;
825 static const struct drm_connector_helper_funcs ast_connector_helper_funcs = {
826 .mode_valid = ast_mode_valid,
827 .get_modes = ast_get_modes,
828 .best_encoder = ast_best_single_encoder,
831 static const struct drm_connector_funcs ast_connector_funcs = {
832 .dpms = drm_helper_connector_dpms,
833 .detect = ast_connector_detect,
834 .fill_modes = drm_helper_probe_single_connector_modes,
835 .destroy = ast_connector_destroy,
838 static int ast_connector_init(struct drm_device *dev)
840 struct ast_connector *ast_connector;
841 struct drm_connector *connector;
842 struct drm_encoder *encoder;
844 ast_connector = kzalloc(sizeof(struct ast_connector), GFP_KERNEL);
848 connector = &ast_connector->base;
849 drm_connector_init(dev, connector, &ast_connector_funcs, DRM_MODE_CONNECTOR_VGA);
851 drm_connector_helper_add(connector, &ast_connector_helper_funcs);
853 connector->interlace_allowed = 0;
854 connector->doublescan_allowed = 0;
856 drm_sysfs_connector_add(connector);
858 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
860 encoder = list_first_entry(&dev->mode_config.encoder_list, struct drm_encoder, head);
861 drm_mode_connector_attach_encoder(connector, encoder);
863 ast_connector->i2c = ast_i2c_create(dev);
864 if (!ast_connector->i2c)
865 DRM_ERROR("failed to add ddc bus for connector\n");
870 /* allocate cursor cache and pin at start of VRAM */
871 static int ast_cursor_init(struct drm_device *dev)
873 struct ast_private *ast = dev->dev_private;
876 struct drm_gem_object *obj;
880 size = (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE) * AST_DEFAULT_HWC_NUM;
882 ret = ast_gem_create(dev, size, true, &obj);
885 bo = gem_to_ast_bo(obj);
886 ret = ast_bo_reserve(bo, false);
887 if (unlikely(ret != 0))
890 ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr);
891 ast_bo_unreserve(bo);
895 /* kmap the object */
896 ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &ast->cache_kmap);
900 ast->cursor_cache = obj;
901 ast->cursor_cache_gpu_addr = gpu_addr;
902 DRM_DEBUG_KMS("pinned cursor cache at %llx\n", ast->cursor_cache_gpu_addr);
908 static void ast_cursor_fini(struct drm_device *dev)
910 struct ast_private *ast = dev->dev_private;
911 ttm_bo_kunmap(&ast->cache_kmap);
912 drm_gem_object_unreference_unlocked(ast->cursor_cache);
915 int ast_mode_init(struct drm_device *dev)
917 ast_cursor_init(dev);
919 ast_encoder_init(dev);
920 ast_connector_init(dev);
924 void ast_mode_fini(struct drm_device *dev)
926 ast_cursor_fini(dev);
929 static int get_clock(void *i2c_priv)
931 struct ast_i2c_chan *i2c = i2c_priv;
932 struct ast_private *ast = i2c->dev->dev_private;
935 val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4;
936 return val & 1 ? 1 : 0;
939 static int get_data(void *i2c_priv)
941 struct ast_i2c_chan *i2c = i2c_priv;
942 struct ast_private *ast = i2c->dev->dev_private;
945 val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5;
946 return val & 1 ? 1 : 0;
949 static void set_clock(void *i2c_priv, int clock)
951 struct ast_i2c_chan *i2c = i2c_priv;
952 struct ast_private *ast = i2c->dev->dev_private;
956 for (i = 0; i < 0x10000; i++) {
957 ujcrb7 = ((clock & 0x01) ? 0 : 1);
958 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfe, ujcrb7);
959 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);
965 static void set_data(void *i2c_priv, int data)
967 struct ast_i2c_chan *i2c = i2c_priv;
968 struct ast_private *ast = i2c->dev->dev_private;
972 for (i = 0; i < 0x10000; i++) {
973 ujcrb7 = ((data & 0x01) ? 0 : 1) << 2;
974 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfb, ujcrb7);
975 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);
981 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev)
983 struct ast_i2c_chan *i2c;
986 i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL);
990 i2c->adapter.owner = THIS_MODULE;
991 i2c->adapter.class = I2C_CLASS_DDC;
992 i2c->adapter.dev.parent = &dev->pdev->dev;
994 i2c_set_adapdata(&i2c->adapter, i2c);
995 snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
997 i2c->adapter.algo_data = &i2c->bit;
999 i2c->bit.udelay = 20;
1000 i2c->bit.timeout = 2;
1001 i2c->bit.data = i2c;
1002 i2c->bit.setsda = set_data;
1003 i2c->bit.setscl = set_clock;
1004 i2c->bit.getsda = get_data;
1005 i2c->bit.getscl = get_clock;
1006 ret = i2c_bit_add_bus(&i2c->adapter);
1008 DRM_ERROR("Failed to register bit i2c\n");
1018 static void ast_i2c_destroy(struct ast_i2c_chan *i2c)
1022 i2c_del_adapter(&i2c->adapter);
1026 static void ast_show_cursor(struct drm_crtc *crtc)
1028 struct ast_private *ast = crtc->dev->dev_private;
1032 /* enable ARGB cursor */
1034 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);
1037 static void ast_hide_cursor(struct drm_crtc *crtc)
1039 struct ast_private *ast = crtc->dev->dev_private;
1040 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00);
1043 static u32 copy_cursor_image(u8 *src, u8 *dst, int width, int height)
1048 } srcdata32[2], data32;
1054 s32 alpha_dst_delta, last_alpha_dst_delta;
1055 u8 *srcxor, *dstxor;
1057 u32 per_pixel_copy, two_pixel_copy;
1059 alpha_dst_delta = AST_MAX_HWC_WIDTH << 1;
1060 last_alpha_dst_delta = alpha_dst_delta - (width << 1);
1063 dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta;
1064 per_pixel_copy = width & 1;
1065 two_pixel_copy = width >> 1;
1067 for (j = 0; j < height; j++) {
1068 for (i = 0; i < two_pixel_copy; i++) {
1069 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1070 srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0;
1071 data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1072 data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1073 data32.b[2] = srcdata32[0].b[1] | (srcdata32[1].b[0] >> 4);
1074 data32.b[3] = srcdata32[0].b[3] | (srcdata32[1].b[2] >> 4);
1076 writel(data32.ul, dstxor);
1084 for (i = 0; i < per_pixel_copy; i++) {
1085 srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1086 data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1087 data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1088 writew(data16.us, dstxor);
1089 csum += (u32)data16.us;
1094 dstxor += last_alpha_dst_delta;
1099 static int ast_cursor_set(struct drm_crtc *crtc,
1100 struct drm_file *file_priv,
1105 struct ast_private *ast = crtc->dev->dev_private;
1106 struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1107 struct drm_gem_object *obj;
1112 struct ttm_bo_kmap_obj uobj_map;
1114 bool src_isiomem, dst_isiomem;
1116 ast_hide_cursor(crtc);
1120 if (width > AST_MAX_HWC_WIDTH || height > AST_MAX_HWC_HEIGHT)
1123 obj = drm_gem_object_lookup(crtc->dev, file_priv, handle);
1125 DRM_ERROR("Cannot find cursor object %x for crtc\n", handle);
1128 bo = gem_to_ast_bo(obj);
1130 ret = ast_bo_reserve(bo, false);
1134 ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &uobj_map);
1136 src = ttm_kmap_obj_virtual(&uobj_map, &src_isiomem);
1137 dst = ttm_kmap_obj_virtual(&ast->cache_kmap, &dst_isiomem);
1139 if (src_isiomem == true)
1140 DRM_ERROR("src cursor bo should be in main memory\n");
1141 if (dst_isiomem == false)
1142 DRM_ERROR("dst bo should be in VRAM\n");
1144 dst += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor;
1146 /* do data transfer to cursor cache */
1147 csum = copy_cursor_image(src, dst, width, height);
1149 /* write checksum + signature */
1150 ttm_bo_kunmap(&uobj_map);
1151 ast_bo_unreserve(bo);
1153 u8 *dst = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE;
1155 writel(width, dst + AST_HWC_SIGNATURE_SizeX);
1156 writel(height, dst + AST_HWC_SIGNATURE_SizeY);
1157 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);
1158 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);
1160 /* set pattern offset */
1161 gpu_addr = ast->cursor_cache_gpu_addr;
1162 gpu_addr += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor;
1164 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, gpu_addr & 0xff);
1165 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, (gpu_addr >> 8) & 0xff);
1166 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, (gpu_addr >> 16) & 0xff);
1168 ast_crtc->cursor_width = width;
1169 ast_crtc->cursor_height = height;
1170 ast_crtc->offset_x = AST_MAX_HWC_WIDTH - width;
1171 ast_crtc->offset_y = AST_MAX_HWC_WIDTH - height;
1173 ast->next_cursor = (ast->next_cursor + 1) % AST_DEFAULT_HWC_NUM;
1175 ast_show_cursor(crtc);
1177 drm_gem_object_unreference_unlocked(obj);
1180 drm_gem_object_unreference_unlocked(obj);
1184 static int ast_cursor_move(struct drm_crtc *crtc,
1187 struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1188 struct ast_private *ast = crtc->dev->dev_private;
1189 int x_offset, y_offset;
1192 sig = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE;
1193 writel(x, sig + AST_HWC_SIGNATURE_X);
1194 writel(y, sig + AST_HWC_SIGNATURE_Y);
1196 x_offset = ast_crtc->offset_x;
1197 y_offset = ast_crtc->offset_y;
1199 x_offset = (-x) + ast_crtc->offset_x;
1204 y_offset = (-y) + ast_crtc->offset_y;
1207 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);
1208 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);
1209 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff));
1210 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f));
1211 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y & 0xff));
1212 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y >> 8) & 0x07));
1214 /* dummy write to fire HWC */
1215 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xCB, 0xFF, 0x00);