2 * Copyright © 2009 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/errno.h>
28 #include <linux/sched.h>
29 #include <linux/i2c.h>
30 #include <drm/drm_dp_helper.h>
36 * These functions contain some common logic and helpers at various abstraction
37 * levels to deal with Display Port sink devices and related things like DP aux
38 * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
42 /* Run a single AUX_CH I2C transaction, writing/reading data as necessary */
44 i2c_algo_dp_aux_transaction(struct i2c_adapter *adapter, int mode,
45 uint8_t write_byte, uint8_t *read_byte)
47 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
50 ret = (*algo_data->aux_ch)(adapter, mode,
51 write_byte, read_byte);
60 * Send the address. If the I2C link is running, this 'restarts'
61 * the connection with the new address, this is used for doing
62 * a write followed by a read (as needed for DDC)
65 i2c_algo_dp_aux_address(struct i2c_adapter *adapter, u16 address, bool reading)
67 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
68 int mode = MODE_I2C_START;
72 mode |= MODE_I2C_READ;
74 mode |= MODE_I2C_WRITE;
75 algo_data->address = address;
76 algo_data->running = true;
77 ret = i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
82 * Stop the I2C transaction. This closes out the link, sending
83 * a bare address packet with the MOT bit turned off
86 i2c_algo_dp_aux_stop(struct i2c_adapter *adapter, bool reading)
88 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
89 int mode = MODE_I2C_STOP;
92 mode |= MODE_I2C_READ;
94 mode |= MODE_I2C_WRITE;
95 if (algo_data->running) {
96 (void) i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL);
97 algo_data->running = false;
102 * Write a single byte to the current I2C address, the
103 * the I2C link must be running or this returns -EIO
106 i2c_algo_dp_aux_put_byte(struct i2c_adapter *adapter, u8 byte)
108 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
111 if (!algo_data->running)
114 ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_WRITE, byte, NULL);
119 * Read a single byte from the current I2C address, the
120 * I2C link must be running or this returns -EIO
123 i2c_algo_dp_aux_get_byte(struct i2c_adapter *adapter, u8 *byte_ret)
125 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
128 if (!algo_data->running)
131 ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_READ, 0, byte_ret);
136 i2c_algo_dp_aux_xfer(struct i2c_adapter *adapter,
137 struct i2c_msg *msgs,
141 bool reading = false;
145 for (m = 0; m < num; m++) {
146 u16 len = msgs[m].len;
147 u8 *buf = msgs[m].buf;
148 reading = (msgs[m].flags & I2C_M_RD) != 0;
149 ret = i2c_algo_dp_aux_address(adapter, msgs[m].addr, reading);
153 for (b = 0; b < len; b++) {
154 ret = i2c_algo_dp_aux_get_byte(adapter, &buf[b]);
159 for (b = 0; b < len; b++) {
160 ret = i2c_algo_dp_aux_put_byte(adapter, buf[b]);
170 i2c_algo_dp_aux_stop(adapter, reading);
171 DRM_DEBUG_KMS("dp_aux_xfer return %d\n", ret);
176 i2c_algo_dp_aux_functionality(struct i2c_adapter *adapter)
178 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
179 I2C_FUNC_SMBUS_READ_BLOCK_DATA |
180 I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
184 static const struct i2c_algorithm i2c_dp_aux_algo = {
185 .master_xfer = i2c_algo_dp_aux_xfer,
186 .functionality = i2c_algo_dp_aux_functionality,
190 i2c_dp_aux_reset_bus(struct i2c_adapter *adapter)
192 (void) i2c_algo_dp_aux_address(adapter, 0, false);
193 (void) i2c_algo_dp_aux_stop(adapter, false);
197 i2c_dp_aux_prepare_bus(struct i2c_adapter *adapter)
199 adapter->algo = &i2c_dp_aux_algo;
200 adapter->retries = 3;
201 i2c_dp_aux_reset_bus(adapter);
206 * i2c_dp_aux_add_bus() - register an i2c adapter using the aux ch helper
207 * @adapter: i2c adapter to register
209 * This registers an i2c adapater that uses dp aux channel as it's underlaying
210 * transport. The driver needs to fill out the &i2c_algo_dp_aux_data structure
211 * and store it in the algo_data member of the @adapter argument. This will be
212 * used by the i2c over dp aux algorithm to drive the hardware.
215 * 0 on success, -ERRNO on failure.
218 i2c_dp_aux_add_bus(struct i2c_adapter *adapter)
222 error = i2c_dp_aux_prepare_bus(adapter);
225 error = i2c_add_adapter(adapter);
228 EXPORT_SYMBOL(i2c_dp_aux_add_bus);
230 /* Helpers for DP link training */
231 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
233 return link_status[r - DP_LANE0_1_STATUS];
236 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
239 int i = DP_LANE0_1_STATUS + (lane >> 1);
240 int s = (lane & 1) * 4;
241 u8 l = dp_link_status(link_status, i);
242 return (l >> s) & 0xf;
245 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
252 lane_align = dp_link_status(link_status,
253 DP_LANE_ALIGN_STATUS_UPDATED);
254 if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
256 for (lane = 0; lane < lane_count; lane++) {
257 lane_status = dp_get_lane_status(link_status, lane);
258 if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
263 EXPORT_SYMBOL(drm_dp_channel_eq_ok);
265 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
271 for (lane = 0; lane < lane_count; lane++) {
272 lane_status = dp_get_lane_status(link_status, lane);
273 if ((lane_status & DP_LANE_CR_DONE) == 0)
278 EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
280 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
283 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
284 int s = ((lane & 1) ?
285 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
286 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
287 u8 l = dp_link_status(link_status, i);
289 return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
291 EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
293 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
296 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
297 int s = ((lane & 1) ?
298 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
299 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
300 u8 l = dp_link_status(link_status, i);
302 return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
304 EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
306 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
307 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
310 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
312 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
314 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
315 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
318 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
320 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
322 u8 drm_dp_link_rate_to_bw_code(int link_rate)
327 return DP_LINK_BW_1_62;
329 return DP_LINK_BW_2_7;
331 return DP_LINK_BW_5_4;
334 EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
336 int drm_dp_bw_code_to_link_rate(u8 link_bw)
339 case DP_LINK_BW_1_62:
348 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
353 * The DisplayPort AUX channel is an abstraction to allow generic, driver-
354 * independent access to AUX functionality. Drivers can take advantage of
355 * this by filling in the fields of the drm_dp_aux structure.
357 * Transactions are described using a hardware-independent drm_dp_aux_msg
358 * structure, which is passed into a driver's .transfer() implementation.
359 * Both native and I2C-over-AUX transactions are supported.
362 static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
363 unsigned int offset, void *buffer, size_t size)
365 struct drm_dp_aux_msg msg;
369 memset(&msg, 0, sizeof(msg));
370 msg.address = offset;
371 msg.request = request;
376 * The specification doesn't give any recommendation on how often to
377 * retry native transactions, so retry 7 times like for I2C-over-AUX
380 for (retry = 0; retry < 7; retry++) {
381 err = aux->transfer(aux, &msg);
390 switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) {
391 case DP_AUX_NATIVE_REPLY_ACK:
396 case DP_AUX_NATIVE_REPLY_NACK:
399 case DP_AUX_NATIVE_REPLY_DEFER:
400 usleep_range(400, 500);
405 DRM_DEBUG_KMS("too many retries, giving up\n");
410 * drm_dp_dpcd_read() - read a series of bytes from the DPCD
411 * @aux: DisplayPort AUX channel
412 * @offset: address of the (first) register to read
413 * @buffer: buffer to store the register values
414 * @size: number of bytes in @buffer
416 * Returns the number of bytes transferred on success, or a negative error
417 * code on failure. -EIO is returned if the request was NAKed by the sink or
418 * if the retry count was exceeded. If not all bytes were transferred, this
419 * function returns -EPROTO. Errors from the underlying AUX channel transfer
420 * function, with the exception of -EBUSY (which causes the transaction to
421 * be retried), are propagated to the caller.
423 ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
424 void *buffer, size_t size)
426 return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer,
429 EXPORT_SYMBOL(drm_dp_dpcd_read);
432 * drm_dp_dpcd_write() - write a series of bytes to the DPCD
433 * @aux: DisplayPort AUX channel
434 * @offset: address of the (first) register to write
435 * @buffer: buffer containing the values to write
436 * @size: number of bytes in @buffer
438 * Returns the number of bytes transferred on success, or a negative error
439 * code on failure. -EIO is returned if the request was NAKed by the sink or
440 * if the retry count was exceeded. If not all bytes were transferred, this
441 * function returns -EPROTO. Errors from the underlying AUX channel transfer
442 * function, with the exception of -EBUSY (which causes the transaction to
443 * be retried), are propagated to the caller.
445 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
446 void *buffer, size_t size)
448 return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
451 EXPORT_SYMBOL(drm_dp_dpcd_write);
454 * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
455 * @aux: DisplayPort AUX channel
456 * @status: buffer to store the link status in (must be at least 6 bytes)
458 * Returns the number of bytes transferred on success or a negative error
461 int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
462 u8 status[DP_LINK_STATUS_SIZE])
464 return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
465 DP_LINK_STATUS_SIZE);
467 EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
470 * drm_dp_link_probe() - probe a DisplayPort link for capabilities
471 * @aux: DisplayPort AUX channel
472 * @link: pointer to structure in which to return link capabilities
474 * The structure filled in by this function can usually be passed directly
475 * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
476 * configure the link based on the link's capabilities.
478 * Returns 0 on success or a negative error code on failure.
480 int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
485 memset(link, 0, sizeof(*link));
487 err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
491 link->revision = values[0];
492 link->rate = drm_dp_bw_code_to_link_rate(values[1]);
493 link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
495 if (values[2] & DP_ENHANCED_FRAME_CAP)
496 link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
500 EXPORT_SYMBOL(drm_dp_link_probe);
503 * drm_dp_link_power_up() - power up a DisplayPort link
504 * @aux: DisplayPort AUX channel
505 * @link: pointer to a structure containing the link configuration
507 * Returns 0 on success or a negative error code on failure.
509 int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
514 /* DP_SET_POWER register is only available on DPCD v1.1 and later */
515 if (link->revision < 0x11)
518 err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
522 value &= ~DP_SET_POWER_MASK;
523 value |= DP_SET_POWER_D0;
525 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
530 * According to the DP 1.1 specification, a "Sink Device must exit the
531 * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
532 * Control Field" (register 0x600).
534 usleep_range(1000, 2000);
538 EXPORT_SYMBOL(drm_dp_link_power_up);
541 * drm_dp_link_configure() - configure a DisplayPort link
542 * @aux: DisplayPort AUX channel
543 * @link: pointer to a structure containing the link configuration
545 * Returns 0 on success or a negative error code on failure.
547 int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
552 values[0] = drm_dp_link_rate_to_bw_code(link->rate);
553 values[1] = link->num_lanes;
555 if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
556 values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
558 err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
564 EXPORT_SYMBOL(drm_dp_link_configure);
567 * I2C-over-AUX implementation
570 static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
572 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
573 I2C_FUNC_SMBUS_READ_BLOCK_DATA |
574 I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
579 * Transfer a single I2C-over-AUX message and handle various error conditions,
580 * retrying the transaction as appropriate.
582 static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
588 * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
589 * is required to retry at least seven times upon receiving AUX_DEFER
590 * before giving up the AUX transaction.
592 for (retry = 0; retry < 7; retry++) {
593 err = aux->transfer(aux, msg);
598 DRM_DEBUG_KMS("transaction failed: %d\n", err);
603 switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) {
604 case DP_AUX_NATIVE_REPLY_ACK:
606 * For I2C-over-AUX transactions this isn't enough, we
607 * need to check for the I2C ACK reply.
611 case DP_AUX_NATIVE_REPLY_NACK:
612 DRM_DEBUG_KMS("native nack\n");
615 case DP_AUX_NATIVE_REPLY_DEFER:
616 DRM_DEBUG_KMS("native defer");
618 * We could check for I2C bit rate capabilities and if
619 * available adjust this interval. We could also be
620 * more careful with DP-to-legacy adapters where a
621 * long legacy cable may force very low I2C bit rates.
623 * For now just defer for long enough to hopefully be
624 * safe for all use-cases.
626 usleep_range(500, 600);
630 DRM_ERROR("invalid native reply %#04x\n", msg->reply);
634 switch (msg->reply & DP_AUX_I2C_REPLY_MASK) {
635 case DP_AUX_I2C_REPLY_ACK:
637 * Both native ACK and I2C ACK replies received. We
638 * can assume the transfer was successful.
644 case DP_AUX_I2C_REPLY_NACK:
645 DRM_DEBUG_KMS("I2C nack\n");
648 case DP_AUX_I2C_REPLY_DEFER:
649 DRM_DEBUG_KMS("I2C defer\n");
650 usleep_range(400, 500);
654 DRM_ERROR("invalid I2C reply %#04x\n", msg->reply);
659 DRM_DEBUG_KMS("too many retries, giving up\n");
663 static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
666 struct drm_dp_aux *aux = adapter->algo_data;
668 struct drm_dp_aux_msg msg;
671 memset(&msg, 0, sizeof(msg));
673 for (i = 0; i < num; i++) {
674 msg.address = msgs[i].addr;
675 msg.request = (msgs[i].flags & I2C_M_RD) ?
678 msg.request |= DP_AUX_I2C_MOT;
679 /* Send a bare address packet to start the transaction.
680 * Zero sized messages specify an address only (bare
681 * address) transaction.
685 err = drm_dp_i2c_do_msg(aux, &msg);
689 * Many hardware implementations support FIFOs larger than a
690 * single byte, but it has been empirically determined that
691 * transferring data in larger chunks can actually lead to
692 * decreased performance. Therefore each message is simply
693 * transferred byte-by-byte.
695 for (j = 0; j < msgs[i].len; j++) {
696 msg.buffer = msgs[i].buf + j;
699 err = drm_dp_i2c_do_msg(aux, &msg);
708 /* Send a bare address packet to close out the transaction.
709 * Zero sized messages specify an address only (bare
710 * address) transaction.
712 msg.request &= ~DP_AUX_I2C_MOT;
715 (void)drm_dp_i2c_do_msg(aux, &msg);
720 static const struct i2c_algorithm drm_dp_i2c_algo = {
721 .functionality = drm_dp_i2c_functionality,
722 .master_xfer = drm_dp_i2c_xfer,
726 * drm_dp_aux_register_i2c_bus() - register an I2C adapter for I2C-over-AUX
727 * @aux: DisplayPort AUX channel
729 * Returns 0 on success or a negative error code on failure.
731 int drm_dp_aux_register_i2c_bus(struct drm_dp_aux *aux)
733 aux->ddc.algo = &drm_dp_i2c_algo;
734 aux->ddc.algo_data = aux;
735 aux->ddc.retries = 3;
737 aux->ddc.class = I2C_CLASS_DDC;
738 aux->ddc.owner = THIS_MODULE;
739 aux->ddc.dev.parent = aux->dev;
740 aux->ddc.dev.of_node = aux->dev->of_node;
742 strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
743 sizeof(aux->ddc.name));
745 return i2c_add_adapter(&aux->ddc);
747 EXPORT_SYMBOL(drm_dp_aux_register_i2c_bus);
750 * drm_dp_aux_unregister_i2c_bus() - unregister an I2C-over-AUX adapter
751 * @aux: DisplayPort AUX channel
753 void drm_dp_aux_unregister_i2c_bus(struct drm_dp_aux *aux)
755 i2c_del_adapter(&aux->ddc);
757 EXPORT_SYMBOL(drm_dp_aux_unregister_i2c_bus);