2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
36 #include <drm/drm_edid.h>
38 #define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
42 #define EDID_EST_TIMINGS 16
43 #define EDID_STD_TIMINGS 8
44 #define EDID_DETAILED_TIMINGS 4
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
53 /* First detailed mode wrong, use largest 60Hz mode */
54 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55 /* Reported 135MHz pixel clock is too high, needs adjustment */
56 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57 /* Prefer the largest mode at 75 Hz */
58 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59 /* Detail timing is in cm not mm */
60 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61 /* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
64 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65 /* Monitor forgot to set the first detailed is preferred bit. */
66 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67 /* use +hsync +vsync for detailed mode */
68 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
69 /* Force reduced-blanking timings for detailed modes */
70 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
72 #define EDID_QUIRK_FORCE_8BPC (1 << 8)
74 struct detailed_mode_closure {
75 struct drm_connector *connector;
87 static struct edid_quirk {
91 } edid_quirk_list[] = {
93 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
95 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
97 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
99 /* Belinea 10 15 55 */
100 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
101 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
103 /* Envision Peripherals, Inc. EN-7100e */
104 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
105 /* Envision EN2028 */
106 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
108 /* Funai Electronics PM36B */
109 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
110 EDID_QUIRK_DETAILED_IN_CM },
112 /* LG Philips LCD LP154W01-A5 */
113 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
114 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
116 /* Philips 107p5 CRT */
117 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
120 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
122 /* Samsung SyncMaster 205BW. Note: irony */
123 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
124 /* Samsung SyncMaster 22[5-6]BW */
125 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
126 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
128 /* ViewSonic VA2026w */
129 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
131 /* Medion MD 30217 PG */
132 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
134 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
135 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
139 * Autogenerated from the DMT spec.
140 * This table is copied from xfree86/modes/xf86EdidModes.c.
142 static const struct drm_display_mode drm_dmt_modes[] = {
144 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
145 736, 832, 0, 350, 382, 385, 445, 0,
146 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
148 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
149 736, 832, 0, 400, 401, 404, 445, 0,
150 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
152 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
153 828, 936, 0, 400, 401, 404, 446, 0,
154 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
156 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
157 752, 800, 0, 480, 489, 492, 525, 0,
158 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
160 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
161 704, 832, 0, 480, 489, 492, 520, 0,
162 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
164 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
165 720, 840, 0, 480, 481, 484, 500, 0,
166 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
168 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
169 752, 832, 0, 480, 481, 484, 509, 0,
170 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
172 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
173 896, 1024, 0, 600, 601, 603, 625, 0,
174 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
176 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
177 968, 1056, 0, 600, 601, 605, 628, 0,
178 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
180 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
181 976, 1040, 0, 600, 637, 643, 666, 0,
182 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
184 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
185 896, 1056, 0, 600, 601, 604, 625, 0,
186 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
188 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
189 896, 1048, 0, 600, 601, 604, 631, 0,
190 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
191 /* 800x600@120Hz RB */
192 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
193 880, 960, 0, 600, 603, 607, 636, 0,
194 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
196 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
197 976, 1088, 0, 480, 486, 494, 517, 0,
198 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
199 /* 1024x768@43Hz, interlace */
200 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
201 1208, 1264, 0, 768, 768, 772, 817, 0,
202 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
203 DRM_MODE_FLAG_INTERLACE) },
205 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
206 1184, 1344, 0, 768, 771, 777, 806, 0,
207 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
209 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
210 1184, 1328, 0, 768, 771, 777, 806, 0,
211 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
213 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
214 1136, 1312, 0, 768, 769, 772, 800, 0,
215 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
217 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
218 1168, 1376, 0, 768, 769, 772, 808, 0,
219 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
220 /* 1024x768@120Hz RB */
221 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
222 1104, 1184, 0, 768, 771, 775, 813, 0,
223 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
225 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
226 1344, 1600, 0, 864, 865, 868, 900, 0,
227 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
228 /* 1280x768@60Hz RB */
229 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
230 1360, 1440, 0, 768, 771, 778, 790, 0,
231 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
233 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
234 1472, 1664, 0, 768, 771, 778, 798, 0,
235 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
237 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
238 1488, 1696, 0, 768, 771, 778, 805, 0,
239 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
241 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
242 1496, 1712, 0, 768, 771, 778, 809, 0,
243 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
244 /* 1280x768@120Hz RB */
245 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
246 1360, 1440, 0, 768, 771, 778, 813, 0,
247 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
248 /* 1280x800@60Hz RB */
249 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
250 1360, 1440, 0, 800, 803, 809, 823, 0,
251 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
253 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
254 1480, 1680, 0, 800, 803, 809, 831, 0,
255 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
257 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
258 1488, 1696, 0, 800, 803, 809, 838, 0,
259 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
261 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
262 1496, 1712, 0, 800, 803, 809, 843, 0,
263 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
264 /* 1280x800@120Hz RB */
265 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
266 1360, 1440, 0, 800, 803, 809, 847, 0,
267 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
269 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
270 1488, 1800, 0, 960, 961, 964, 1000, 0,
271 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
273 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
274 1504, 1728, 0, 960, 961, 964, 1011, 0,
275 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
276 /* 1280x960@120Hz RB */
277 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
278 1360, 1440, 0, 960, 963, 967, 1017, 0,
279 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
281 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
282 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
283 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
285 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
286 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
287 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
289 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
290 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
291 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
292 /* 1280x1024@120Hz RB */
293 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
294 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
295 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
297 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
298 1536, 1792, 0, 768, 771, 777, 795, 0,
299 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
300 /* 1360x768@120Hz RB */
301 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
302 1440, 1520, 0, 768, 771, 776, 813, 0,
303 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
304 /* 1400x1050@60Hz RB */
305 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
306 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
307 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
309 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
310 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
311 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
313 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
314 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
315 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
317 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
318 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
319 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
320 /* 1400x1050@120Hz RB */
321 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
322 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
323 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
324 /* 1440x900@60Hz RB */
325 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
326 1520, 1600, 0, 900, 903, 909, 926, 0,
327 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
329 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
330 1672, 1904, 0, 900, 903, 909, 934, 0,
331 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
333 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
334 1688, 1936, 0, 900, 903, 909, 942, 0,
335 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
337 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
338 1696, 1952, 0, 900, 903, 909, 948, 0,
339 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
340 /* 1440x900@120Hz RB */
341 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
342 1520, 1600, 0, 900, 903, 909, 953, 0,
343 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
345 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
346 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
347 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
349 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
350 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
351 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
353 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
354 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
355 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
357 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
358 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
359 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
361 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
362 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
363 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
364 /* 1600x1200@120Hz RB */
365 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
366 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
367 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
368 /* 1680x1050@60Hz RB */
369 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
370 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
371 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
373 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
374 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
375 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
377 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
378 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
379 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
381 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
382 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
383 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
384 /* 1680x1050@120Hz RB */
385 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
386 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
387 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
389 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
390 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
391 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
393 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
394 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
395 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
396 /* 1792x1344@120Hz RB */
397 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
398 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
399 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
401 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
402 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
403 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
405 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
406 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
407 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
408 /* 1856x1392@120Hz RB */
409 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
410 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
411 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
412 /* 1920x1200@60Hz RB */
413 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
414 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
415 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
417 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
418 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
419 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
421 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
422 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
423 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
425 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
426 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
427 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
428 /* 1920x1200@120Hz RB */
429 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
430 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
431 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
433 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
434 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
435 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
437 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
438 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
439 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
440 /* 1920x1440@120Hz RB */
441 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
442 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
443 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
444 /* 2560x1600@60Hz RB */
445 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
446 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
447 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
449 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
450 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
453 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
454 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
455 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
457 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
458 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
459 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
460 /* 2560x1600@120Hz RB */
461 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
462 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
466 static const struct drm_display_mode edid_est_modes[] = {
467 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
468 968, 1056, 0, 600, 601, 605, 628, 0,
469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
470 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
471 896, 1024, 0, 600, 601, 603, 625, 0,
472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
473 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
474 720, 840, 0, 480, 481, 484, 500, 0,
475 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
476 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
477 704, 832, 0, 480, 489, 491, 520, 0,
478 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
479 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
480 768, 864, 0, 480, 483, 486, 525, 0,
481 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
482 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
483 752, 800, 0, 480, 490, 492, 525, 0,
484 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
485 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
486 846, 900, 0, 400, 421, 423, 449, 0,
487 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
488 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
489 846, 900, 0, 400, 412, 414, 449, 0,
490 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
491 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
492 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
494 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
495 1136, 1312, 0, 768, 769, 772, 800, 0,
496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
497 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
498 1184, 1328, 0, 768, 771, 777, 806, 0,
499 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
500 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
501 1184, 1344, 0, 768, 771, 777, 806, 0,
502 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
503 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
504 1208, 1264, 0, 768, 768, 776, 817, 0,
505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
506 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
507 928, 1152, 0, 624, 625, 628, 667, 0,
508 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
509 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
510 896, 1056, 0, 600, 601, 604, 625, 0,
511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
512 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
513 976, 1040, 0, 600, 637, 643, 666, 0,
514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
515 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
516 1344, 1600, 0, 864, 865, 868, 900, 0,
517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
527 static const struct minimode est3_modes[] = {
535 { 1024, 768, 85, 0 },
536 { 1152, 864, 75, 0 },
538 { 1280, 768, 60, 1 },
539 { 1280, 768, 60, 0 },
540 { 1280, 768, 75, 0 },
541 { 1280, 768, 85, 0 },
542 { 1280, 960, 60, 0 },
543 { 1280, 960, 85, 0 },
544 { 1280, 1024, 60, 0 },
545 { 1280, 1024, 85, 0 },
547 { 1360, 768, 60, 0 },
548 { 1440, 900, 60, 1 },
549 { 1440, 900, 60, 0 },
550 { 1440, 900, 75, 0 },
551 { 1440, 900, 85, 0 },
552 { 1400, 1050, 60, 1 },
553 { 1400, 1050, 60, 0 },
554 { 1400, 1050, 75, 0 },
556 { 1400, 1050, 85, 0 },
557 { 1680, 1050, 60, 1 },
558 { 1680, 1050, 60, 0 },
559 { 1680, 1050, 75, 0 },
560 { 1680, 1050, 85, 0 },
561 { 1600, 1200, 60, 0 },
562 { 1600, 1200, 65, 0 },
563 { 1600, 1200, 70, 0 },
565 { 1600, 1200, 75, 0 },
566 { 1600, 1200, 85, 0 },
567 { 1792, 1344, 60, 0 },
568 { 1792, 1344, 85, 0 },
569 { 1856, 1392, 60, 0 },
570 { 1856, 1392, 75, 0 },
571 { 1920, 1200, 60, 1 },
572 { 1920, 1200, 60, 0 },
574 { 1920, 1200, 75, 0 },
575 { 1920, 1200, 85, 0 },
576 { 1920, 1440, 60, 0 },
577 { 1920, 1440, 75, 0 },
580 static const struct minimode extra_modes[] = {
581 { 1024, 576, 60, 0 },
582 { 1366, 768, 60, 0 },
583 { 1600, 900, 60, 0 },
584 { 1680, 945, 60, 0 },
585 { 1920, 1080, 60, 0 },
586 { 2048, 1152, 60, 0 },
587 { 2048, 1536, 60, 0 },
591 * Probably taken from CEA-861 spec.
592 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
594 static const struct drm_display_mode edid_cea_modes[] = {
595 /* 1 - 640x480@60Hz */
596 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
597 752, 800, 0, 480, 490, 492, 525, 0,
598 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
600 /* 2 - 720x480@60Hz */
601 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
602 798, 858, 0, 480, 489, 495, 525, 0,
603 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
605 /* 3 - 720x480@60Hz */
606 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
607 798, 858, 0, 480, 489, 495, 525, 0,
608 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
610 /* 4 - 1280x720@60Hz */
611 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
612 1430, 1650, 0, 720, 725, 730, 750, 0,
613 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
615 /* 5 - 1920x1080i@60Hz */
616 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
617 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
618 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
619 DRM_MODE_FLAG_INTERLACE),
621 /* 6 - 1440x480i@60Hz */
622 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
623 1602, 1716, 0, 480, 488, 494, 525, 0,
624 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
625 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
627 /* 7 - 1440x480i@60Hz */
628 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
629 1602, 1716, 0, 480, 488, 494, 525, 0,
630 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
631 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
633 /* 8 - 1440x240@60Hz */
634 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
635 1602, 1716, 0, 240, 244, 247, 262, 0,
636 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
637 DRM_MODE_FLAG_DBLCLK),
639 /* 9 - 1440x240@60Hz */
640 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
641 1602, 1716, 0, 240, 244, 247, 262, 0,
642 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
643 DRM_MODE_FLAG_DBLCLK),
645 /* 10 - 2880x480i@60Hz */
646 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
647 3204, 3432, 0, 480, 488, 494, 525, 0,
648 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
649 DRM_MODE_FLAG_INTERLACE),
651 /* 11 - 2880x480i@60Hz */
652 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
653 3204, 3432, 0, 480, 488, 494, 525, 0,
654 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
655 DRM_MODE_FLAG_INTERLACE),
657 /* 12 - 2880x240@60Hz */
658 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
659 3204, 3432, 0, 240, 244, 247, 262, 0,
660 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
662 /* 13 - 2880x240@60Hz */
663 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
664 3204, 3432, 0, 240, 244, 247, 262, 0,
665 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
667 /* 14 - 1440x480@60Hz */
668 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
669 1596, 1716, 0, 480, 489, 495, 525, 0,
670 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
672 /* 15 - 1440x480@60Hz */
673 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
674 1596, 1716, 0, 480, 489, 495, 525, 0,
675 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
677 /* 16 - 1920x1080@60Hz */
678 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
679 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
680 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
682 /* 17 - 720x576@50Hz */
683 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
684 796, 864, 0, 576, 581, 586, 625, 0,
685 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
687 /* 18 - 720x576@50Hz */
688 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
689 796, 864, 0, 576, 581, 586, 625, 0,
690 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
692 /* 19 - 1280x720@50Hz */
693 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
694 1760, 1980, 0, 720, 725, 730, 750, 0,
695 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
697 /* 20 - 1920x1080i@50Hz */
698 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
699 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
700 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
701 DRM_MODE_FLAG_INTERLACE),
703 /* 21 - 1440x576i@50Hz */
704 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
705 1590, 1728, 0, 576, 580, 586, 625, 0,
706 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
707 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
709 /* 22 - 1440x576i@50Hz */
710 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
711 1590, 1728, 0, 576, 580, 586, 625, 0,
712 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
713 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
715 /* 23 - 1440x288@50Hz */
716 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
717 1590, 1728, 0, 288, 290, 293, 312, 0,
718 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
719 DRM_MODE_FLAG_DBLCLK),
721 /* 24 - 1440x288@50Hz */
722 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
723 1590, 1728, 0, 288, 290, 293, 312, 0,
724 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
725 DRM_MODE_FLAG_DBLCLK),
727 /* 25 - 2880x576i@50Hz */
728 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
729 3180, 3456, 0, 576, 580, 586, 625, 0,
730 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
731 DRM_MODE_FLAG_INTERLACE),
733 /* 26 - 2880x576i@50Hz */
734 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
735 3180, 3456, 0, 576, 580, 586, 625, 0,
736 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
737 DRM_MODE_FLAG_INTERLACE),
739 /* 27 - 2880x288@50Hz */
740 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
741 3180, 3456, 0, 288, 290, 293, 312, 0,
742 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
744 /* 28 - 2880x288@50Hz */
745 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
746 3180, 3456, 0, 288, 290, 293, 312, 0,
747 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
749 /* 29 - 1440x576@50Hz */
750 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
751 1592, 1728, 0, 576, 581, 586, 625, 0,
752 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
754 /* 30 - 1440x576@50Hz */
755 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
756 1592, 1728, 0, 576, 581, 586, 625, 0,
757 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
759 /* 31 - 1920x1080@50Hz */
760 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
761 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
762 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
764 /* 32 - 1920x1080@24Hz */
765 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
766 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
767 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
769 /* 33 - 1920x1080@25Hz */
770 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
771 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
772 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
774 /* 34 - 1920x1080@30Hz */
775 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
776 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
777 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
779 /* 35 - 2880x480@60Hz */
780 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
781 3192, 3432, 0, 480, 489, 495, 525, 0,
782 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
784 /* 36 - 2880x480@60Hz */
785 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
786 3192, 3432, 0, 480, 489, 495, 525, 0,
787 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
789 /* 37 - 2880x576@50Hz */
790 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
791 3184, 3456, 0, 576, 581, 586, 625, 0,
792 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
794 /* 38 - 2880x576@50Hz */
795 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
796 3184, 3456, 0, 576, 581, 586, 625, 0,
797 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
799 /* 39 - 1920x1080i@50Hz */
800 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
801 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
802 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
803 DRM_MODE_FLAG_INTERLACE),
805 /* 40 - 1920x1080i@100Hz */
806 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
807 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
808 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
809 DRM_MODE_FLAG_INTERLACE),
811 /* 41 - 1280x720@100Hz */
812 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
813 1760, 1980, 0, 720, 725, 730, 750, 0,
814 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
816 /* 42 - 720x576@100Hz */
817 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
818 796, 864, 0, 576, 581, 586, 625, 0,
819 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
821 /* 43 - 720x576@100Hz */
822 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
823 796, 864, 0, 576, 581, 586, 625, 0,
824 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
826 /* 44 - 1440x576i@100Hz */
827 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
828 1590, 1728, 0, 576, 580, 586, 625, 0,
829 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
830 DRM_MODE_FLAG_DBLCLK),
832 /* 45 - 1440x576i@100Hz */
833 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
834 1590, 1728, 0, 576, 580, 586, 625, 0,
835 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
836 DRM_MODE_FLAG_DBLCLK),
838 /* 46 - 1920x1080i@120Hz */
839 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
840 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
841 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
842 DRM_MODE_FLAG_INTERLACE),
844 /* 47 - 1280x720@120Hz */
845 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
846 1430, 1650, 0, 720, 725, 730, 750, 0,
847 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
849 /* 48 - 720x480@120Hz */
850 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
851 798, 858, 0, 480, 489, 495, 525, 0,
852 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
854 /* 49 - 720x480@120Hz */
855 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
856 798, 858, 0, 480, 489, 495, 525, 0,
857 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
859 /* 50 - 1440x480i@120Hz */
860 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
861 1602, 1716, 0, 480, 488, 494, 525, 0,
862 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
863 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
865 /* 51 - 1440x480i@120Hz */
866 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
867 1602, 1716, 0, 480, 488, 494, 525, 0,
868 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
869 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
871 /* 52 - 720x576@200Hz */
872 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
873 796, 864, 0, 576, 581, 586, 625, 0,
874 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
876 /* 53 - 720x576@200Hz */
877 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
878 796, 864, 0, 576, 581, 586, 625, 0,
879 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
881 /* 54 - 1440x576i@200Hz */
882 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
883 1590, 1728, 0, 576, 580, 586, 625, 0,
884 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
885 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
887 /* 55 - 1440x576i@200Hz */
888 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
889 1590, 1728, 0, 576, 580, 586, 625, 0,
890 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
891 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
893 /* 56 - 720x480@240Hz */
894 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
895 798, 858, 0, 480, 489, 495, 525, 0,
896 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
898 /* 57 - 720x480@240Hz */
899 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
900 798, 858, 0, 480, 489, 495, 525, 0,
901 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
903 /* 58 - 1440x480i@240 */
904 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
905 1602, 1716, 0, 480, 488, 494, 525, 0,
906 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
907 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
909 /* 59 - 1440x480i@240 */
910 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
911 1602, 1716, 0, 480, 488, 494, 525, 0,
912 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
913 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
915 /* 60 - 1280x720@24Hz */
916 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
917 3080, 3300, 0, 720, 725, 730, 750, 0,
918 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
920 /* 61 - 1280x720@25Hz */
921 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
922 3740, 3960, 0, 720, 725, 730, 750, 0,
923 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
925 /* 62 - 1280x720@30Hz */
926 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
927 3080, 3300, 0, 720, 725, 730, 750, 0,
928 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
930 /* 63 - 1920x1080@120Hz */
931 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
932 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
933 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
935 /* 64 - 1920x1080@100Hz */
936 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
937 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
938 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
942 /*** DDC fetch and block validation ***/
944 static const u8 edid_header[] = {
945 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
949 * Sanity check the header of the base EDID block. Return 8 if the header
950 * is perfect, down to 0 if it's totally wrong.
952 int drm_edid_header_is_valid(const u8 *raw_edid)
956 for (i = 0; i < sizeof(edid_header); i++)
957 if (raw_edid[i] == edid_header[i])
962 EXPORT_SYMBOL(drm_edid_header_is_valid);
964 static int edid_fixup __read_mostly = 6;
965 module_param_named(edid_fixup, edid_fixup, int, 0400);
966 MODULE_PARM_DESC(edid_fixup,
967 "Minimum number of valid EDID header bytes (0-8, default 6)");
970 * Sanity check the EDID block (base or extension). Return 0 if the block
971 * doesn't check out, or 1 if it's valid.
973 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
977 struct edid *edid = (struct edid *)raw_edid;
979 if (edid_fixup > 8 || edid_fixup < 0)
983 int score = drm_edid_header_is_valid(raw_edid);
985 else if (score >= edid_fixup) {
986 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
987 memcpy(raw_edid, edid_header, sizeof(edid_header));
993 for (i = 0; i < EDID_LENGTH; i++)
996 if (print_bad_edid) {
997 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1000 /* allow CEA to slide through, switches mangle this */
1001 if (raw_edid[0] != 0x02)
1005 /* per-block-type checks */
1006 switch (raw_edid[0]) {
1008 if (edid->version != 1) {
1009 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1013 if (edid->revision > 4)
1014 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1024 if (raw_edid && print_bad_edid) {
1025 printk(KERN_ERR "Raw EDID:\n");
1026 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1027 raw_edid, EDID_LENGTH, false);
1031 EXPORT_SYMBOL(drm_edid_block_valid);
1034 * drm_edid_is_valid - sanity check EDID data
1037 * Sanity-check an entire EDID record (including extensions)
1039 bool drm_edid_is_valid(struct edid *edid)
1042 u8 *raw = (u8 *)edid;
1047 for (i = 0; i <= edid->extensions; i++)
1048 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
1053 EXPORT_SYMBOL(drm_edid_is_valid);
1055 #define DDC_SEGMENT_ADDR 0x30
1057 * Get EDID information via I2C.
1059 * \param adapter : i2c device adaptor
1060 * \param buf : EDID data buffer to be filled
1061 * \param len : EDID data buffer length
1062 * \return 0 on success or -1 on failure.
1064 * Try to fetch EDID information by calling i2c driver function.
1067 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
1070 unsigned char start = block * EDID_LENGTH;
1071 unsigned char segment = block >> 1;
1072 unsigned char xfers = segment ? 3 : 2;
1073 int ret, retries = 5;
1075 /* The core i2c driver will automatically retry the transfer if the
1076 * adapter reports EAGAIN. However, we find that bit-banging transfers
1077 * are susceptible to errors under a heavily loaded machine and
1078 * generate spurious NAKs and timeouts. Retrying the transfer
1079 * of the individual block a few times seems to overcome this.
1082 struct i2c_msg msgs[] = {
1084 .addr = DDC_SEGMENT_ADDR,
1102 * Avoid sending the segment addr to not upset non-compliant ddc
1105 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1107 if (ret == -ENXIO) {
1108 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1112 } while (ret != xfers && --retries);
1114 return ret == xfers ? 0 : -1;
1117 static bool drm_edid_is_zero(u8 *in_edid, int length)
1119 if (memchr_inv(in_edid, 0, length))
1126 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
1128 int i, j = 0, valid_extensions = 0;
1130 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1132 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1135 /* base block fetch */
1136 for (i = 0; i < 4; i++) {
1137 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
1139 if (drm_edid_block_valid(block, 0, print_bad_edid))
1141 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1142 connector->null_edid_counter++;
1149 /* if there's no extensions, we're done */
1150 if (block[0x7e] == 0)
1153 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1158 for (j = 1; j <= block[0x7e]; j++) {
1159 for (i = 0; i < 4; i++) {
1160 if (drm_do_probe_ddc_edid(adapter,
1161 block + (valid_extensions + 1) * EDID_LENGTH,
1164 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1170 if (i == 4 && print_bad_edid) {
1171 dev_warn(connector->dev->dev,
1172 "%s: Ignoring invalid EDID block %d.\n",
1173 drm_get_connector_name(connector), j);
1175 connector->bad_edid_counter++;
1179 if (valid_extensions != block[0x7e]) {
1180 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1181 block[0x7e] = valid_extensions;
1182 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1191 if (print_bad_edid) {
1192 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1193 drm_get_connector_name(connector), j);
1195 connector->bad_edid_counter++;
1203 * Probe DDC presence.
1205 * \param adapter : i2c device adaptor
1206 * \return 1 on success
1209 drm_probe_ddc(struct i2c_adapter *adapter)
1213 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1215 EXPORT_SYMBOL(drm_probe_ddc);
1218 * drm_get_edid - get EDID data, if available
1219 * @connector: connector we're probing
1220 * @adapter: i2c adapter to use for DDC
1222 * Poke the given i2c channel to grab EDID data if possible. If found,
1223 * attach it to the connector.
1225 * Return edid data or NULL if we couldn't find any.
1227 struct edid *drm_get_edid(struct drm_connector *connector,
1228 struct i2c_adapter *adapter)
1230 struct edid *edid = NULL;
1232 if (drm_probe_ddc(adapter))
1233 edid = (struct edid *)drm_do_get_edid(connector, adapter);
1237 EXPORT_SYMBOL(drm_get_edid);
1239 /*** EDID parsing ***/
1242 * edid_vendor - match a string against EDID's obfuscated vendor field
1243 * @edid: EDID to match
1244 * @vendor: vendor string
1246 * Returns true if @vendor is in @edid, false otherwise
1248 static bool edid_vendor(struct edid *edid, char *vendor)
1250 char edid_vendor[3];
1252 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1253 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1254 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1255 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1257 return !strncmp(edid_vendor, vendor, 3);
1261 * edid_get_quirks - return quirk flags for a given EDID
1262 * @edid: EDID to process
1264 * This tells subsequent routines what fixes they need to apply.
1266 static u32 edid_get_quirks(struct edid *edid)
1268 struct edid_quirk *quirk;
1271 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1272 quirk = &edid_quirk_list[i];
1274 if (edid_vendor(edid, quirk->vendor) &&
1275 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1276 return quirk->quirks;
1282 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1283 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
1286 * edid_fixup_preferred - set preferred modes based on quirk list
1287 * @connector: has mode list to fix up
1288 * @quirks: quirks list
1290 * Walk the mode list for @connector, clearing the preferred status
1291 * on existing modes and setting it anew for the right mode ala @quirks.
1293 static void edid_fixup_preferred(struct drm_connector *connector,
1296 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1297 int target_refresh = 0;
1299 if (list_empty(&connector->probed_modes))
1302 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1303 target_refresh = 60;
1304 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1305 target_refresh = 75;
1307 preferred_mode = list_first_entry(&connector->probed_modes,
1308 struct drm_display_mode, head);
1310 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1311 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1313 if (cur_mode == preferred_mode)
1316 /* Largest mode is preferred */
1317 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1318 preferred_mode = cur_mode;
1320 /* At a given size, try to get closest to target refresh */
1321 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1322 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
1323 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
1324 preferred_mode = cur_mode;
1328 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1332 mode_is_rb(const struct drm_display_mode *mode)
1334 return (mode->htotal - mode->hdisplay == 160) &&
1335 (mode->hsync_end - mode->hdisplay == 80) &&
1336 (mode->hsync_end - mode->hsync_start == 32) &&
1337 (mode->vsync_start - mode->vdisplay == 3);
1341 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1342 * @dev: Device to duplicate against
1343 * @hsize: Mode width
1344 * @vsize: Mode height
1345 * @fresh: Mode refresh rate
1346 * @rb: Mode reduced-blanking-ness
1348 * Walk the DMT mode list looking for a match for the given parameters.
1349 * Return a newly allocated copy of the mode, or NULL if not found.
1351 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1352 int hsize, int vsize, int fresh,
1357 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1358 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1359 if (hsize != ptr->hdisplay)
1361 if (vsize != ptr->vdisplay)
1363 if (fresh != drm_mode_vrefresh(ptr))
1365 if (rb != mode_is_rb(ptr))
1368 return drm_mode_duplicate(dev, ptr);
1373 EXPORT_SYMBOL(drm_mode_find_dmt);
1375 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1378 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1382 u8 *det_base = ext + d;
1385 for (i = 0; i < n; i++)
1386 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1390 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1392 unsigned int i, n = min((int)ext[0x02], 6);
1393 u8 *det_base = ext + 5;
1396 return; /* unknown version */
1398 for (i = 0; i < n; i++)
1399 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1403 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1406 struct edid *edid = (struct edid *)raw_edid;
1411 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1412 cb(&(edid->detailed_timings[i]), closure);
1414 for (i = 1; i <= raw_edid[0x7e]; i++) {
1415 u8 *ext = raw_edid + (i * EDID_LENGTH);
1418 cea_for_each_detailed_block(ext, cb, closure);
1421 vtb_for_each_detailed_block(ext, cb, closure);
1430 is_rb(struct detailed_timing *t, void *data)
1433 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1435 *(bool *)data = true;
1438 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1440 drm_monitor_supports_rb(struct edid *edid)
1442 if (edid->revision >= 4) {
1444 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1448 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1452 find_gtf2(struct detailed_timing *t, void *data)
1455 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1459 /* Secondary GTF curve kicks in above some break frequency */
1461 drm_gtf2_hbreak(struct edid *edid)
1464 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1465 return r ? (r[12] * 2) : 0;
1469 drm_gtf2_2c(struct edid *edid)
1472 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1473 return r ? r[13] : 0;
1477 drm_gtf2_m(struct edid *edid)
1480 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1481 return r ? (r[15] << 8) + r[14] : 0;
1485 drm_gtf2_k(struct edid *edid)
1488 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1489 return r ? r[16] : 0;
1493 drm_gtf2_2j(struct edid *edid)
1496 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1497 return r ? r[17] : 0;
1501 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1502 * @edid: EDID block to scan
1504 static int standard_timing_level(struct edid *edid)
1506 if (edid->revision >= 2) {
1507 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1509 if (drm_gtf2_hbreak(edid))
1517 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1518 * monitors fill with ascii space (0x20) instead.
1521 bad_std_timing(u8 a, u8 b)
1523 return (a == 0x00 && b == 0x00) ||
1524 (a == 0x01 && b == 0x01) ||
1525 (a == 0x20 && b == 0x20);
1529 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1530 * @t: standard timing params
1531 * @timing_level: standard timing level
1533 * Take the standard timing params (in this case width, aspect, and refresh)
1534 * and convert them into a real mode using CVT/GTF/DMT.
1536 static struct drm_display_mode *
1537 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1538 struct std_timing *t, int revision)
1540 struct drm_device *dev = connector->dev;
1541 struct drm_display_mode *m, *mode = NULL;
1544 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1545 >> EDID_TIMING_ASPECT_SHIFT;
1546 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1547 >> EDID_TIMING_VFREQ_SHIFT;
1548 int timing_level = standard_timing_level(edid);
1550 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1553 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1554 hsize = t->hsize * 8 + 248;
1555 /* vrefresh_rate = vfreq + 60 */
1556 vrefresh_rate = vfreq + 60;
1557 /* the vdisplay is calculated based on the aspect ratio */
1558 if (aspect_ratio == 0) {
1562 vsize = (hsize * 10) / 16;
1563 } else if (aspect_ratio == 1)
1564 vsize = (hsize * 3) / 4;
1565 else if (aspect_ratio == 2)
1566 vsize = (hsize * 4) / 5;
1568 vsize = (hsize * 9) / 16;
1570 /* HDTV hack, part 1 */
1571 if (vrefresh_rate == 60 &&
1572 ((hsize == 1360 && vsize == 765) ||
1573 (hsize == 1368 && vsize == 769))) {
1579 * If this connector already has a mode for this size and refresh
1580 * rate (because it came from detailed or CVT info), use that
1581 * instead. This way we don't have to guess at interlace or
1584 list_for_each_entry(m, &connector->probed_modes, head)
1585 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1586 drm_mode_vrefresh(m) == vrefresh_rate)
1589 /* HDTV hack, part 2 */
1590 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1591 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1593 mode->hdisplay = 1366;
1594 mode->hsync_start = mode->hsync_start - 1;
1595 mode->hsync_end = mode->hsync_end - 1;
1599 /* check whether it can be found in default mode table */
1600 if (drm_monitor_supports_rb(edid)) {
1601 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1606 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1610 /* okay, generate it */
1611 switch (timing_level) {
1615 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1619 * This is potentially wrong if there's ever a monitor with
1620 * more than one ranges section, each claiming a different
1621 * secondary GTF curve. Please don't do that.
1623 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1626 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1627 drm_mode_destroy(dev, mode);
1628 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1629 vrefresh_rate, 0, 0,
1637 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1645 * EDID is delightfully ambiguous about how interlaced modes are to be
1646 * encoded. Our internal representation is of frame height, but some
1647 * HDTV detailed timings are encoded as field height.
1649 * The format list here is from CEA, in frame size. Technically we
1650 * should be checking refresh rate too. Whatever.
1653 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1654 struct detailed_pixel_timing *pt)
1657 static const struct {
1659 } cea_interlaced[] = {
1669 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1672 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1673 if ((mode->hdisplay == cea_interlaced[i].w) &&
1674 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1675 mode->vdisplay *= 2;
1676 mode->vsync_start *= 2;
1677 mode->vsync_end *= 2;
1683 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1687 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1688 * @dev: DRM device (needed to create new mode)
1690 * @timing: EDID detailed timing info
1691 * @quirks: quirks to apply
1693 * An EDID detailed timing block contains enough info for us to create and
1694 * return a new struct drm_display_mode.
1696 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1698 struct detailed_timing *timing,
1701 struct drm_display_mode *mode;
1702 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1703 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1704 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1705 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1706 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1707 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1708 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1709 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1710 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1712 /* ignore tiny modes */
1713 if (hactive < 64 || vactive < 64)
1716 if (pt->misc & DRM_EDID_PT_STEREO) {
1717 printk(KERN_WARNING "stereo mode not supported\n");
1720 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1721 printk(KERN_WARNING "composite sync not supported\n");
1724 /* it is incorrect if hsync/vsync width is zero */
1725 if (!hsync_pulse_width || !vsync_pulse_width) {
1726 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1727 "Wrong Hsync/Vsync pulse width\n");
1731 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1732 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1739 mode = drm_mode_create(dev);
1743 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1744 timing->pixel_clock = cpu_to_le16(1088);
1746 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1748 mode->hdisplay = hactive;
1749 mode->hsync_start = mode->hdisplay + hsync_offset;
1750 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1751 mode->htotal = mode->hdisplay + hblank;
1753 mode->vdisplay = vactive;
1754 mode->vsync_start = mode->vdisplay + vsync_offset;
1755 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1756 mode->vtotal = mode->vdisplay + vblank;
1758 /* Some EDIDs have bogus h/vtotal values */
1759 if (mode->hsync_end > mode->htotal)
1760 mode->htotal = mode->hsync_end + 1;
1761 if (mode->vsync_end > mode->vtotal)
1762 mode->vtotal = mode->vsync_end + 1;
1764 drm_mode_do_interlace_quirk(mode, pt);
1766 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1767 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1770 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1771 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1772 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1773 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1776 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1777 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1779 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1780 mode->width_mm *= 10;
1781 mode->height_mm *= 10;
1784 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1785 mode->width_mm = edid->width_cm * 10;
1786 mode->height_mm = edid->height_cm * 10;
1789 mode->type = DRM_MODE_TYPE_DRIVER;
1790 mode->vrefresh = drm_mode_vrefresh(mode);
1791 drm_mode_set_name(mode);
1797 mode_in_hsync_range(const struct drm_display_mode *mode,
1798 struct edid *edid, u8 *t)
1800 int hsync, hmin, hmax;
1803 if (edid->revision >= 4)
1804 hmin += ((t[4] & 0x04) ? 255 : 0);
1806 if (edid->revision >= 4)
1807 hmax += ((t[4] & 0x08) ? 255 : 0);
1808 hsync = drm_mode_hsync(mode);
1810 return (hsync <= hmax && hsync >= hmin);
1814 mode_in_vsync_range(const struct drm_display_mode *mode,
1815 struct edid *edid, u8 *t)
1817 int vsync, vmin, vmax;
1820 if (edid->revision >= 4)
1821 vmin += ((t[4] & 0x01) ? 255 : 0);
1823 if (edid->revision >= 4)
1824 vmax += ((t[4] & 0x02) ? 255 : 0);
1825 vsync = drm_mode_vrefresh(mode);
1827 return (vsync <= vmax && vsync >= vmin);
1831 range_pixel_clock(struct edid *edid, u8 *t)
1834 if (t[9] == 0 || t[9] == 255)
1837 /* 1.4 with CVT support gives us real precision, yay */
1838 if (edid->revision >= 4 && t[10] == 0x04)
1839 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1841 /* 1.3 is pathetic, so fuzz up a bit */
1842 return t[9] * 10000 + 5001;
1846 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1847 struct detailed_timing *timing)
1850 u8 *t = (u8 *)timing;
1852 if (!mode_in_hsync_range(mode, edid, t))
1855 if (!mode_in_vsync_range(mode, edid, t))
1858 if ((max_clock = range_pixel_clock(edid, t)))
1859 if (mode->clock > max_clock)
1862 /* 1.4 max horizontal check */
1863 if (edid->revision >= 4 && t[10] == 0x04)
1864 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1867 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1873 static bool valid_inferred_mode(const struct drm_connector *connector,
1874 const struct drm_display_mode *mode)
1876 struct drm_display_mode *m;
1879 list_for_each_entry(m, &connector->probed_modes, head) {
1880 if (mode->hdisplay == m->hdisplay &&
1881 mode->vdisplay == m->vdisplay &&
1882 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1883 return false; /* duplicated */
1884 if (mode->hdisplay <= m->hdisplay &&
1885 mode->vdisplay <= m->vdisplay)
1892 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1893 struct detailed_timing *timing)
1896 struct drm_display_mode *newmode;
1897 struct drm_device *dev = connector->dev;
1899 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1900 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1901 valid_inferred_mode(connector, drm_dmt_modes + i)) {
1902 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1904 drm_mode_probed_add(connector, newmode);
1913 /* fix up 1366x768 mode from 1368x768;
1914 * GFT/CVT can't express 1366 width which isn't dividable by 8
1916 static void fixup_mode_1366x768(struct drm_display_mode *mode)
1918 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1919 mode->hdisplay = 1366;
1920 mode->hsync_start--;
1922 drm_mode_set_name(mode);
1927 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1928 struct detailed_timing *timing)
1931 struct drm_display_mode *newmode;
1932 struct drm_device *dev = connector->dev;
1934 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1935 const struct minimode *m = &extra_modes[i];
1936 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
1940 fixup_mode_1366x768(newmode);
1941 if (!mode_in_range(newmode, edid, timing) ||
1942 !valid_inferred_mode(connector, newmode)) {
1943 drm_mode_destroy(dev, newmode);
1947 drm_mode_probed_add(connector, newmode);
1955 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1956 struct detailed_timing *timing)
1959 struct drm_display_mode *newmode;
1960 struct drm_device *dev = connector->dev;
1961 bool rb = drm_monitor_supports_rb(edid);
1963 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1964 const struct minimode *m = &extra_modes[i];
1965 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
1969 fixup_mode_1366x768(newmode);
1970 if (!mode_in_range(newmode, edid, timing) ||
1971 !valid_inferred_mode(connector, newmode)) {
1972 drm_mode_destroy(dev, newmode);
1976 drm_mode_probed_add(connector, newmode);
1984 do_inferred_modes(struct detailed_timing *timing, void *c)
1986 struct detailed_mode_closure *closure = c;
1987 struct detailed_non_pixel *data = &timing->data.other_data;
1988 struct detailed_data_monitor_range *range = &data->data.range;
1990 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1993 closure->modes += drm_dmt_modes_for_range(closure->connector,
1997 if (!version_greater(closure->edid, 1, 1))
1998 return; /* GTF not defined yet */
2000 switch (range->flags) {
2001 case 0x02: /* secondary gtf, XXX could do more */
2002 case 0x00: /* default gtf */
2003 closure->modes += drm_gtf_modes_for_range(closure->connector,
2007 case 0x04: /* cvt, only in 1.4+ */
2008 if (!version_greater(closure->edid, 1, 3))
2011 closure->modes += drm_cvt_modes_for_range(closure->connector,
2015 case 0x01: /* just the ranges, no formula */
2022 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2024 struct detailed_mode_closure closure = {
2025 connector, edid, 0, 0, 0
2028 if (version_greater(edid, 1, 0))
2029 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2032 return closure.modes;
2036 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2038 int i, j, m, modes = 0;
2039 struct drm_display_mode *mode;
2040 u8 *est = ((u8 *)timing) + 5;
2042 for (i = 0; i < 6; i++) {
2043 for (j = 7; j > 0; j--) {
2044 m = (i * 8) + (7 - j);
2045 if (m >= ARRAY_SIZE(est3_modes))
2047 if (est[i] & (1 << j)) {
2048 mode = drm_mode_find_dmt(connector->dev,
2054 drm_mode_probed_add(connector, mode);
2065 do_established_modes(struct detailed_timing *timing, void *c)
2067 struct detailed_mode_closure *closure = c;
2068 struct detailed_non_pixel *data = &timing->data.other_data;
2070 if (data->type == EDID_DETAIL_EST_TIMINGS)
2071 closure->modes += drm_est3_modes(closure->connector, timing);
2075 * add_established_modes - get est. modes from EDID and add them
2076 * @edid: EDID block to scan
2078 * Each EDID block contains a bitmap of the supported "established modes" list
2079 * (defined above). Tease them out and add them to the global modes list.
2082 add_established_modes(struct drm_connector *connector, struct edid *edid)
2084 struct drm_device *dev = connector->dev;
2085 unsigned long est_bits = edid->established_timings.t1 |
2086 (edid->established_timings.t2 << 8) |
2087 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2089 struct detailed_mode_closure closure = {
2090 connector, edid, 0, 0, 0
2093 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2094 if (est_bits & (1<<i)) {
2095 struct drm_display_mode *newmode;
2096 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2098 drm_mode_probed_add(connector, newmode);
2104 if (version_greater(edid, 1, 0))
2105 drm_for_each_detailed_block((u8 *)edid,
2106 do_established_modes, &closure);
2108 return modes + closure.modes;
2112 do_standard_modes(struct detailed_timing *timing, void *c)
2114 struct detailed_mode_closure *closure = c;
2115 struct detailed_non_pixel *data = &timing->data.other_data;
2116 struct drm_connector *connector = closure->connector;
2117 struct edid *edid = closure->edid;
2119 if (data->type == EDID_DETAIL_STD_MODES) {
2121 for (i = 0; i < 6; i++) {
2122 struct std_timing *std;
2123 struct drm_display_mode *newmode;
2125 std = &data->data.timings[i];
2126 newmode = drm_mode_std(connector, edid, std,
2129 drm_mode_probed_add(connector, newmode);
2137 * add_standard_modes - get std. modes from EDID and add them
2138 * @edid: EDID block to scan
2140 * Standard modes can be calculated using the appropriate standard (DMT,
2141 * GTF or CVT. Grab them from @edid and add them to the list.
2144 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2147 struct detailed_mode_closure closure = {
2148 connector, edid, 0, 0, 0
2151 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2152 struct drm_display_mode *newmode;
2154 newmode = drm_mode_std(connector, edid,
2155 &edid->standard_timings[i],
2158 drm_mode_probed_add(connector, newmode);
2163 if (version_greater(edid, 1, 0))
2164 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2167 /* XXX should also look for standard codes in VTB blocks */
2169 return modes + closure.modes;
2172 static int drm_cvt_modes(struct drm_connector *connector,
2173 struct detailed_timing *timing)
2175 int i, j, modes = 0;
2176 struct drm_display_mode *newmode;
2177 struct drm_device *dev = connector->dev;
2178 struct cvt_timing *cvt;
2179 const int rates[] = { 60, 85, 75, 60, 50 };
2180 const u8 empty[3] = { 0, 0, 0 };
2182 for (i = 0; i < 4; i++) {
2183 int uninitialized_var(width), height;
2184 cvt = &(timing->data.other_data.data.cvt[i]);
2186 if (!memcmp(cvt->code, empty, 3))
2189 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2190 switch (cvt->code[1] & 0x0c) {
2192 width = height * 4 / 3;
2195 width = height * 16 / 9;
2198 width = height * 16 / 10;
2201 width = height * 15 / 9;
2205 for (j = 1; j < 5; j++) {
2206 if (cvt->code[2] & (1 << j)) {
2207 newmode = drm_cvt_mode(dev, width, height,
2211 drm_mode_probed_add(connector, newmode);
2222 do_cvt_mode(struct detailed_timing *timing, void *c)
2224 struct detailed_mode_closure *closure = c;
2225 struct detailed_non_pixel *data = &timing->data.other_data;
2227 if (data->type == EDID_DETAIL_CVT_3BYTE)
2228 closure->modes += drm_cvt_modes(closure->connector, timing);
2232 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2234 struct detailed_mode_closure closure = {
2235 connector, edid, 0, 0, 0
2238 if (version_greater(edid, 1, 2))
2239 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2241 /* XXX should also look for CVT codes in VTB blocks */
2243 return closure.modes;
2247 do_detailed_mode(struct detailed_timing *timing, void *c)
2249 struct detailed_mode_closure *closure = c;
2250 struct drm_display_mode *newmode;
2252 if (timing->pixel_clock) {
2253 newmode = drm_mode_detailed(closure->connector->dev,
2254 closure->edid, timing,
2259 if (closure->preferred)
2260 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2262 drm_mode_probed_add(closure->connector, newmode);
2264 closure->preferred = 0;
2269 * add_detailed_modes - Add modes from detailed timings
2270 * @connector: attached connector
2271 * @edid: EDID block to scan
2272 * @quirks: quirks to apply
2275 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2278 struct detailed_mode_closure closure = {
2286 if (closure.preferred && !version_greater(edid, 1, 3))
2288 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2290 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2292 return closure.modes;
2295 #define HDMI_IDENTIFIER 0x000C03
2296 #define AUDIO_BLOCK 0x01
2297 #define VIDEO_BLOCK 0x02
2298 #define VENDOR_BLOCK 0x03
2299 #define SPEAKER_BLOCK 0x04
2300 #define VIDEO_CAPABILITY_BLOCK 0x07
2301 #define EDID_BASIC_AUDIO (1 << 6)
2302 #define EDID_CEA_YCRCB444 (1 << 5)
2303 #define EDID_CEA_YCRCB422 (1 << 4)
2304 #define EDID_CEA_VCDB_QS (1 << 6)
2307 * Search EDID for CEA extension block.
2309 u8 *drm_find_cea_extension(struct edid *edid)
2311 u8 *edid_ext = NULL;
2314 /* No EDID or EDID extensions */
2315 if (edid == NULL || edid->extensions == 0)
2318 /* Find CEA extension */
2319 for (i = 0; i < edid->extensions; i++) {
2320 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2321 if (edid_ext[0] == CEA_EXT)
2325 if (i == edid->extensions)
2330 EXPORT_SYMBOL(drm_find_cea_extension);
2333 * drm_match_cea_mode - look for a CEA mode matching given mode
2334 * @to_match: display mode
2336 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2339 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2343 if (!to_match->clock)
2346 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2347 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2348 unsigned int clock1, clock2;
2350 clock1 = clock2 = cea_mode->clock;
2352 /* Check both 60Hz and 59.94Hz */
2353 if (cea_mode->vrefresh % 6 == 0) {
2355 * edid_cea_modes contains the 59.94Hz
2356 * variant for 240 and 480 line modes,
2357 * and the 60Hz variant otherwise.
2359 if (cea_mode->vdisplay == 240 ||
2360 cea_mode->vdisplay == 480)
2361 clock1 = clock1 * 1001 / 1000;
2363 clock2 = DIV_ROUND_UP(clock2 * 1000, 1001);
2366 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2367 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2368 drm_mode_equal_no_clocks(to_match, cea_mode))
2373 EXPORT_SYMBOL(drm_match_cea_mode);
2377 do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
2379 struct drm_device *dev = connector->dev;
2380 u8 * mode, cea_mode;
2383 for (mode = db; mode < db + len; mode++) {
2384 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
2385 if (cea_mode < ARRAY_SIZE(edid_cea_modes)) {
2386 struct drm_display_mode *newmode;
2387 newmode = drm_mode_duplicate(dev,
2388 &edid_cea_modes[cea_mode]);
2390 newmode->vrefresh = 0;
2391 drm_mode_probed_add(connector, newmode);
2401 cea_db_payload_len(const u8 *db)
2403 return db[0] & 0x1f;
2407 cea_db_tag(const u8 *db)
2413 cea_revision(const u8 *cea)
2419 cea_db_offsets(const u8 *cea, int *start, int *end)
2421 /* Data block offset in CEA extension block */
2426 if (*end < 4 || *end > 127)
2431 #define for_each_cea_db(cea, i, start, end) \
2432 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
2435 add_cea_modes(struct drm_connector *connector, struct edid *edid)
2437 u8 * cea = drm_find_cea_extension(edid);
2441 if (cea && cea_revision(cea) >= 3) {
2444 if (cea_db_offsets(cea, &start, &end))
2447 for_each_cea_db(cea, i, start, end) {
2449 dbl = cea_db_payload_len(db);
2451 if (cea_db_tag(db) == VIDEO_BLOCK)
2452 modes += do_cea_modes (connector, db+1, dbl);
2460 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
2462 u8 len = cea_db_payload_len(db);
2465 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
2466 connector->dvi_dual = db[6] & 1;
2469 connector->max_tmds_clock = db[7] * 5;
2471 connector->latency_present[0] = db[8] >> 7;
2472 connector->latency_present[1] = (db[8] >> 6) & 1;
2475 connector->video_latency[0] = db[9];
2477 connector->audio_latency[0] = db[10];
2479 connector->video_latency[1] = db[11];
2481 connector->audio_latency[1] = db[12];
2483 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
2484 "max TMDS clock %d, "
2485 "latency present %d %d, "
2486 "video latency %d %d, "
2487 "audio latency %d %d\n",
2488 connector->dvi_dual,
2489 connector->max_tmds_clock,
2490 (int) connector->latency_present[0],
2491 (int) connector->latency_present[1],
2492 connector->video_latency[0],
2493 connector->video_latency[1],
2494 connector->audio_latency[0],
2495 connector->audio_latency[1]);
2499 monitor_name(struct detailed_timing *t, void *data)
2501 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
2502 *(u8 **)data = t->data.other_data.data.str.str;
2505 static bool cea_db_is_hdmi_vsdb(const u8 *db)
2509 if (cea_db_tag(db) != VENDOR_BLOCK)
2512 if (cea_db_payload_len(db) < 5)
2515 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
2517 return hdmi_id == HDMI_IDENTIFIER;
2521 * drm_edid_to_eld - build ELD from EDID
2522 * @connector: connector corresponding to the HDMI/DP sink
2523 * @edid: EDID to parse
2525 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
2526 * Some ELD fields are left to the graphics driver caller:
2531 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
2533 uint8_t *eld = connector->eld;
2541 memset(eld, 0, sizeof(connector->eld));
2543 cea = drm_find_cea_extension(edid);
2545 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
2550 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
2551 for (mnl = 0; name && mnl < 13; mnl++) {
2552 if (name[mnl] == 0x0a)
2554 eld[20 + mnl] = name[mnl];
2556 eld[4] = (cea[1] << 5) | mnl;
2557 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
2559 eld[0] = 2 << 3; /* ELD version: 2 */
2561 eld[16] = edid->mfg_id[0];
2562 eld[17] = edid->mfg_id[1];
2563 eld[18] = edid->prod_code[0];
2564 eld[19] = edid->prod_code[1];
2566 if (cea_revision(cea) >= 3) {
2569 if (cea_db_offsets(cea, &start, &end)) {
2574 for_each_cea_db(cea, i, start, end) {
2576 dbl = cea_db_payload_len(db);
2578 switch (cea_db_tag(db)) {
2580 /* Audio Data Block, contains SADs */
2581 sad_count = dbl / 3;
2583 memcpy(eld + 20 + mnl, &db[1], dbl);
2586 /* Speaker Allocation Data Block */
2591 /* HDMI Vendor-Specific Data Block */
2592 if (cea_db_is_hdmi_vsdb(db))
2593 parse_hdmi_vsdb(connector, db);
2600 eld[5] |= sad_count << 4;
2601 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
2603 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
2605 EXPORT_SYMBOL(drm_edid_to_eld);
2608 * drm_edid_to_sad - extracts SADs from EDID
2609 * @edid: EDID to parse
2610 * @sads: pointer that will be set to the extracted SADs
2612 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
2613 * Note: returned pointer needs to be kfreed
2615 * Return number of found SADs or negative number on error.
2617 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
2620 int i, start, end, dbl;
2623 cea = drm_find_cea_extension(edid);
2625 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
2629 if (cea_revision(cea) < 3) {
2630 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
2634 if (cea_db_offsets(cea, &start, &end)) {
2635 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
2639 for_each_cea_db(cea, i, start, end) {
2642 if (cea_db_tag(db) == AUDIO_BLOCK) {
2644 dbl = cea_db_payload_len(db);
2646 count = dbl / 3; /* SAD is 3B */
2647 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
2650 for (j = 0; j < count; j++) {
2651 u8 *sad = &db[1 + j * 3];
2653 (*sads)[j].format = (sad[0] & 0x78) >> 3;
2654 (*sads)[j].channels = sad[0] & 0x7;
2655 (*sads)[j].freq = sad[1] & 0x7F;
2656 (*sads)[j].byte2 = sad[2];
2664 EXPORT_SYMBOL(drm_edid_to_sad);
2667 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
2668 * @connector: connector associated with the HDMI/DP sink
2669 * @mode: the display mode
2671 int drm_av_sync_delay(struct drm_connector *connector,
2672 struct drm_display_mode *mode)
2674 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
2677 if (!connector->latency_present[0])
2679 if (!connector->latency_present[1])
2682 a = connector->audio_latency[i];
2683 v = connector->video_latency[i];
2686 * HDMI/DP sink doesn't support audio or video?
2688 if (a == 255 || v == 255)
2692 * Convert raw EDID values to millisecond.
2693 * Treat unknown latency as 0ms.
2696 a = min(2 * (a - 1), 500);
2698 v = min(2 * (v - 1), 500);
2700 return max(v - a, 0);
2702 EXPORT_SYMBOL(drm_av_sync_delay);
2705 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
2706 * @encoder: the encoder just changed display mode
2707 * @mode: the adjusted display mode
2709 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
2710 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
2712 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
2713 struct drm_display_mode *mode)
2715 struct drm_connector *connector;
2716 struct drm_device *dev = encoder->dev;
2718 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
2719 if (connector->encoder == encoder && connector->eld[0])
2724 EXPORT_SYMBOL(drm_select_eld);
2727 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
2728 * @edid: monitor EDID information
2730 * Parse the CEA extension according to CEA-861-B.
2731 * Return true if HDMI, false if not or unknown.
2733 bool drm_detect_hdmi_monitor(struct edid *edid)
2737 int start_offset, end_offset;
2739 edid_ext = drm_find_cea_extension(edid);
2743 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
2747 * Because HDMI identifier is in Vendor Specific Block,
2748 * search it from all data blocks of CEA extension.
2750 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
2751 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
2757 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
2760 * drm_detect_monitor_audio - check monitor audio capability
2762 * Monitor should have CEA extension block.
2763 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
2764 * audio' only. If there is any audio extension block and supported
2765 * audio format, assume at least 'basic audio' support, even if 'basic
2766 * audio' is not defined in EDID.
2769 bool drm_detect_monitor_audio(struct edid *edid)
2773 bool has_audio = false;
2774 int start_offset, end_offset;
2776 edid_ext = drm_find_cea_extension(edid);
2780 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
2783 DRM_DEBUG_KMS("Monitor has basic audio support\n");
2787 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
2790 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
2791 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
2793 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
2794 DRM_DEBUG_KMS("CEA audio format %d\n",
2795 (edid_ext[i + j] >> 3) & 0xf);
2802 EXPORT_SYMBOL(drm_detect_monitor_audio);
2805 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
2807 * Check whether the monitor reports the RGB quantization range selection
2808 * as supported. The AVI infoframe can then be used to inform the monitor
2809 * which quantization range (full or limited) is used.
2811 bool drm_rgb_quant_range_selectable(struct edid *edid)
2816 edid_ext = drm_find_cea_extension(edid);
2820 if (cea_db_offsets(edid_ext, &start, &end))
2823 for_each_cea_db(edid_ext, i, start, end) {
2824 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
2825 cea_db_payload_len(&edid_ext[i]) == 2) {
2826 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
2827 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
2833 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
2836 * drm_add_display_info - pull display info out if present
2838 * @info: display info (attached to connector)
2840 * Grab any available display info and stuff it into the drm_display_info
2841 * structure that's part of the connector. Useful for tracking bpp and
2844 static void drm_add_display_info(struct edid *edid,
2845 struct drm_display_info *info)
2849 info->width_mm = edid->width_cm * 10;
2850 info->height_mm = edid->height_cm * 10;
2852 /* driver figures it out in this case */
2854 info->color_formats = 0;
2856 if (edid->revision < 3)
2859 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
2862 /* Get data from CEA blocks if present */
2863 edid_ext = drm_find_cea_extension(edid);
2865 info->cea_rev = edid_ext[1];
2867 /* The existence of a CEA block should imply RGB support */
2868 info->color_formats = DRM_COLOR_FORMAT_RGB444;
2869 if (edid_ext[3] & EDID_CEA_YCRCB444)
2870 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2871 if (edid_ext[3] & EDID_CEA_YCRCB422)
2872 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
2875 /* Only defined for 1.4 with digital displays */
2876 if (edid->revision < 4)
2879 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
2880 case DRM_EDID_DIGITAL_DEPTH_6:
2883 case DRM_EDID_DIGITAL_DEPTH_8:
2886 case DRM_EDID_DIGITAL_DEPTH_10:
2889 case DRM_EDID_DIGITAL_DEPTH_12:
2892 case DRM_EDID_DIGITAL_DEPTH_14:
2895 case DRM_EDID_DIGITAL_DEPTH_16:
2898 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
2904 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
2905 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
2906 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2907 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
2908 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
2912 * drm_add_edid_modes - add modes from EDID data, if available
2913 * @connector: connector we're probing
2916 * Add the specified modes to the connector's mode list.
2918 * Return number of modes added or 0 if we couldn't find any.
2920 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
2928 if (!drm_edid_is_valid(edid)) {
2929 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
2930 drm_get_connector_name(connector));
2934 quirks = edid_get_quirks(edid);
2937 * EDID spec says modes should be preferred in this order:
2938 * - preferred detailed mode
2939 * - other detailed modes from base block
2940 * - detailed modes from extension blocks
2941 * - CVT 3-byte code modes
2942 * - standard timing codes
2943 * - established timing codes
2944 * - modes inferred from GTF or CVT range information
2946 * We get this pretty much right.
2948 * XXX order for additional mode types in extension blocks?
2950 num_modes += add_detailed_modes(connector, edid, quirks);
2951 num_modes += add_cvt_modes(connector, edid);
2952 num_modes += add_standard_modes(connector, edid);
2953 num_modes += add_established_modes(connector, edid);
2954 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
2955 num_modes += add_inferred_modes(connector, edid);
2956 num_modes += add_cea_modes(connector, edid);
2958 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
2959 edid_fixup_preferred(connector, quirks);
2961 drm_add_display_info(edid, &connector->display_info);
2963 if (quirks & EDID_QUIRK_FORCE_8BPC)
2964 connector->display_info.bpc = 8;
2968 EXPORT_SYMBOL(drm_add_edid_modes);
2971 * drm_add_modes_noedid - add modes for the connectors without EDID
2972 * @connector: connector we're probing
2973 * @hdisplay: the horizontal display limit
2974 * @vdisplay: the vertical display limit
2976 * Add the specified modes to the connector's mode list. Only when the
2977 * hdisplay/vdisplay is not beyond the given limit, it will be added.
2979 * Return number of modes added or 0 if we couldn't find any.
2981 int drm_add_modes_noedid(struct drm_connector *connector,
2982 int hdisplay, int vdisplay)
2984 int i, count, num_modes = 0;
2985 struct drm_display_mode *mode;
2986 struct drm_device *dev = connector->dev;
2988 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
2994 for (i = 0; i < count; i++) {
2995 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
2996 if (hdisplay && vdisplay) {
2998 * Only when two are valid, they will be used to check
2999 * whether the mode should be added to the mode list of
3002 if (ptr->hdisplay > hdisplay ||
3003 ptr->vdisplay > vdisplay)
3006 if (drm_mode_vrefresh(ptr) > 61)
3008 mode = drm_mode_duplicate(dev, ptr);
3010 drm_mode_probed_add(connector, mode);
3016 EXPORT_SYMBOL(drm_add_modes_noedid);
3019 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3020 * data from a DRM display mode
3021 * @frame: HDMI AVI infoframe
3022 * @mode: DRM display mode
3024 * Returns 0 on success or a negative error code on failure.
3027 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3028 const struct drm_display_mode *mode)
3032 if (!frame || !mode)
3035 err = hdmi_avi_infoframe_init(frame);
3039 frame->video_code = drm_match_cea_mode(mode);
3040 if (!frame->video_code)
3043 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3044 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3048 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
projects / firefly-linux-kernel-4.4.55.git / blob