2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/i2c.h>
33 #include <linux/i2c-algo-bit.h>
37 #define EDID_EST_TIMINGS 16
38 #define EDID_STD_TIMINGS 8
39 #define EDID_DETAILED_TIMINGS 4
42 * EDID blocks out in the wild have a variety of bugs, try to collect
43 * them here (note that userspace may work around broken monitors first,
44 * but fixes should make their way here so that the kernel "just works"
45 * on as many displays as possible).
48 /* First detailed mode wrong, use largest 60Hz mode */
49 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
50 /* Reported 135MHz pixel clock is too high, needs adjustment */
51 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
52 /* Prefer the largest mode at 75 Hz */
53 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
54 /* Detail timing is in cm not mm */
55 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
56 /* Detailed timing descriptors have bogus size values, so just take the
57 * maximum size and use that.
59 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
60 /* Monitor forgot to set the first detailed is preferred bit. */
61 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
62 /* use +hsync +vsync for detailed mode */
63 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
71 static struct edid_quirk {
75 } edid_quirk_list[] = {
77 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
79 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
81 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
83 /* Belinea 10 15 55 */
84 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
85 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
87 /* Envision Peripherals, Inc. EN-7100e */
88 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
90 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
92 /* Funai Electronics PM36B */
93 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
94 EDID_QUIRK_DETAILED_IN_CM },
96 /* LG Philips LCD LP154W01-A5 */
97 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
98 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
100 /* Philips 107p5 CRT */
101 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
104 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
106 /* Samsung SyncMaster 205BW. Note: irony */
107 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
108 /* Samsung SyncMaster 22[5-6]BW */
109 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
110 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
113 /*** DDC fetch and block validation ***/
115 static const u8 edid_header[] = {
116 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
120 * Sanity check the EDID block (base or extension). Return 0 if the block
121 * doesn't check out, or 1 if it's valid.
124 drm_edid_block_valid(u8 *raw_edid)
128 struct edid *edid = (struct edid *)raw_edid;
130 if (raw_edid[0] == 0x00) {
133 for (i = 0; i < sizeof(edid_header); i++)
134 if (raw_edid[i] == edid_header[i])
138 else if (score >= 6) {
139 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
140 memcpy(raw_edid, edid_header, sizeof(edid_header));
146 for (i = 0; i < EDID_LENGTH; i++)
149 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
151 /* allow CEA to slide through, switches mangle this */
152 if (raw_edid[0] != 0x02)
156 /* per-block-type checks */
157 switch (raw_edid[0]) {
159 if (edid->version != 1) {
160 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
164 if (edid->revision > 4)
165 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
176 DRM_ERROR("Raw EDID:\n");
177 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
184 * drm_edid_is_valid - sanity check EDID data
187 * Sanity-check an entire EDID record (including extensions)
189 bool drm_edid_is_valid(struct edid *edid)
192 u8 *raw = (u8 *)edid;
197 for (i = 0; i <= edid->extensions; i++)
198 if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
203 EXPORT_SYMBOL(drm_edid_is_valid);
205 #define DDC_ADDR 0x50
206 #define DDC_SEGMENT_ADDR 0x30
208 * Get EDID information via I2C.
210 * \param adapter : i2c device adaptor
211 * \param buf : EDID data buffer to be filled
212 * \param len : EDID data buffer length
213 * \return 0 on success or -1 on failure.
215 * Try to fetch EDID information by calling i2c driver function.
218 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
221 unsigned char start = block * EDID_LENGTH;
222 struct i2c_msg msgs[] = {
236 if (i2c_transfer(adapter, msgs, 2) == 2)
243 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
248 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
251 /* base block fetch */
252 for (i = 0; i < 4; i++) {
253 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
255 if (drm_edid_block_valid(block))
261 /* if there's no extensions, we're done */
262 if (block[0x7e] == 0)
265 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
270 for (j = 1; j <= block[0x7e]; j++) {
271 for (i = 0; i < 4; i++) {
272 if (drm_do_probe_ddc_edid(adapter, block, j,
275 if (drm_edid_block_valid(block + j * EDID_LENGTH))
285 dev_warn(&connector->dev->pdev->dev, "%s: EDID block %d invalid.\n",
286 drm_get_connector_name(connector), j);
294 * Probe DDC presence.
296 * \param adapter : i2c device adaptor
297 * \return 1 on success
300 drm_probe_ddc(struct i2c_adapter *adapter)
304 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
308 * drm_get_edid - get EDID data, if available
309 * @connector: connector we're probing
310 * @adapter: i2c adapter to use for DDC
312 * Poke the given i2c channel to grab EDID data if possible. If found,
313 * attach it to the connector.
315 * Return edid data or NULL if we couldn't find any.
317 struct edid *drm_get_edid(struct drm_connector *connector,
318 struct i2c_adapter *adapter)
320 struct edid *edid = NULL;
322 if (drm_probe_ddc(adapter))
323 edid = (struct edid *)drm_do_get_edid(connector, adapter);
325 connector->display_info.raw_edid = (char *)edid;
330 EXPORT_SYMBOL(drm_get_edid);
332 /*** EDID parsing ***/
335 * edid_vendor - match a string against EDID's obfuscated vendor field
336 * @edid: EDID to match
337 * @vendor: vendor string
339 * Returns true if @vendor is in @edid, false otherwise
341 static bool edid_vendor(struct edid *edid, char *vendor)
345 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
346 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
347 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
348 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
350 return !strncmp(edid_vendor, vendor, 3);
354 * edid_get_quirks - return quirk flags for a given EDID
355 * @edid: EDID to process
357 * This tells subsequent routines what fixes they need to apply.
359 static u32 edid_get_quirks(struct edid *edid)
361 struct edid_quirk *quirk;
364 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
365 quirk = &edid_quirk_list[i];
367 if (edid_vendor(edid, quirk->vendor) &&
368 (EDID_PRODUCT_ID(edid) == quirk->product_id))
369 return quirk->quirks;
375 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
376 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
380 * edid_fixup_preferred - set preferred modes based on quirk list
381 * @connector: has mode list to fix up
382 * @quirks: quirks list
384 * Walk the mode list for @connector, clearing the preferred status
385 * on existing modes and setting it anew for the right mode ala @quirks.
387 static void edid_fixup_preferred(struct drm_connector *connector,
390 struct drm_display_mode *t, *cur_mode, *preferred_mode;
391 int target_refresh = 0;
393 if (list_empty(&connector->probed_modes))
396 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
398 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
401 preferred_mode = list_first_entry(&connector->probed_modes,
402 struct drm_display_mode, head);
404 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
405 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
407 if (cur_mode == preferred_mode)
410 /* Largest mode is preferred */
411 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
412 preferred_mode = cur_mode;
414 /* At a given size, try to get closest to target refresh */
415 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
416 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
417 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
418 preferred_mode = cur_mode;
422 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
426 * Add the Autogenerated from the DMT spec.
427 * This table is copied from xfree86/modes/xf86EdidModes.c.
428 * But the mode with Reduced blank feature is deleted.
430 static struct drm_display_mode drm_dmt_modes[] = {
432 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
433 736, 832, 0, 350, 382, 385, 445, 0,
434 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
436 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
437 736, 832, 0, 400, 401, 404, 445, 0,
438 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
440 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
441 828, 936, 0, 400, 401, 404, 446, 0,
442 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
444 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
445 752, 800, 0, 480, 489, 492, 525, 0,
446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
448 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
449 704, 832, 0, 480, 489, 492, 520, 0,
450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
452 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
453 720, 840, 0, 480, 481, 484, 500, 0,
454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
456 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
457 752, 832, 0, 480, 481, 484, 509, 0,
458 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
460 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
461 896, 1024, 0, 600, 601, 603, 625, 0,
462 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
464 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
465 968, 1056, 0, 600, 601, 605, 628, 0,
466 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
468 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
469 976, 1040, 0, 600, 637, 643, 666, 0,
470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
472 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
473 896, 1056, 0, 600, 601, 604, 625, 0,
474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
476 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
477 896, 1048, 0, 600, 601, 604, 631, 0,
478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
480 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
481 976, 1088, 0, 480, 486, 494, 517, 0,
482 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
483 /* 1024x768@43Hz, interlace */
484 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
485 1208, 1264, 0, 768, 768, 772, 817, 0,
486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
487 DRM_MODE_FLAG_INTERLACE) },
489 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
490 1184, 1344, 0, 768, 771, 777, 806, 0,
491 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
493 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
494 1184, 1328, 0, 768, 771, 777, 806, 0,
495 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
497 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
498 1136, 1312, 0, 768, 769, 772, 800, 0,
499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
501 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
502 1168, 1376, 0, 768, 769, 772, 808, 0,
503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
505 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
506 1344, 1600, 0, 864, 865, 868, 900, 0,
507 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
509 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
510 1472, 1664, 0, 768, 771, 778, 798, 0,
511 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
513 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
514 1488, 1696, 0, 768, 771, 778, 805, 0,
515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
517 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
518 1496, 1712, 0, 768, 771, 778, 809, 0,
519 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
521 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
522 1480, 1680, 0, 800, 803, 809, 831, 0,
523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
525 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
526 1488, 1696, 0, 800, 803, 809, 838, 0,
527 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
529 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
530 1496, 1712, 0, 800, 803, 809, 843, 0,
531 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
533 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
534 1488, 1800, 0, 960, 961, 964, 1000, 0,
535 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
537 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
538 1504, 1728, 0, 960, 961, 964, 1011, 0,
539 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
541 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
542 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
543 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
545 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
546 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
547 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
549 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
550 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
551 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
553 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
554 1536, 1792, 0, 768, 771, 777, 795, 0,
555 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
557 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
558 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
559 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
561 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
562 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
563 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
565 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
566 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
567 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
569 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
570 1672, 1904, 0, 900, 903, 909, 934, 0,
571 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
573 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
574 1688, 1936, 0, 900, 903, 909, 942, 0,
575 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
577 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
578 1696, 1952, 0, 900, 903, 909, 948, 0,
579 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
581 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
582 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
583 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
585 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
586 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
587 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
589 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
590 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
591 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
593 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
594 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
595 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
597 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
598 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
599 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
601 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
602 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
603 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
605 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
606 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
607 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
609 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
610 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
611 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
613 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
614 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
615 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
617 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
618 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
619 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
621 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
622 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
623 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
625 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
626 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
627 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
629 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
630 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
631 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
633 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
634 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
635 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
637 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
638 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
639 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
641 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
642 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
643 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
645 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
646 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
647 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
649 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
650 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
651 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
653 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
654 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
655 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
657 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
658 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
659 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
661 static const int drm_num_dmt_modes =
662 sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
664 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
665 int hsize, int vsize, int fresh)
668 struct drm_display_mode *ptr, *mode;
671 for (i = 0; i < drm_num_dmt_modes; i++) {
672 ptr = &drm_dmt_modes[i];
673 if (hsize == ptr->hdisplay &&
674 vsize == ptr->vdisplay &&
675 fresh == drm_mode_vrefresh(ptr)) {
676 /* get the expected default mode */
677 mode = drm_mode_duplicate(dev, ptr);
683 EXPORT_SYMBOL(drm_mode_find_dmt);
685 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
688 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
691 struct edid *edid = (struct edid *)raw_edid;
696 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
697 cb(&(edid->detailed_timings[i]), closure);
699 /* XXX extension block walk */
703 is_rb(struct detailed_timing *t, void *data)
706 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
708 *(bool *)data = true;
711 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
713 drm_monitor_supports_rb(struct edid *edid)
715 if (edid->revision >= 4) {
717 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
721 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
725 find_gtf2(struct detailed_timing *t, void *data)
728 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
732 /* Secondary GTF curve kicks in above some break frequency */
734 drm_gtf2_hbreak(struct edid *edid)
737 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
738 return r ? (r[12] * 2) : 0;
742 drm_gtf2_2c(struct edid *edid)
745 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
746 return r ? r[13] : 0;
750 drm_gtf2_m(struct edid *edid)
753 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
754 return r ? (r[15] << 8) + r[14] : 0;
758 drm_gtf2_k(struct edid *edid)
761 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
762 return r ? r[16] : 0;
766 drm_gtf2_2j(struct edid *edid)
769 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
770 return r ? r[17] : 0;
774 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
775 * @edid: EDID block to scan
777 static int standard_timing_level(struct edid *edid)
779 if (edid->revision >= 2) {
780 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
782 if (drm_gtf2_hbreak(edid))
790 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
791 * monitors fill with ascii space (0x20) instead.
794 bad_std_timing(u8 a, u8 b)
796 return (a == 0x00 && b == 0x00) ||
797 (a == 0x01 && b == 0x01) ||
798 (a == 0x20 && b == 0x20);
802 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
803 * @t: standard timing params
804 * @timing_level: standard timing level
806 * Take the standard timing params (in this case width, aspect, and refresh)
807 * and convert them into a real mode using CVT/GTF/DMT.
809 static struct drm_display_mode *
810 drm_mode_std(struct drm_connector *connector, struct edid *edid,
811 struct std_timing *t, int revision)
813 struct drm_device *dev = connector->dev;
814 struct drm_display_mode *m, *mode = NULL;
817 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
818 >> EDID_TIMING_ASPECT_SHIFT;
819 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
820 >> EDID_TIMING_VFREQ_SHIFT;
821 int timing_level = standard_timing_level(edid);
823 if (bad_std_timing(t->hsize, t->vfreq_aspect))
826 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
827 hsize = t->hsize * 8 + 248;
828 /* vrefresh_rate = vfreq + 60 */
829 vrefresh_rate = vfreq + 60;
830 /* the vdisplay is calculated based on the aspect ratio */
831 if (aspect_ratio == 0) {
835 vsize = (hsize * 10) / 16;
836 } else if (aspect_ratio == 1)
837 vsize = (hsize * 3) / 4;
838 else if (aspect_ratio == 2)
839 vsize = (hsize * 4) / 5;
841 vsize = (hsize * 9) / 16;
843 /* HDTV hack, part 1 */
844 if (vrefresh_rate == 60 &&
845 ((hsize == 1360 && vsize == 765) ||
846 (hsize == 1368 && vsize == 769))) {
852 * If this connector already has a mode for this size and refresh
853 * rate (because it came from detailed or CVT info), use that
854 * instead. This way we don't have to guess at interlace or
857 list_for_each_entry(m, &connector->probed_modes, head)
858 if (m->hdisplay == hsize && m->vdisplay == vsize &&
859 drm_mode_vrefresh(m) == vrefresh_rate)
862 /* HDTV hack, part 2 */
863 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
864 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
866 mode->hdisplay = 1366;
867 mode->vsync_start = mode->vsync_start - 1;
868 mode->vsync_end = mode->vsync_end - 1;
872 /* check whether it can be found in default mode table */
873 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate);
877 switch (timing_level) {
881 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
885 * This is potentially wrong if there's ever a monitor with
886 * more than one ranges section, each claiming a different
887 * secondary GTF curve. Please don't do that.
889 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
890 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
892 mode = drm_gtf_mode_complex(dev, hsize, vsize,
901 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
909 * EDID is delightfully ambiguous about how interlaced modes are to be
910 * encoded. Our internal representation is of frame height, but some
911 * HDTV detailed timings are encoded as field height.
913 * The format list here is from CEA, in frame size. Technically we
914 * should be checking refresh rate too. Whatever.
917 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
918 struct detailed_pixel_timing *pt)
921 static const struct {
923 } cea_interlaced[] = {
933 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
936 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
937 if ((mode->hdisplay == cea_interlaced[i].w) &&
938 (mode->vdisplay == cea_interlaced[i].h / 2)) {
940 mode->vsync_start *= 2;
941 mode->vsync_end *= 2;
947 mode->flags |= DRM_MODE_FLAG_INTERLACE;
951 * drm_mode_detailed - create a new mode from an EDID detailed timing section
952 * @dev: DRM device (needed to create new mode)
954 * @timing: EDID detailed timing info
955 * @quirks: quirks to apply
957 * An EDID detailed timing block contains enough info for us to create and
958 * return a new struct drm_display_mode.
960 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
962 struct detailed_timing *timing,
965 struct drm_display_mode *mode;
966 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
967 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
968 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
969 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
970 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
971 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
972 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
973 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
974 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
976 /* ignore tiny modes */
977 if (hactive < 64 || vactive < 64)
980 if (pt->misc & DRM_EDID_PT_STEREO) {
981 printk(KERN_WARNING "stereo mode not supported\n");
984 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
985 printk(KERN_WARNING "composite sync not supported\n");
988 /* it is incorrect if hsync/vsync width is zero */
989 if (!hsync_pulse_width || !vsync_pulse_width) {
990 DRM_DEBUG_KMS("Incorrect Detailed timing. "
991 "Wrong Hsync/Vsync pulse width\n");
994 mode = drm_mode_create(dev);
998 mode->type = DRM_MODE_TYPE_DRIVER;
1000 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1001 timing->pixel_clock = cpu_to_le16(1088);
1003 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1005 mode->hdisplay = hactive;
1006 mode->hsync_start = mode->hdisplay + hsync_offset;
1007 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1008 mode->htotal = mode->hdisplay + hblank;
1010 mode->vdisplay = vactive;
1011 mode->vsync_start = mode->vdisplay + vsync_offset;
1012 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1013 mode->vtotal = mode->vdisplay + vblank;
1015 /* Some EDIDs have bogus h/vtotal values */
1016 if (mode->hsync_end > mode->htotal)
1017 mode->htotal = mode->hsync_end + 1;
1018 if (mode->vsync_end > mode->vtotal)
1019 mode->vtotal = mode->vsync_end + 1;
1021 drm_mode_do_interlace_quirk(mode, pt);
1023 drm_mode_set_name(mode);
1025 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1026 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1029 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1030 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1031 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1032 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1034 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1035 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1037 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1038 mode->width_mm *= 10;
1039 mode->height_mm *= 10;
1042 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1043 mode->width_mm = edid->width_cm * 10;
1044 mode->height_mm = edid->height_cm * 10;
1051 * Detailed mode info for the EDID "established modes" data to use.
1053 static struct drm_display_mode edid_est_modes[] = {
1054 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1055 968, 1056, 0, 600, 601, 605, 628, 0,
1056 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
1057 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
1058 896, 1024, 0, 600, 601, 603, 625, 0,
1059 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
1060 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
1061 720, 840, 0, 480, 481, 484, 500, 0,
1062 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
1063 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
1064 704, 832, 0, 480, 489, 491, 520, 0,
1065 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
1066 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
1067 768, 864, 0, 480, 483, 486, 525, 0,
1068 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
1069 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
1070 752, 800, 0, 480, 490, 492, 525, 0,
1071 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
1072 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
1073 846, 900, 0, 400, 421, 423, 449, 0,
1074 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
1075 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
1076 846, 900, 0, 400, 412, 414, 449, 0,
1077 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
1078 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
1079 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1080 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
1081 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
1082 1136, 1312, 0, 768, 769, 772, 800, 0,
1083 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
1084 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
1085 1184, 1328, 0, 768, 771, 777, 806, 0,
1086 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
1087 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1088 1184, 1344, 0, 768, 771, 777, 806, 0,
1089 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
1090 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
1091 1208, 1264, 0, 768, 768, 776, 817, 0,
1092 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
1093 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
1094 928, 1152, 0, 624, 625, 628, 667, 0,
1095 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
1096 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
1097 896, 1056, 0, 600, 601, 604, 625, 0,
1098 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
1099 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
1100 976, 1040, 0, 600, 637, 643, 666, 0,
1101 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
1102 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1103 1344, 1600, 0, 864, 865, 868, 900, 0,
1104 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
1108 * add_established_modes - get est. modes from EDID and add them
1109 * @edid: EDID block to scan
1111 * Each EDID block contains a bitmap of the supported "established modes" list
1112 * (defined above). Tease them out and add them to the global modes list.
1114 static int add_established_modes(struct drm_connector *connector, struct edid *edid)
1116 struct drm_device *dev = connector->dev;
1117 unsigned long est_bits = edid->established_timings.t1 |
1118 (edid->established_timings.t2 << 8) |
1119 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1122 for (i = 0; i <= EDID_EST_TIMINGS; i++)
1123 if (est_bits & (1<<i)) {
1124 struct drm_display_mode *newmode;
1125 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1127 drm_mode_probed_add(connector, newmode);
1136 * add_standard_modes - get std. modes from EDID and add them
1137 * @edid: EDID block to scan
1139 * Standard modes can be calculated using the CVT standard. Grab them from
1140 * @edid, calculate them, and add them to the list.
1142 static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
1146 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1147 struct drm_display_mode *newmode;
1149 newmode = drm_mode_std(connector, edid,
1150 &edid->standard_timings[i],
1153 drm_mode_probed_add(connector, newmode);
1162 mode_is_rb(struct drm_display_mode *mode)
1164 return (mode->htotal - mode->hdisplay == 160) &&
1165 (mode->hsync_end - mode->hdisplay == 80) &&
1166 (mode->hsync_end - mode->hsync_start == 32) &&
1167 (mode->vsync_start - mode->vdisplay == 3);
1171 mode_in_hsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
1173 int hsync, hmin, hmax;
1176 if (edid->revision >= 4)
1177 hmin += ((t[4] & 0x04) ? 255 : 0);
1179 if (edid->revision >= 4)
1180 hmax += ((t[4] & 0x08) ? 255 : 0);
1181 hsync = drm_mode_hsync(mode);
1183 return (hsync <= hmax && hsync >= hmin);
1187 mode_in_vsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t)
1189 int vsync, vmin, vmax;
1192 if (edid->revision >= 4)
1193 vmin += ((t[4] & 0x01) ? 255 : 0);
1195 if (edid->revision >= 4)
1196 vmax += ((t[4] & 0x02) ? 255 : 0);
1197 vsync = drm_mode_vrefresh(mode);
1199 return (vsync <= vmax && vsync >= vmin);
1203 range_pixel_clock(struct edid *edid, u8 *t)
1206 if (t[9] == 0 || t[9] == 255)
1209 /* 1.4 with CVT support gives us real precision, yay */
1210 if (edid->revision >= 4 && t[10] == 0x04)
1211 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1213 /* 1.3 is pathetic, so fuzz up a bit */
1214 return t[9] * 10000 + 5001;
1218 mode_in_range(struct drm_display_mode *mode, struct edid *edid,
1219 struct detailed_timing *timing)
1222 u8 *t = (u8 *)timing;
1224 if (!mode_in_hsync_range(mode, edid, t))
1227 if (!mode_in_vsync_range(mode, edid, t))
1230 if ((max_clock = range_pixel_clock(edid, t)))
1231 if (mode->clock > max_clock)
1234 /* 1.4 max horizontal check */
1235 if (edid->revision >= 4 && t[10] == 0x04)
1236 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1239 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1246 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
1247 * need to account for them.
1250 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1251 struct detailed_timing *timing)
1254 struct drm_display_mode *newmode;
1255 struct drm_device *dev = connector->dev;
1257 for (i = 0; i < drm_num_dmt_modes; i++) {
1258 if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
1259 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1261 drm_mode_probed_add(connector, newmode);
1270 static int drm_cvt_modes(struct drm_connector *connector,
1271 struct detailed_timing *timing)
1273 int i, j, modes = 0;
1274 struct drm_display_mode *newmode;
1275 struct drm_device *dev = connector->dev;
1276 struct cvt_timing *cvt;
1277 const int rates[] = { 60, 85, 75, 60, 50 };
1278 const u8 empty[3] = { 0, 0, 0 };
1280 for (i = 0; i < 4; i++) {
1281 int uninitialized_var(width), height;
1282 cvt = &(timing->data.other_data.data.cvt[i]);
1284 if (!memcmp(cvt->code, empty, 3))
1287 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1288 switch (cvt->code[1] & 0x0c) {
1290 width = height * 4 / 3;
1293 width = height * 16 / 9;
1296 width = height * 16 / 10;
1299 width = height * 15 / 9;
1303 for (j = 1; j < 5; j++) {
1304 if (cvt->code[2] & (1 << j)) {
1305 newmode = drm_cvt_mode(dev, width, height,
1309 drm_mode_probed_add(connector, newmode);
1319 static const struct {
1326 { 640, 350, 85, 0 },
1327 { 640, 400, 85, 0 },
1328 { 720, 400, 85, 0 },
1329 { 640, 480, 85, 0 },
1330 { 848, 480, 60, 0 },
1331 { 800, 600, 85, 0 },
1332 { 1024, 768, 85, 0 },
1333 { 1152, 864, 75, 0 },
1335 { 1280, 768, 60, 1 },
1336 { 1280, 768, 60, 0 },
1337 { 1280, 768, 75, 0 },
1338 { 1280, 768, 85, 0 },
1339 { 1280, 960, 60, 0 },
1340 { 1280, 960, 85, 0 },
1341 { 1280, 1024, 60, 0 },
1342 { 1280, 1024, 85, 0 },
1344 { 1360, 768, 60, 0 },
1345 { 1440, 900, 60, 1 },
1346 { 1440, 900, 60, 0 },
1347 { 1440, 900, 75, 0 },
1348 { 1440, 900, 85, 0 },
1349 { 1400, 1050, 60, 1 },
1350 { 1400, 1050, 60, 0 },
1351 { 1400, 1050, 75, 0 },
1353 { 1400, 1050, 85, 0 },
1354 { 1680, 1050, 60, 1 },
1355 { 1680, 1050, 60, 0 },
1356 { 1680, 1050, 75, 0 },
1357 { 1680, 1050, 85, 0 },
1358 { 1600, 1200, 60, 0 },
1359 { 1600, 1200, 65, 0 },
1360 { 1600, 1200, 70, 0 },
1362 { 1600, 1200, 75, 0 },
1363 { 1600, 1200, 85, 0 },
1364 { 1792, 1344, 60, 0 },
1365 { 1792, 1344, 85, 0 },
1366 { 1856, 1392, 60, 0 },
1367 { 1856, 1392, 75, 0 },
1368 { 1920, 1200, 60, 1 },
1369 { 1920, 1200, 60, 0 },
1371 { 1920, 1200, 75, 0 },
1372 { 1920, 1200, 85, 0 },
1373 { 1920, 1440, 60, 0 },
1374 { 1920, 1440, 75, 0 },
1378 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1380 int i, j, m, modes = 0;
1381 struct drm_display_mode *mode;
1382 u8 *est = ((u8 *)timing) + 5;
1384 for (i = 0; i < 6; i++) {
1385 for (j = 7; j > 0; j--) {
1386 m = (i * 8) + (7 - j);
1387 if (m >= ARRAY_SIZE(est3_modes))
1389 if (est[i] & (1 << j)) {
1390 mode = drm_mode_find_dmt(connector->dev,
1394 /*, est3_modes[m].rb */);
1396 drm_mode_probed_add(connector, mode);
1406 static int add_detailed_modes(struct drm_connector *connector,
1407 struct detailed_timing *timing,
1408 struct edid *edid, u32 quirks, int preferred)
1411 struct detailed_non_pixel *data = &timing->data.other_data;
1412 int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
1413 struct drm_display_mode *newmode;
1414 struct drm_device *dev = connector->dev;
1416 if (timing->pixel_clock) {
1417 newmode = drm_mode_detailed(dev, edid, timing, quirks);
1422 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1424 drm_mode_probed_add(connector, newmode);
1428 /* other timing types */
1429 switch (data->type) {
1430 case EDID_DETAIL_MONITOR_RANGE:
1432 modes += drm_gtf_modes_for_range(connector, edid,
1435 case EDID_DETAIL_STD_MODES:
1436 /* Six modes per detailed section */
1437 for (i = 0; i < 6; i++) {
1438 struct std_timing *std;
1439 struct drm_display_mode *newmode;
1441 std = &data->data.timings[i];
1442 newmode = drm_mode_std(connector, edid, std,
1445 drm_mode_probed_add(connector, newmode);
1450 case EDID_DETAIL_CVT_3BYTE:
1451 modes += drm_cvt_modes(connector, timing);
1453 case EDID_DETAIL_EST_TIMINGS:
1454 modes += drm_est3_modes(connector, timing);
1464 * add_detailed_info - get detailed mode info from EDID data
1465 * @connector: attached connector
1466 * @edid: EDID block to scan
1467 * @quirks: quirks to apply
1469 * Some of the detailed timing sections may contain mode information. Grab
1470 * it and add it to the list.
1472 static int add_detailed_info(struct drm_connector *connector,
1473 struct edid *edid, u32 quirks)
1477 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
1478 struct detailed_timing *timing = &edid->detailed_timings[i];
1479 int preferred = (i == 0);
1481 if (preferred && edid->version == 1 && edid->revision < 4)
1482 preferred = (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1484 /* In 1.0, only timings are allowed */
1485 if (!timing->pixel_clock && edid->version == 1 &&
1486 edid->revision == 0)
1489 modes += add_detailed_modes(connector, timing, edid, quirks,
1497 * add_detailed_mode_eedid - get detailed mode info from addtional timing
1499 * @connector: attached connector
1500 * @edid: EDID block to scan(It is only to get addtional timing EDID block)
1501 * @quirks: quirks to apply
1503 * Some of the detailed timing sections may contain mode information. Grab
1504 * it and add it to the list.
1506 static int add_detailed_info_eedid(struct drm_connector *connector,
1507 struct edid *edid, u32 quirks)
1510 char *edid_ext = NULL;
1511 struct detailed_timing *timing;
1512 int start_offset, end_offset;
1514 if (edid->version == 1 && edid->revision < 3)
1516 if (!edid->extensions)
1519 /* Find CEA extension */
1520 for (i = 0; i < edid->extensions; i++) {
1521 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1522 if (edid_ext[0] == 0x02)
1526 if (i == edid->extensions)
1529 /* Get the start offset of detailed timing block */
1530 start_offset = edid_ext[2];
1531 if (start_offset == 0) {
1532 /* If the start_offset is zero, it means that neither detailed
1533 * info nor data block exist. In such case it is also
1534 * unnecessary to parse the detailed timing info.
1539 end_offset = EDID_LENGTH;
1540 end_offset -= sizeof(struct detailed_timing);
1541 for (i = start_offset; i < end_offset;
1542 i += sizeof(struct detailed_timing)) {
1543 timing = (struct detailed_timing *)(edid_ext + i);
1544 modes += add_detailed_modes(connector, timing, edid, quirks, 0);
1550 #define HDMI_IDENTIFIER 0x000C03
1551 #define VENDOR_BLOCK 0x03
1553 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1554 * @edid: monitor EDID information
1556 * Parse the CEA extension according to CEA-861-B.
1557 * Return true if HDMI, false if not or unknown.
1559 bool drm_detect_hdmi_monitor(struct edid *edid)
1561 char *edid_ext = NULL;
1563 int start_offset, end_offset;
1564 bool is_hdmi = false;
1566 /* No EDID or EDID extensions */
1567 if (edid == NULL || edid->extensions == 0)
1570 /* Find CEA extension */
1571 for (i = 0; i < edid->extensions; i++) {
1572 edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1573 /* This block is CEA extension */
1574 if (edid_ext[0] == 0x02)
1578 if (i == edid->extensions)
1581 /* Data block offset in CEA extension block */
1583 end_offset = edid_ext[2];
1586 * Because HDMI identifier is in Vendor Specific Block,
1587 * search it from all data blocks of CEA extension.
1589 for (i = start_offset; i < end_offset;
1590 /* Increased by data block len */
1591 i += ((edid_ext[i] & 0x1f) + 1)) {
1592 /* Find vendor specific block */
1593 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1594 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1595 edid_ext[i + 3] << 16;
1596 /* Find HDMI identifier */
1597 if (hdmi_id == HDMI_IDENTIFIER)
1606 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1609 * drm_add_edid_modes - add modes from EDID data, if available
1610 * @connector: connector we're probing
1613 * Add the specified modes to the connector's mode list.
1615 * Return number of modes added or 0 if we couldn't find any.
1617 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1625 if (!drm_edid_is_valid(edid)) {
1626 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1627 drm_get_connector_name(connector));
1631 quirks = edid_get_quirks(edid);
1634 * EDID spec says modes should be preferred in this order:
1635 * - preferred detailed mode
1636 * - other detailed modes from base block
1637 * - detailed modes from extension blocks
1638 * - CVT 3-byte code modes
1639 * - standard timing codes
1640 * - established timing codes
1641 * - modes inferred from GTF or CVT range information
1643 * We don't quite implement this yet, but we're close.
1645 * XXX order for additional mode types in extension blocks?
1647 num_modes += add_detailed_info(connector, edid, quirks);
1648 num_modes += add_detailed_info_eedid(connector, edid, quirks);
1649 num_modes += add_standard_modes(connector, edid);
1650 num_modes += add_established_modes(connector, edid);
1652 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1653 edid_fixup_preferred(connector, quirks);
1655 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
1656 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
1657 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
1658 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
1659 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
1660 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
1661 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
1662 connector->display_info.width_mm = edid->width_cm * 10;
1663 connector->display_info.height_mm = edid->height_cm * 10;
1664 connector->display_info.gamma = edid->gamma;
1665 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
1666 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
1667 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
1668 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
1669 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
1670 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
1671 connector->display_info.gamma = edid->gamma;
1675 EXPORT_SYMBOL(drm_add_edid_modes);
1678 * drm_add_modes_noedid - add modes for the connectors without EDID
1679 * @connector: connector we're probing
1680 * @hdisplay: the horizontal display limit
1681 * @vdisplay: the vertical display limit
1683 * Add the specified modes to the connector's mode list. Only when the
1684 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1686 * Return number of modes added or 0 if we couldn't find any.
1688 int drm_add_modes_noedid(struct drm_connector *connector,
1689 int hdisplay, int vdisplay)
1691 int i, count, num_modes = 0;
1692 struct drm_display_mode *mode, *ptr;
1693 struct drm_device *dev = connector->dev;
1695 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1701 for (i = 0; i < count; i++) {
1702 ptr = &drm_dmt_modes[i];
1703 if (hdisplay && vdisplay) {
1705 * Only when two are valid, they will be used to check
1706 * whether the mode should be added to the mode list of
1709 if (ptr->hdisplay > hdisplay ||
1710 ptr->vdisplay > vdisplay)
1713 if (drm_mode_vrefresh(ptr) > 61)
1715 mode = drm_mode_duplicate(dev, ptr);
1717 drm_mode_probed_add(connector, mode);
1723 EXPORT_SYMBOL(drm_add_modes_noedid);