2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
36 #include <drm/drm_edid.h>
38 #define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
42 #define EDID_EST_TIMINGS 16
43 #define EDID_STD_TIMINGS 8
44 #define EDID_DETAILED_TIMINGS 4
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
53 /* First detailed mode wrong, use largest 60Hz mode */
54 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55 /* Reported 135MHz pixel clock is too high, needs adjustment */
56 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57 /* Prefer the largest mode at 75 Hz */
58 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59 /* Detail timing is in cm not mm */
60 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61 /* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
64 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65 /* Monitor forgot to set the first detailed is preferred bit. */
66 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67 /* use +hsync +vsync for detailed mode */
68 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
69 /* Force reduced-blanking timings for detailed modes */
70 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
72 struct detailed_mode_closure {
73 struct drm_connector *connector;
85 static struct edid_quirk {
89 } edid_quirk_list[] = {
91 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
93 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
95 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
97 /* Belinea 10 15 55 */
98 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
99 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
101 /* Envision Peripherals, Inc. EN-7100e */
102 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
103 /* Envision EN2028 */
104 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
106 /* Funai Electronics PM36B */
107 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
108 EDID_QUIRK_DETAILED_IN_CM },
110 /* LG Philips LCD LP154W01-A5 */
111 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
112 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
114 /* Philips 107p5 CRT */
115 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
118 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
120 /* Samsung SyncMaster 205BW. Note: irony */
121 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
122 /* Samsung SyncMaster 22[5-6]BW */
123 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
124 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
126 /* ViewSonic VA2026w */
127 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
129 /* Medion MD 30217 PG */
130 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
134 * Autogenerated from the DMT spec.
135 * This table is copied from xfree86/modes/xf86EdidModes.c.
137 static const struct drm_display_mode drm_dmt_modes[] = {
139 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
140 736, 832, 0, 350, 382, 385, 445, 0,
141 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
143 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
144 736, 832, 0, 400, 401, 404, 445, 0,
145 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
147 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
148 828, 936, 0, 400, 401, 404, 446, 0,
149 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
151 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
152 752, 800, 0, 480, 489, 492, 525, 0,
153 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
155 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
156 704, 832, 0, 480, 489, 492, 520, 0,
157 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
159 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
160 720, 840, 0, 480, 481, 484, 500, 0,
161 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
163 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
164 752, 832, 0, 480, 481, 484, 509, 0,
165 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
167 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
168 896, 1024, 0, 600, 601, 603, 625, 0,
169 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
171 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
172 968, 1056, 0, 600, 601, 605, 628, 0,
173 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
175 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
176 976, 1040, 0, 600, 637, 643, 666, 0,
177 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
179 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
180 896, 1056, 0, 600, 601, 604, 625, 0,
181 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
183 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
184 896, 1048, 0, 600, 601, 604, 631, 0,
185 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
186 /* 800x600@120Hz RB */
187 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
188 880, 960, 0, 600, 603, 607, 636, 0,
189 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
191 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
192 976, 1088, 0, 480, 486, 494, 517, 0,
193 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
194 /* 1024x768@43Hz, interlace */
195 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
196 1208, 1264, 0, 768, 768, 772, 817, 0,
197 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
198 DRM_MODE_FLAG_INTERLACE) },
200 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
201 1184, 1344, 0, 768, 771, 777, 806, 0,
202 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
204 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
205 1184, 1328, 0, 768, 771, 777, 806, 0,
206 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
208 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
209 1136, 1312, 0, 768, 769, 772, 800, 0,
210 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
212 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
213 1168, 1376, 0, 768, 769, 772, 808, 0,
214 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
215 /* 1024x768@120Hz RB */
216 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
217 1104, 1184, 0, 768, 771, 775, 813, 0,
218 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
220 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
221 1344, 1600, 0, 864, 865, 868, 900, 0,
222 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
223 /* 1280x768@60Hz RB */
224 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
225 1360, 1440, 0, 768, 771, 778, 790, 0,
226 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
228 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
229 1472, 1664, 0, 768, 771, 778, 798, 0,
230 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
232 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
233 1488, 1696, 0, 768, 771, 778, 805, 0,
234 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
236 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
237 1496, 1712, 0, 768, 771, 778, 809, 0,
238 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
239 /* 1280x768@120Hz RB */
240 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
241 1360, 1440, 0, 768, 771, 778, 813, 0,
242 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
243 /* 1280x800@60Hz RB */
244 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
245 1360, 1440, 0, 800, 803, 809, 823, 0,
246 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
248 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
249 1480, 1680, 0, 800, 803, 809, 831, 0,
250 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
252 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
253 1488, 1696, 0, 800, 803, 809, 838, 0,
254 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
256 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
257 1496, 1712, 0, 800, 803, 809, 843, 0,
258 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
259 /* 1280x800@120Hz RB */
260 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
261 1360, 1440, 0, 800, 803, 809, 847, 0,
262 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
264 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
265 1488, 1800, 0, 960, 961, 964, 1000, 0,
266 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
268 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
269 1504, 1728, 0, 960, 961, 964, 1011, 0,
270 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
271 /* 1280x960@120Hz RB */
272 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
273 1360, 1440, 0, 960, 963, 967, 1017, 0,
274 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
276 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
277 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
278 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
280 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
281 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
282 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
284 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
285 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
286 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
287 /* 1280x1024@120Hz RB */
288 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
289 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
290 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
292 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
293 1536, 1792, 0, 768, 771, 777, 795, 0,
294 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
295 /* 1360x768@120Hz RB */
296 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
297 1440, 1520, 0, 768, 771, 776, 813, 0,
298 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
299 /* 1400x1050@60Hz RB */
300 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
301 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
302 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
304 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
305 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
306 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
308 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
309 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
310 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
312 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
313 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
314 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
315 /* 1400x1050@120Hz RB */
316 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
317 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
318 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
319 /* 1440x900@60Hz RB */
320 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
321 1520, 1600, 0, 900, 903, 909, 926, 0,
322 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
324 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
325 1672, 1904, 0, 900, 903, 909, 934, 0,
326 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
328 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
329 1688, 1936, 0, 900, 903, 909, 942, 0,
330 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
332 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
333 1696, 1952, 0, 900, 903, 909, 948, 0,
334 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
335 /* 1440x900@120Hz RB */
336 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
337 1520, 1600, 0, 900, 903, 909, 953, 0,
338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
340 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
341 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
342 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
344 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
345 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
348 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
349 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
350 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
352 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
353 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
354 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
356 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
357 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
358 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
359 /* 1600x1200@120Hz RB */
360 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
361 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
362 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
363 /* 1680x1050@60Hz RB */
364 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
365 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
366 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
368 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
369 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
370 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
372 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
373 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
374 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
376 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
377 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
378 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
379 /* 1680x1050@120Hz RB */
380 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
381 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
382 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
384 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
385 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
386 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
388 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
389 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
390 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
391 /* 1792x1344@120Hz RB */
392 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
393 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
394 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
396 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
397 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
398 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
400 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
401 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
402 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
403 /* 1856x1392@120Hz RB */
404 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
405 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
406 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
407 /* 1920x1200@60Hz RB */
408 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
409 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
410 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
412 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
413 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
414 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
416 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
417 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
418 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
420 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
421 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
422 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
423 /* 1920x1200@120Hz RB */
424 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
425 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
426 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
428 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
429 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
430 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
432 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
433 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
434 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
435 /* 1920x1440@120Hz RB */
436 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
437 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
438 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
439 /* 2560x1600@60Hz RB */
440 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
441 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
442 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
444 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
445 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
448 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
449 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
452 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
453 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
455 /* 2560x1600@120Hz RB */
456 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
457 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
461 static const struct drm_display_mode edid_est_modes[] = {
462 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
463 968, 1056, 0, 600, 601, 605, 628, 0,
464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
465 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
466 896, 1024, 0, 600, 601, 603, 625, 0,
467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
468 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
469 720, 840, 0, 480, 481, 484, 500, 0,
470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
471 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
472 704, 832, 0, 480, 489, 491, 520, 0,
473 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
474 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
475 768, 864, 0, 480, 483, 486, 525, 0,
476 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
477 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
478 752, 800, 0, 480, 490, 492, 525, 0,
479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
480 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
481 846, 900, 0, 400, 421, 423, 449, 0,
482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
483 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
484 846, 900, 0, 400, 412, 414, 449, 0,
485 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
486 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
487 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
489 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
490 1136, 1312, 0, 768, 769, 772, 800, 0,
491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
492 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
493 1184, 1328, 0, 768, 771, 777, 806, 0,
494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
495 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
496 1184, 1344, 0, 768, 771, 777, 806, 0,
497 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
498 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
499 1208, 1264, 0, 768, 768, 776, 817, 0,
500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
501 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
502 928, 1152, 0, 624, 625, 628, 667, 0,
503 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
504 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
505 896, 1056, 0, 600, 601, 604, 625, 0,
506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
507 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
508 976, 1040, 0, 600, 637, 643, 666, 0,
509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
510 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
511 1344, 1600, 0, 864, 865, 868, 900, 0,
512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
522 static const struct minimode est3_modes[] = {
530 { 1024, 768, 85, 0 },
531 { 1152, 864, 75, 0 },
533 { 1280, 768, 60, 1 },
534 { 1280, 768, 60, 0 },
535 { 1280, 768, 75, 0 },
536 { 1280, 768, 85, 0 },
537 { 1280, 960, 60, 0 },
538 { 1280, 960, 85, 0 },
539 { 1280, 1024, 60, 0 },
540 { 1280, 1024, 85, 0 },
542 { 1360, 768, 60, 0 },
543 { 1440, 900, 60, 1 },
544 { 1440, 900, 60, 0 },
545 { 1440, 900, 75, 0 },
546 { 1440, 900, 85, 0 },
547 { 1400, 1050, 60, 1 },
548 { 1400, 1050, 60, 0 },
549 { 1400, 1050, 75, 0 },
551 { 1400, 1050, 85, 0 },
552 { 1680, 1050, 60, 1 },
553 { 1680, 1050, 60, 0 },
554 { 1680, 1050, 75, 0 },
555 { 1680, 1050, 85, 0 },
556 { 1600, 1200, 60, 0 },
557 { 1600, 1200, 65, 0 },
558 { 1600, 1200, 70, 0 },
560 { 1600, 1200, 75, 0 },
561 { 1600, 1200, 85, 0 },
562 { 1792, 1344, 60, 0 },
563 { 1792, 1344, 85, 0 },
564 { 1856, 1392, 60, 0 },
565 { 1856, 1392, 75, 0 },
566 { 1920, 1200, 60, 1 },
567 { 1920, 1200, 60, 0 },
569 { 1920, 1200, 75, 0 },
570 { 1920, 1200, 85, 0 },
571 { 1920, 1440, 60, 0 },
572 { 1920, 1440, 75, 0 },
575 static const struct minimode extra_modes[] = {
576 { 1024, 576, 60, 0 },
577 { 1366, 768, 60, 0 },
578 { 1600, 900, 60, 0 },
579 { 1680, 945, 60, 0 },
580 { 1920, 1080, 60, 0 },
581 { 2048, 1152, 60, 0 },
582 { 2048, 1536, 60, 0 },
586 * Probably taken from CEA-861 spec.
587 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
589 static const struct drm_display_mode edid_cea_modes[] = {
590 /* 1 - 640x480@60Hz */
591 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
592 752, 800, 0, 480, 490, 492, 525, 0,
593 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
595 /* 2 - 720x480@60Hz */
596 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
597 798, 858, 0, 480, 489, 495, 525, 0,
598 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
600 /* 3 - 720x480@60Hz */
601 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
602 798, 858, 0, 480, 489, 495, 525, 0,
603 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
605 /* 4 - 1280x720@60Hz */
606 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
607 1430, 1650, 0, 720, 725, 730, 750, 0,
608 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
610 /* 5 - 1920x1080i@60Hz */
611 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
612 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
613 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
614 DRM_MODE_FLAG_INTERLACE),
616 /* 6 - 1440x480i@60Hz */
617 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
618 1602, 1716, 0, 480, 488, 494, 525, 0,
619 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
620 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
622 /* 7 - 1440x480i@60Hz */
623 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
624 1602, 1716, 0, 480, 488, 494, 525, 0,
625 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
626 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
628 /* 8 - 1440x240@60Hz */
629 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
630 1602, 1716, 0, 240, 244, 247, 262, 0,
631 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
632 DRM_MODE_FLAG_DBLCLK),
634 /* 9 - 1440x240@60Hz */
635 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
636 1602, 1716, 0, 240, 244, 247, 262, 0,
637 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
638 DRM_MODE_FLAG_DBLCLK),
640 /* 10 - 2880x480i@60Hz */
641 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
642 3204, 3432, 0, 480, 488, 494, 525, 0,
643 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
644 DRM_MODE_FLAG_INTERLACE),
646 /* 11 - 2880x480i@60Hz */
647 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
648 3204, 3432, 0, 480, 488, 494, 525, 0,
649 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
650 DRM_MODE_FLAG_INTERLACE),
652 /* 12 - 2880x240@60Hz */
653 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
654 3204, 3432, 0, 240, 244, 247, 262, 0,
655 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
657 /* 13 - 2880x240@60Hz */
658 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
659 3204, 3432, 0, 240, 244, 247, 262, 0,
660 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
662 /* 14 - 1440x480@60Hz */
663 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
664 1596, 1716, 0, 480, 489, 495, 525, 0,
665 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
667 /* 15 - 1440x480@60Hz */
668 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
669 1596, 1716, 0, 480, 489, 495, 525, 0,
670 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
672 /* 16 - 1920x1080@60Hz */
673 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
674 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
675 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
677 /* 17 - 720x576@50Hz */
678 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
679 796, 864, 0, 576, 581, 586, 625, 0,
680 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
682 /* 18 - 720x576@50Hz */
683 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
684 796, 864, 0, 576, 581, 586, 625, 0,
685 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
687 /* 19 - 1280x720@50Hz */
688 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
689 1760, 1980, 0, 720, 725, 730, 750, 0,
690 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
692 /* 20 - 1920x1080i@50Hz */
693 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
694 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
695 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
696 DRM_MODE_FLAG_INTERLACE),
698 /* 21 - 1440x576i@50Hz */
699 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
700 1590, 1728, 0, 576, 580, 586, 625, 0,
701 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
702 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
704 /* 22 - 1440x576i@50Hz */
705 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
706 1590, 1728, 0, 576, 580, 586, 625, 0,
707 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
708 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
710 /* 23 - 1440x288@50Hz */
711 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
712 1590, 1728, 0, 288, 290, 293, 312, 0,
713 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
714 DRM_MODE_FLAG_DBLCLK),
716 /* 24 - 1440x288@50Hz */
717 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
718 1590, 1728, 0, 288, 290, 293, 312, 0,
719 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
720 DRM_MODE_FLAG_DBLCLK),
722 /* 25 - 2880x576i@50Hz */
723 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
724 3180, 3456, 0, 576, 580, 586, 625, 0,
725 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
726 DRM_MODE_FLAG_INTERLACE),
728 /* 26 - 2880x576i@50Hz */
729 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
730 3180, 3456, 0, 576, 580, 586, 625, 0,
731 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
732 DRM_MODE_FLAG_INTERLACE),
734 /* 27 - 2880x288@50Hz */
735 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
736 3180, 3456, 0, 288, 290, 293, 312, 0,
737 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
739 /* 28 - 2880x288@50Hz */
740 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
741 3180, 3456, 0, 288, 290, 293, 312, 0,
742 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
744 /* 29 - 1440x576@50Hz */
745 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
746 1592, 1728, 0, 576, 581, 586, 625, 0,
747 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
749 /* 30 - 1440x576@50Hz */
750 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
751 1592, 1728, 0, 576, 581, 586, 625, 0,
752 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
754 /* 31 - 1920x1080@50Hz */
755 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
756 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
757 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
759 /* 32 - 1920x1080@24Hz */
760 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
761 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
762 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
764 /* 33 - 1920x1080@25Hz */
765 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
766 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
767 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
769 /* 34 - 1920x1080@30Hz */
770 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
771 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
772 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
774 /* 35 - 2880x480@60Hz */
775 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
776 3192, 3432, 0, 480, 489, 495, 525, 0,
777 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
779 /* 36 - 2880x480@60Hz */
780 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
781 3192, 3432, 0, 480, 489, 495, 525, 0,
782 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
784 /* 37 - 2880x576@50Hz */
785 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
786 3184, 3456, 0, 576, 581, 586, 625, 0,
787 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
789 /* 38 - 2880x576@50Hz */
790 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
791 3184, 3456, 0, 576, 581, 586, 625, 0,
792 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
794 /* 39 - 1920x1080i@50Hz */
795 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
796 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
797 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
798 DRM_MODE_FLAG_INTERLACE),
800 /* 40 - 1920x1080i@100Hz */
801 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
802 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
803 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
804 DRM_MODE_FLAG_INTERLACE),
806 /* 41 - 1280x720@100Hz */
807 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
808 1760, 1980, 0, 720, 725, 730, 750, 0,
809 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
811 /* 42 - 720x576@100Hz */
812 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
813 796, 864, 0, 576, 581, 586, 625, 0,
814 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
816 /* 43 - 720x576@100Hz */
817 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
818 796, 864, 0, 576, 581, 586, 625, 0,
819 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
821 /* 44 - 1440x576i@100Hz */
822 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
823 1590, 1728, 0, 576, 580, 586, 625, 0,
824 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
825 DRM_MODE_FLAG_DBLCLK),
827 /* 45 - 1440x576i@100Hz */
828 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
829 1590, 1728, 0, 576, 580, 586, 625, 0,
830 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
831 DRM_MODE_FLAG_DBLCLK),
833 /* 46 - 1920x1080i@120Hz */
834 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
835 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
836 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
837 DRM_MODE_FLAG_INTERLACE),
839 /* 47 - 1280x720@120Hz */
840 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
841 1430, 1650, 0, 720, 725, 730, 750, 0,
842 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
844 /* 48 - 720x480@120Hz */
845 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
846 798, 858, 0, 480, 489, 495, 525, 0,
847 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
849 /* 49 - 720x480@120Hz */
850 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
851 798, 858, 0, 480, 489, 495, 525, 0,
852 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
854 /* 50 - 1440x480i@120Hz */
855 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
856 1602, 1716, 0, 480, 488, 494, 525, 0,
857 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
858 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
860 /* 51 - 1440x480i@120Hz */
861 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
862 1602, 1716, 0, 480, 488, 494, 525, 0,
863 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
864 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
866 /* 52 - 720x576@200Hz */
867 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
868 796, 864, 0, 576, 581, 586, 625, 0,
869 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
871 /* 53 - 720x576@200Hz */
872 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
873 796, 864, 0, 576, 581, 586, 625, 0,
874 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
876 /* 54 - 1440x576i@200Hz */
877 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
878 1590, 1728, 0, 576, 580, 586, 625, 0,
879 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
880 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
882 /* 55 - 1440x576i@200Hz */
883 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
884 1590, 1728, 0, 576, 580, 586, 625, 0,
885 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
886 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
888 /* 56 - 720x480@240Hz */
889 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
890 798, 858, 0, 480, 489, 495, 525, 0,
891 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
893 /* 57 - 720x480@240Hz */
894 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
895 798, 858, 0, 480, 489, 495, 525, 0,
896 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
898 /* 58 - 1440x480i@240 */
899 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
900 1602, 1716, 0, 480, 488, 494, 525, 0,
901 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
902 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
904 /* 59 - 1440x480i@240 */
905 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
906 1602, 1716, 0, 480, 488, 494, 525, 0,
907 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
908 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
910 /* 60 - 1280x720@24Hz */
911 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
912 3080, 3300, 0, 720, 725, 730, 750, 0,
913 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
915 /* 61 - 1280x720@25Hz */
916 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
917 3740, 3960, 0, 720, 725, 730, 750, 0,
918 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
920 /* 62 - 1280x720@30Hz */
921 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
922 3080, 3300, 0, 720, 725, 730, 750, 0,
923 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
925 /* 63 - 1920x1080@120Hz */
926 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
927 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
928 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
930 /* 64 - 1920x1080@100Hz */
931 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
932 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
933 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
937 /*** DDC fetch and block validation ***/
939 static const u8 edid_header[] = {
940 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
944 * Sanity check the header of the base EDID block. Return 8 if the header
945 * is perfect, down to 0 if it's totally wrong.
947 int drm_edid_header_is_valid(const u8 *raw_edid)
951 for (i = 0; i < sizeof(edid_header); i++)
952 if (raw_edid[i] == edid_header[i])
957 EXPORT_SYMBOL(drm_edid_header_is_valid);
959 static int edid_fixup __read_mostly = 6;
960 module_param_named(edid_fixup, edid_fixup, int, 0400);
961 MODULE_PARM_DESC(edid_fixup,
962 "Minimum number of valid EDID header bytes (0-8, default 6)");
965 * Sanity check the EDID block (base or extension). Return 0 if the block
966 * doesn't check out, or 1 if it's valid.
968 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
972 struct edid *edid = (struct edid *)raw_edid;
974 if (edid_fixup > 8 || edid_fixup < 0)
978 int score = drm_edid_header_is_valid(raw_edid);
980 else if (score >= edid_fixup) {
981 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
982 memcpy(raw_edid, edid_header, sizeof(edid_header));
988 for (i = 0; i < EDID_LENGTH; i++)
991 if (print_bad_edid) {
992 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
995 /* allow CEA to slide through, switches mangle this */
996 if (raw_edid[0] != 0x02)
1000 /* per-block-type checks */
1001 switch (raw_edid[0]) {
1003 if (edid->version != 1) {
1004 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1008 if (edid->revision > 4)
1009 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1019 if (raw_edid && print_bad_edid) {
1020 printk(KERN_ERR "Raw EDID:\n");
1021 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1022 raw_edid, EDID_LENGTH, false);
1026 EXPORT_SYMBOL(drm_edid_block_valid);
1029 * drm_edid_is_valid - sanity check EDID data
1032 * Sanity-check an entire EDID record (including extensions)
1034 bool drm_edid_is_valid(struct edid *edid)
1037 u8 *raw = (u8 *)edid;
1042 for (i = 0; i <= edid->extensions; i++)
1043 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
1048 EXPORT_SYMBOL(drm_edid_is_valid);
1050 #define DDC_SEGMENT_ADDR 0x30
1052 * Get EDID information via I2C.
1054 * \param adapter : i2c device adaptor
1055 * \param buf : EDID data buffer to be filled
1056 * \param len : EDID data buffer length
1057 * \return 0 on success or -1 on failure.
1059 * Try to fetch EDID information by calling i2c driver function.
1062 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
1065 unsigned char start = block * EDID_LENGTH;
1066 unsigned char segment = block >> 1;
1067 unsigned char xfers = segment ? 3 : 2;
1068 int ret, retries = 5;
1070 /* The core i2c driver will automatically retry the transfer if the
1071 * adapter reports EAGAIN. However, we find that bit-banging transfers
1072 * are susceptible to errors under a heavily loaded machine and
1073 * generate spurious NAKs and timeouts. Retrying the transfer
1074 * of the individual block a few times seems to overcome this.
1077 struct i2c_msg msgs[] = {
1079 .addr = DDC_SEGMENT_ADDR,
1097 * Avoid sending the segment addr to not upset non-compliant ddc
1100 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1102 if (ret == -ENXIO) {
1103 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1107 } while (ret != xfers && --retries);
1109 return ret == xfers ? 0 : -1;
1112 static bool drm_edid_is_zero(u8 *in_edid, int length)
1114 if (memchr_inv(in_edid, 0, length))
1121 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
1123 int i, j = 0, valid_extensions = 0;
1125 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1127 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1130 /* base block fetch */
1131 for (i = 0; i < 4; i++) {
1132 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
1134 if (drm_edid_block_valid(block, 0, print_bad_edid))
1136 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1137 connector->null_edid_counter++;
1144 /* if there's no extensions, we're done */
1145 if (block[0x7e] == 0)
1148 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1153 for (j = 1; j <= block[0x7e]; j++) {
1154 for (i = 0; i < 4; i++) {
1155 if (drm_do_probe_ddc_edid(adapter,
1156 block + (valid_extensions + 1) * EDID_LENGTH,
1159 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1165 if (i == 4 && print_bad_edid) {
1166 dev_warn(connector->dev->dev,
1167 "%s: Ignoring invalid EDID block %d.\n",
1168 drm_get_connector_name(connector), j);
1170 connector->bad_edid_counter++;
1174 if (valid_extensions != block[0x7e]) {
1175 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1176 block[0x7e] = valid_extensions;
1177 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1186 if (print_bad_edid) {
1187 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1188 drm_get_connector_name(connector), j);
1190 connector->bad_edid_counter++;
1198 * Probe DDC presence.
1200 * \param adapter : i2c device adaptor
1201 * \return 1 on success
1204 drm_probe_ddc(struct i2c_adapter *adapter)
1208 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1210 EXPORT_SYMBOL(drm_probe_ddc);
1213 * drm_get_edid - get EDID data, if available
1214 * @connector: connector we're probing
1215 * @adapter: i2c adapter to use for DDC
1217 * Poke the given i2c channel to grab EDID data if possible. If found,
1218 * attach it to the connector.
1220 * Return edid data or NULL if we couldn't find any.
1222 struct edid *drm_get_edid(struct drm_connector *connector,
1223 struct i2c_adapter *adapter)
1225 struct edid *edid = NULL;
1227 if (drm_probe_ddc(adapter))
1228 edid = (struct edid *)drm_do_get_edid(connector, adapter);
1232 EXPORT_SYMBOL(drm_get_edid);
1234 /*** EDID parsing ***/
1237 * edid_vendor - match a string against EDID's obfuscated vendor field
1238 * @edid: EDID to match
1239 * @vendor: vendor string
1241 * Returns true if @vendor is in @edid, false otherwise
1243 static bool edid_vendor(struct edid *edid, char *vendor)
1245 char edid_vendor[3];
1247 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1248 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1249 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1250 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1252 return !strncmp(edid_vendor, vendor, 3);
1256 * edid_get_quirks - return quirk flags for a given EDID
1257 * @edid: EDID to process
1259 * This tells subsequent routines what fixes they need to apply.
1261 static u32 edid_get_quirks(struct edid *edid)
1263 struct edid_quirk *quirk;
1266 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1267 quirk = &edid_quirk_list[i];
1269 if (edid_vendor(edid, quirk->vendor) &&
1270 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1271 return quirk->quirks;
1277 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1278 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
1281 * edid_fixup_preferred - set preferred modes based on quirk list
1282 * @connector: has mode list to fix up
1283 * @quirks: quirks list
1285 * Walk the mode list for @connector, clearing the preferred status
1286 * on existing modes and setting it anew for the right mode ala @quirks.
1288 static void edid_fixup_preferred(struct drm_connector *connector,
1291 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1292 int target_refresh = 0;
1294 if (list_empty(&connector->probed_modes))
1297 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1298 target_refresh = 60;
1299 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1300 target_refresh = 75;
1302 preferred_mode = list_first_entry(&connector->probed_modes,
1303 struct drm_display_mode, head);
1305 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1306 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1308 if (cur_mode == preferred_mode)
1311 /* Largest mode is preferred */
1312 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1313 preferred_mode = cur_mode;
1315 /* At a given size, try to get closest to target refresh */
1316 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1317 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
1318 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
1319 preferred_mode = cur_mode;
1323 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1327 mode_is_rb(const struct drm_display_mode *mode)
1329 return (mode->htotal - mode->hdisplay == 160) &&
1330 (mode->hsync_end - mode->hdisplay == 80) &&
1331 (mode->hsync_end - mode->hsync_start == 32) &&
1332 (mode->vsync_start - mode->vdisplay == 3);
1336 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1337 * @dev: Device to duplicate against
1338 * @hsize: Mode width
1339 * @vsize: Mode height
1340 * @fresh: Mode refresh rate
1341 * @rb: Mode reduced-blanking-ness
1343 * Walk the DMT mode list looking for a match for the given parameters.
1344 * Return a newly allocated copy of the mode, or NULL if not found.
1346 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1347 int hsize, int vsize, int fresh,
1352 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1353 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1354 if (hsize != ptr->hdisplay)
1356 if (vsize != ptr->vdisplay)
1358 if (fresh != drm_mode_vrefresh(ptr))
1360 if (rb != mode_is_rb(ptr))
1363 return drm_mode_duplicate(dev, ptr);
1368 EXPORT_SYMBOL(drm_mode_find_dmt);
1370 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1373 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1377 u8 *det_base = ext + d;
1380 for (i = 0; i < n; i++)
1381 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1385 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1387 unsigned int i, n = min((int)ext[0x02], 6);
1388 u8 *det_base = ext + 5;
1391 return; /* unknown version */
1393 for (i = 0; i < n; i++)
1394 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1398 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1401 struct edid *edid = (struct edid *)raw_edid;
1406 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1407 cb(&(edid->detailed_timings[i]), closure);
1409 for (i = 1; i <= raw_edid[0x7e]; i++) {
1410 u8 *ext = raw_edid + (i * EDID_LENGTH);
1413 cea_for_each_detailed_block(ext, cb, closure);
1416 vtb_for_each_detailed_block(ext, cb, closure);
1425 is_rb(struct detailed_timing *t, void *data)
1428 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1430 *(bool *)data = true;
1433 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1435 drm_monitor_supports_rb(struct edid *edid)
1437 if (edid->revision >= 4) {
1439 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1443 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1447 find_gtf2(struct detailed_timing *t, void *data)
1450 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1454 /* Secondary GTF curve kicks in above some break frequency */
1456 drm_gtf2_hbreak(struct edid *edid)
1459 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1460 return r ? (r[12] * 2) : 0;
1464 drm_gtf2_2c(struct edid *edid)
1467 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1468 return r ? r[13] : 0;
1472 drm_gtf2_m(struct edid *edid)
1475 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1476 return r ? (r[15] << 8) + r[14] : 0;
1480 drm_gtf2_k(struct edid *edid)
1483 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1484 return r ? r[16] : 0;
1488 drm_gtf2_2j(struct edid *edid)
1491 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1492 return r ? r[17] : 0;
1496 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1497 * @edid: EDID block to scan
1499 static int standard_timing_level(struct edid *edid)
1501 if (edid->revision >= 2) {
1502 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1504 if (drm_gtf2_hbreak(edid))
1512 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1513 * monitors fill with ascii space (0x20) instead.
1516 bad_std_timing(u8 a, u8 b)
1518 return (a == 0x00 && b == 0x00) ||
1519 (a == 0x01 && b == 0x01) ||
1520 (a == 0x20 && b == 0x20);
1524 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1525 * @t: standard timing params
1526 * @timing_level: standard timing level
1528 * Take the standard timing params (in this case width, aspect, and refresh)
1529 * and convert them into a real mode using CVT/GTF/DMT.
1531 static struct drm_display_mode *
1532 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1533 struct std_timing *t, int revision)
1535 struct drm_device *dev = connector->dev;
1536 struct drm_display_mode *m, *mode = NULL;
1539 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1540 >> EDID_TIMING_ASPECT_SHIFT;
1541 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1542 >> EDID_TIMING_VFREQ_SHIFT;
1543 int timing_level = standard_timing_level(edid);
1545 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1548 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1549 hsize = t->hsize * 8 + 248;
1550 /* vrefresh_rate = vfreq + 60 */
1551 vrefresh_rate = vfreq + 60;
1552 /* the vdisplay is calculated based on the aspect ratio */
1553 if (aspect_ratio == 0) {
1557 vsize = (hsize * 10) / 16;
1558 } else if (aspect_ratio == 1)
1559 vsize = (hsize * 3) / 4;
1560 else if (aspect_ratio == 2)
1561 vsize = (hsize * 4) / 5;
1563 vsize = (hsize * 9) / 16;
1565 /* HDTV hack, part 1 */
1566 if (vrefresh_rate == 60 &&
1567 ((hsize == 1360 && vsize == 765) ||
1568 (hsize == 1368 && vsize == 769))) {
1574 * If this connector already has a mode for this size and refresh
1575 * rate (because it came from detailed or CVT info), use that
1576 * instead. This way we don't have to guess at interlace or
1579 list_for_each_entry(m, &connector->probed_modes, head)
1580 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1581 drm_mode_vrefresh(m) == vrefresh_rate)
1584 /* HDTV hack, part 2 */
1585 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1586 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1588 mode->hdisplay = 1366;
1589 mode->hsync_start = mode->hsync_start - 1;
1590 mode->hsync_end = mode->hsync_end - 1;
1594 /* check whether it can be found in default mode table */
1595 if (drm_monitor_supports_rb(edid)) {
1596 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1601 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1605 /* okay, generate it */
1606 switch (timing_level) {
1610 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1614 * This is potentially wrong if there's ever a monitor with
1615 * more than one ranges section, each claiming a different
1616 * secondary GTF curve. Please don't do that.
1618 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1621 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1622 drm_mode_destroy(dev, mode);
1623 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1624 vrefresh_rate, 0, 0,
1632 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1640 * EDID is delightfully ambiguous about how interlaced modes are to be
1641 * encoded. Our internal representation is of frame height, but some
1642 * HDTV detailed timings are encoded as field height.
1644 * The format list here is from CEA, in frame size. Technically we
1645 * should be checking refresh rate too. Whatever.
1648 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1649 struct detailed_pixel_timing *pt)
1652 static const struct {
1654 } cea_interlaced[] = {
1664 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1667 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1668 if ((mode->hdisplay == cea_interlaced[i].w) &&
1669 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1670 mode->vdisplay *= 2;
1671 mode->vsync_start *= 2;
1672 mode->vsync_end *= 2;
1678 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1682 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1683 * @dev: DRM device (needed to create new mode)
1685 * @timing: EDID detailed timing info
1686 * @quirks: quirks to apply
1688 * An EDID detailed timing block contains enough info for us to create and
1689 * return a new struct drm_display_mode.
1691 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1693 struct detailed_timing *timing,
1696 struct drm_display_mode *mode;
1697 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1698 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1699 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1700 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1701 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1702 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1703 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1704 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1705 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1707 /* ignore tiny modes */
1708 if (hactive < 64 || vactive < 64)
1711 if (pt->misc & DRM_EDID_PT_STEREO) {
1712 printk(KERN_WARNING "stereo mode not supported\n");
1715 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1716 printk(KERN_WARNING "composite sync not supported\n");
1719 /* it is incorrect if hsync/vsync width is zero */
1720 if (!hsync_pulse_width || !vsync_pulse_width) {
1721 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1722 "Wrong Hsync/Vsync pulse width\n");
1726 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1727 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1734 mode = drm_mode_create(dev);
1738 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1739 timing->pixel_clock = cpu_to_le16(1088);
1741 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1743 mode->hdisplay = hactive;
1744 mode->hsync_start = mode->hdisplay + hsync_offset;
1745 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1746 mode->htotal = mode->hdisplay + hblank;
1748 mode->vdisplay = vactive;
1749 mode->vsync_start = mode->vdisplay + vsync_offset;
1750 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1751 mode->vtotal = mode->vdisplay + vblank;
1753 /* Some EDIDs have bogus h/vtotal values */
1754 if (mode->hsync_end > mode->htotal)
1755 mode->htotal = mode->hsync_end + 1;
1756 if (mode->vsync_end > mode->vtotal)
1757 mode->vtotal = mode->vsync_end + 1;
1759 drm_mode_do_interlace_quirk(mode, pt);
1761 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1762 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1765 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1766 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1767 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1768 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1771 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1772 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1774 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1775 mode->width_mm *= 10;
1776 mode->height_mm *= 10;
1779 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1780 mode->width_mm = edid->width_cm * 10;
1781 mode->height_mm = edid->height_cm * 10;
1784 mode->type = DRM_MODE_TYPE_DRIVER;
1785 mode->vrefresh = drm_mode_vrefresh(mode);
1786 drm_mode_set_name(mode);
1792 mode_in_hsync_range(const struct drm_display_mode *mode,
1793 struct edid *edid, u8 *t)
1795 int hsync, hmin, hmax;
1798 if (edid->revision >= 4)
1799 hmin += ((t[4] & 0x04) ? 255 : 0);
1801 if (edid->revision >= 4)
1802 hmax += ((t[4] & 0x08) ? 255 : 0);
1803 hsync = drm_mode_hsync(mode);
1805 return (hsync <= hmax && hsync >= hmin);
1809 mode_in_vsync_range(const struct drm_display_mode *mode,
1810 struct edid *edid, u8 *t)
1812 int vsync, vmin, vmax;
1815 if (edid->revision >= 4)
1816 vmin += ((t[4] & 0x01) ? 255 : 0);
1818 if (edid->revision >= 4)
1819 vmax += ((t[4] & 0x02) ? 255 : 0);
1820 vsync = drm_mode_vrefresh(mode);
1822 return (vsync <= vmax && vsync >= vmin);
1826 range_pixel_clock(struct edid *edid, u8 *t)
1829 if (t[9] == 0 || t[9] == 255)
1832 /* 1.4 with CVT support gives us real precision, yay */
1833 if (edid->revision >= 4 && t[10] == 0x04)
1834 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1836 /* 1.3 is pathetic, so fuzz up a bit */
1837 return t[9] * 10000 + 5001;
1841 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1842 struct detailed_timing *timing)
1845 u8 *t = (u8 *)timing;
1847 if (!mode_in_hsync_range(mode, edid, t))
1850 if (!mode_in_vsync_range(mode, edid, t))
1853 if ((max_clock = range_pixel_clock(edid, t)))
1854 if (mode->clock > max_clock)
1857 /* 1.4 max horizontal check */
1858 if (edid->revision >= 4 && t[10] == 0x04)
1859 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1862 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1868 static bool valid_inferred_mode(const struct drm_connector *connector,
1869 const struct drm_display_mode *mode)
1871 struct drm_display_mode *m;
1874 list_for_each_entry(m, &connector->probed_modes, head) {
1875 if (mode->hdisplay == m->hdisplay &&
1876 mode->vdisplay == m->vdisplay &&
1877 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1878 return false; /* duplicated */
1879 if (mode->hdisplay <= m->hdisplay &&
1880 mode->vdisplay <= m->vdisplay)
1887 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1888 struct detailed_timing *timing)
1891 struct drm_display_mode *newmode;
1892 struct drm_device *dev = connector->dev;
1894 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1895 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1896 valid_inferred_mode(connector, drm_dmt_modes + i)) {
1897 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1899 drm_mode_probed_add(connector, newmode);
1908 /* fix up 1366x768 mode from 1368x768;
1909 * GFT/CVT can't express 1366 width which isn't dividable by 8
1911 static void fixup_mode_1366x768(struct drm_display_mode *mode)
1913 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1914 mode->hdisplay = 1366;
1915 mode->hsync_start--;
1917 drm_mode_set_name(mode);
1922 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1923 struct detailed_timing *timing)
1926 struct drm_display_mode *newmode;
1927 struct drm_device *dev = connector->dev;
1929 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1930 const struct minimode *m = &extra_modes[i];
1931 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
1935 fixup_mode_1366x768(newmode);
1936 if (!mode_in_range(newmode, edid, timing) ||
1937 !valid_inferred_mode(connector, newmode)) {
1938 drm_mode_destroy(dev, newmode);
1942 drm_mode_probed_add(connector, newmode);
1950 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1951 struct detailed_timing *timing)
1954 struct drm_display_mode *newmode;
1955 struct drm_device *dev = connector->dev;
1956 bool rb = drm_monitor_supports_rb(edid);
1958 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1959 const struct minimode *m = &extra_modes[i];
1960 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
1964 fixup_mode_1366x768(newmode);
1965 if (!mode_in_range(newmode, edid, timing) ||
1966 !valid_inferred_mode(connector, newmode)) {
1967 drm_mode_destroy(dev, newmode);
1971 drm_mode_probed_add(connector, newmode);
1979 do_inferred_modes(struct detailed_timing *timing, void *c)
1981 struct detailed_mode_closure *closure = c;
1982 struct detailed_non_pixel *data = &timing->data.other_data;
1983 struct detailed_data_monitor_range *range = &data->data.range;
1985 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1988 closure->modes += drm_dmt_modes_for_range(closure->connector,
1992 if (!version_greater(closure->edid, 1, 1))
1993 return; /* GTF not defined yet */
1995 switch (range->flags) {
1996 case 0x02: /* secondary gtf, XXX could do more */
1997 case 0x00: /* default gtf */
1998 closure->modes += drm_gtf_modes_for_range(closure->connector,
2002 case 0x04: /* cvt, only in 1.4+ */
2003 if (!version_greater(closure->edid, 1, 3))
2006 closure->modes += drm_cvt_modes_for_range(closure->connector,
2010 case 0x01: /* just the ranges, no formula */
2017 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2019 struct detailed_mode_closure closure = {
2020 connector, edid, 0, 0, 0
2023 if (version_greater(edid, 1, 0))
2024 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2027 return closure.modes;
2031 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2033 int i, j, m, modes = 0;
2034 struct drm_display_mode *mode;
2035 u8 *est = ((u8 *)timing) + 5;
2037 for (i = 0; i < 6; i++) {
2038 for (j = 7; j > 0; j--) {
2039 m = (i * 8) + (7 - j);
2040 if (m >= ARRAY_SIZE(est3_modes))
2042 if (est[i] & (1 << j)) {
2043 mode = drm_mode_find_dmt(connector->dev,
2049 drm_mode_probed_add(connector, mode);
2060 do_established_modes(struct detailed_timing *timing, void *c)
2062 struct detailed_mode_closure *closure = c;
2063 struct detailed_non_pixel *data = &timing->data.other_data;
2065 if (data->type == EDID_DETAIL_EST_TIMINGS)
2066 closure->modes += drm_est3_modes(closure->connector, timing);
2070 * add_established_modes - get est. modes from EDID and add them
2071 * @edid: EDID block to scan
2073 * Each EDID block contains a bitmap of the supported "established modes" list
2074 * (defined above). Tease them out and add them to the global modes list.
2077 add_established_modes(struct drm_connector *connector, struct edid *edid)
2079 struct drm_device *dev = connector->dev;
2080 unsigned long est_bits = edid->established_timings.t1 |
2081 (edid->established_timings.t2 << 8) |
2082 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2084 struct detailed_mode_closure closure = {
2085 connector, edid, 0, 0, 0
2088 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2089 if (est_bits & (1<<i)) {
2090 struct drm_display_mode *newmode;
2091 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2093 drm_mode_probed_add(connector, newmode);
2099 if (version_greater(edid, 1, 0))
2100 drm_for_each_detailed_block((u8 *)edid,
2101 do_established_modes, &closure);
2103 return modes + closure.modes;
2107 do_standard_modes(struct detailed_timing *timing, void *c)
2109 struct detailed_mode_closure *closure = c;
2110 struct detailed_non_pixel *data = &timing->data.other_data;
2111 struct drm_connector *connector = closure->connector;
2112 struct edid *edid = closure->edid;
2114 if (data->type == EDID_DETAIL_STD_MODES) {
2116 for (i = 0; i < 6; i++) {
2117 struct std_timing *std;
2118 struct drm_display_mode *newmode;
2120 std = &data->data.timings[i];
2121 newmode = drm_mode_std(connector, edid, std,
2124 drm_mode_probed_add(connector, newmode);
2132 * add_standard_modes - get std. modes from EDID and add them
2133 * @edid: EDID block to scan
2135 * Standard modes can be calculated using the appropriate standard (DMT,
2136 * GTF or CVT. Grab them from @edid and add them to the list.
2139 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2142 struct detailed_mode_closure closure = {
2143 connector, edid, 0, 0, 0
2146 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2147 struct drm_display_mode *newmode;
2149 newmode = drm_mode_std(connector, edid,
2150 &edid->standard_timings[i],
2153 drm_mode_probed_add(connector, newmode);
2158 if (version_greater(edid, 1, 0))
2159 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2162 /* XXX should also look for standard codes in VTB blocks */
2164 return modes + closure.modes;
2167 static int drm_cvt_modes(struct drm_connector *connector,
2168 struct detailed_timing *timing)
2170 int i, j, modes = 0;
2171 struct drm_display_mode *newmode;
2172 struct drm_device *dev = connector->dev;
2173 struct cvt_timing *cvt;
2174 const int rates[] = { 60, 85, 75, 60, 50 };
2175 const u8 empty[3] = { 0, 0, 0 };
2177 for (i = 0; i < 4; i++) {
2178 int uninitialized_var(width), height;
2179 cvt = &(timing->data.other_data.data.cvt[i]);
2181 if (!memcmp(cvt->code, empty, 3))
2184 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2185 switch (cvt->code[1] & 0x0c) {
2187 width = height * 4 / 3;
2190 width = height * 16 / 9;
2193 width = height * 16 / 10;
2196 width = height * 15 / 9;
2200 for (j = 1; j < 5; j++) {
2201 if (cvt->code[2] & (1 << j)) {
2202 newmode = drm_cvt_mode(dev, width, height,
2206 drm_mode_probed_add(connector, newmode);
2217 do_cvt_mode(struct detailed_timing *timing, void *c)
2219 struct detailed_mode_closure *closure = c;
2220 struct detailed_non_pixel *data = &timing->data.other_data;
2222 if (data->type == EDID_DETAIL_CVT_3BYTE)
2223 closure->modes += drm_cvt_modes(closure->connector, timing);
2227 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2229 struct detailed_mode_closure closure = {
2230 connector, edid, 0, 0, 0
2233 if (version_greater(edid, 1, 2))
2234 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2236 /* XXX should also look for CVT codes in VTB blocks */
2238 return closure.modes;
2242 do_detailed_mode(struct detailed_timing *timing, void *c)
2244 struct detailed_mode_closure *closure = c;
2245 struct drm_display_mode *newmode;
2247 if (timing->pixel_clock) {
2248 newmode = drm_mode_detailed(closure->connector->dev,
2249 closure->edid, timing,
2254 if (closure->preferred)
2255 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2257 drm_mode_probed_add(closure->connector, newmode);
2259 closure->preferred = 0;
2264 * add_detailed_modes - Add modes from detailed timings
2265 * @connector: attached connector
2266 * @edid: EDID block to scan
2267 * @quirks: quirks to apply
2270 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2273 struct detailed_mode_closure closure = {
2281 if (closure.preferred && !version_greater(edid, 1, 3))
2283 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2285 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2287 return closure.modes;
2290 #define HDMI_IDENTIFIER 0x000C03
2291 #define AUDIO_BLOCK 0x01
2292 #define VIDEO_BLOCK 0x02
2293 #define VENDOR_BLOCK 0x03
2294 #define SPEAKER_BLOCK 0x04
2295 #define VIDEO_CAPABILITY_BLOCK 0x07
2296 #define EDID_BASIC_AUDIO (1 << 6)
2297 #define EDID_CEA_YCRCB444 (1 << 5)
2298 #define EDID_CEA_YCRCB422 (1 << 4)
2299 #define EDID_CEA_VCDB_QS (1 << 6)
2302 * Search EDID for CEA extension block.
2304 u8 *drm_find_cea_extension(struct edid *edid)
2306 u8 *edid_ext = NULL;
2309 /* No EDID or EDID extensions */
2310 if (edid == NULL || edid->extensions == 0)
2313 /* Find CEA extension */
2314 for (i = 0; i < edid->extensions; i++) {
2315 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2316 if (edid_ext[0] == CEA_EXT)
2320 if (i == edid->extensions)
2325 EXPORT_SYMBOL(drm_find_cea_extension);
2328 * drm_match_cea_mode - look for a CEA mode matching given mode
2329 * @to_match: display mode
2331 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2334 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2338 if (!to_match->clock)
2341 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2342 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
2343 unsigned int clock1, clock2;
2345 clock1 = clock2 = cea_mode->clock;
2347 /* Check both 60Hz and 59.94Hz */
2348 if (cea_mode->vrefresh % 6 == 0) {
2350 * edid_cea_modes contains the 59.94Hz
2351 * variant for 240 and 480 line modes,
2352 * and the 60Hz variant otherwise.
2354 if (cea_mode->vdisplay == 240 ||
2355 cea_mode->vdisplay == 480)
2356 clock1 = clock1 * 1001 / 1000;
2358 clock2 = DIV_ROUND_UP(clock2 * 1000, 1001);
2361 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2362 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2363 drm_mode_equal_no_clocks(to_match, cea_mode))
2368 EXPORT_SYMBOL(drm_match_cea_mode);
2372 do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
2374 struct drm_device *dev = connector->dev;
2375 u8 * mode, cea_mode;
2378 for (mode = db; mode < db + len; mode++) {
2379 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
2380 if (cea_mode < ARRAY_SIZE(edid_cea_modes)) {
2381 struct drm_display_mode *newmode;
2382 newmode = drm_mode_duplicate(dev,
2383 &edid_cea_modes[cea_mode]);
2385 newmode->vrefresh = 0;
2386 drm_mode_probed_add(connector, newmode);
2396 cea_db_payload_len(const u8 *db)
2398 return db[0] & 0x1f;
2402 cea_db_tag(const u8 *db)
2408 cea_revision(const u8 *cea)
2414 cea_db_offsets(const u8 *cea, int *start, int *end)
2416 /* Data block offset in CEA extension block */
2421 if (*end < 4 || *end > 127)
2426 #define for_each_cea_db(cea, i, start, end) \
2427 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
2430 add_cea_modes(struct drm_connector *connector, struct edid *edid)
2432 u8 * cea = drm_find_cea_extension(edid);
2436 if (cea && cea_revision(cea) >= 3) {
2439 if (cea_db_offsets(cea, &start, &end))
2442 for_each_cea_db(cea, i, start, end) {
2444 dbl = cea_db_payload_len(db);
2446 if (cea_db_tag(db) == VIDEO_BLOCK)
2447 modes += do_cea_modes (connector, db+1, dbl);
2455 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
2457 u8 len = cea_db_payload_len(db);
2460 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
2461 connector->dvi_dual = db[6] & 1;
2464 connector->max_tmds_clock = db[7] * 5;
2466 connector->latency_present[0] = db[8] >> 7;
2467 connector->latency_present[1] = (db[8] >> 6) & 1;
2470 connector->video_latency[0] = db[9];
2472 connector->audio_latency[0] = db[10];
2474 connector->video_latency[1] = db[11];
2476 connector->audio_latency[1] = db[12];
2478 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
2479 "max TMDS clock %d, "
2480 "latency present %d %d, "
2481 "video latency %d %d, "
2482 "audio latency %d %d\n",
2483 connector->dvi_dual,
2484 connector->max_tmds_clock,
2485 (int) connector->latency_present[0],
2486 (int) connector->latency_present[1],
2487 connector->video_latency[0],
2488 connector->video_latency[1],
2489 connector->audio_latency[0],
2490 connector->audio_latency[1]);
2494 monitor_name(struct detailed_timing *t, void *data)
2496 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
2497 *(u8 **)data = t->data.other_data.data.str.str;
2500 static bool cea_db_is_hdmi_vsdb(const u8 *db)
2504 if (cea_db_tag(db) != VENDOR_BLOCK)
2507 if (cea_db_payload_len(db) < 5)
2510 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
2512 return hdmi_id == HDMI_IDENTIFIER;
2516 * drm_edid_to_eld - build ELD from EDID
2517 * @connector: connector corresponding to the HDMI/DP sink
2518 * @edid: EDID to parse
2520 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
2521 * Some ELD fields are left to the graphics driver caller:
2526 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
2528 uint8_t *eld = connector->eld;
2536 memset(eld, 0, sizeof(connector->eld));
2538 cea = drm_find_cea_extension(edid);
2540 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
2545 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
2546 for (mnl = 0; name && mnl < 13; mnl++) {
2547 if (name[mnl] == 0x0a)
2549 eld[20 + mnl] = name[mnl];
2551 eld[4] = (cea[1] << 5) | mnl;
2552 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
2554 eld[0] = 2 << 3; /* ELD version: 2 */
2556 eld[16] = edid->mfg_id[0];
2557 eld[17] = edid->mfg_id[1];
2558 eld[18] = edid->prod_code[0];
2559 eld[19] = edid->prod_code[1];
2561 if (cea_revision(cea) >= 3) {
2564 if (cea_db_offsets(cea, &start, &end)) {
2569 for_each_cea_db(cea, i, start, end) {
2571 dbl = cea_db_payload_len(db);
2573 switch (cea_db_tag(db)) {
2575 /* Audio Data Block, contains SADs */
2576 sad_count = dbl / 3;
2578 memcpy(eld + 20 + mnl, &db[1], dbl);
2581 /* Speaker Allocation Data Block */
2586 /* HDMI Vendor-Specific Data Block */
2587 if (cea_db_is_hdmi_vsdb(db))
2588 parse_hdmi_vsdb(connector, db);
2595 eld[5] |= sad_count << 4;
2596 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
2598 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
2600 EXPORT_SYMBOL(drm_edid_to_eld);
2603 * drm_edid_to_sad - extracts SADs from EDID
2604 * @edid: EDID to parse
2605 * @sads: pointer that will be set to the extracted SADs
2607 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
2608 * Note: returned pointer needs to be kfreed
2610 * Return number of found SADs or negative number on error.
2612 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
2615 int i, start, end, dbl;
2618 cea = drm_find_cea_extension(edid);
2620 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
2624 if (cea_revision(cea) < 3) {
2625 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
2629 if (cea_db_offsets(cea, &start, &end)) {
2630 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
2634 for_each_cea_db(cea, i, start, end) {
2637 if (cea_db_tag(db) == AUDIO_BLOCK) {
2639 dbl = cea_db_payload_len(db);
2641 count = dbl / 3; /* SAD is 3B */
2642 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
2645 for (j = 0; j < count; j++) {
2646 u8 *sad = &db[1 + j * 3];
2648 (*sads)[j].format = (sad[0] & 0x78) >> 3;
2649 (*sads)[j].channels = sad[0] & 0x7;
2650 (*sads)[j].freq = sad[1] & 0x7F;
2651 (*sads)[j].byte2 = sad[2];
2659 EXPORT_SYMBOL(drm_edid_to_sad);
2662 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
2663 * @connector: connector associated with the HDMI/DP sink
2664 * @mode: the display mode
2666 int drm_av_sync_delay(struct drm_connector *connector,
2667 struct drm_display_mode *mode)
2669 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
2672 if (!connector->latency_present[0])
2674 if (!connector->latency_present[1])
2677 a = connector->audio_latency[i];
2678 v = connector->video_latency[i];
2681 * HDMI/DP sink doesn't support audio or video?
2683 if (a == 255 || v == 255)
2687 * Convert raw EDID values to millisecond.
2688 * Treat unknown latency as 0ms.
2691 a = min(2 * (a - 1), 500);
2693 v = min(2 * (v - 1), 500);
2695 return max(v - a, 0);
2697 EXPORT_SYMBOL(drm_av_sync_delay);
2700 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
2701 * @encoder: the encoder just changed display mode
2702 * @mode: the adjusted display mode
2704 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
2705 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
2707 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
2708 struct drm_display_mode *mode)
2710 struct drm_connector *connector;
2711 struct drm_device *dev = encoder->dev;
2713 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
2714 if (connector->encoder == encoder && connector->eld[0])
2719 EXPORT_SYMBOL(drm_select_eld);
2722 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
2723 * @edid: monitor EDID information
2725 * Parse the CEA extension according to CEA-861-B.
2726 * Return true if HDMI, false if not or unknown.
2728 bool drm_detect_hdmi_monitor(struct edid *edid)
2732 int start_offset, end_offset;
2734 edid_ext = drm_find_cea_extension(edid);
2738 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
2742 * Because HDMI identifier is in Vendor Specific Block,
2743 * search it from all data blocks of CEA extension.
2745 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
2746 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
2752 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
2755 * drm_detect_monitor_audio - check monitor audio capability
2757 * Monitor should have CEA extension block.
2758 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
2759 * audio' only. If there is any audio extension block and supported
2760 * audio format, assume at least 'basic audio' support, even if 'basic
2761 * audio' is not defined in EDID.
2764 bool drm_detect_monitor_audio(struct edid *edid)
2768 bool has_audio = false;
2769 int start_offset, end_offset;
2771 edid_ext = drm_find_cea_extension(edid);
2775 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
2778 DRM_DEBUG_KMS("Monitor has basic audio support\n");
2782 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
2785 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
2786 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
2788 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
2789 DRM_DEBUG_KMS("CEA audio format %d\n",
2790 (edid_ext[i + j] >> 3) & 0xf);
2797 EXPORT_SYMBOL(drm_detect_monitor_audio);
2800 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
2802 * Check whether the monitor reports the RGB quantization range selection
2803 * as supported. The AVI infoframe can then be used to inform the monitor
2804 * which quantization range (full or limited) is used.
2806 bool drm_rgb_quant_range_selectable(struct edid *edid)
2811 edid_ext = drm_find_cea_extension(edid);
2815 if (cea_db_offsets(edid_ext, &start, &end))
2818 for_each_cea_db(edid_ext, i, start, end) {
2819 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
2820 cea_db_payload_len(&edid_ext[i]) == 2) {
2821 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
2822 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
2828 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
2831 * drm_add_display_info - pull display info out if present
2833 * @info: display info (attached to connector)
2835 * Grab any available display info and stuff it into the drm_display_info
2836 * structure that's part of the connector. Useful for tracking bpp and
2839 static void drm_add_display_info(struct edid *edid,
2840 struct drm_display_info *info)
2844 info->width_mm = edid->width_cm * 10;
2845 info->height_mm = edid->height_cm * 10;
2847 /* driver figures it out in this case */
2849 info->color_formats = 0;
2851 if (edid->revision < 3)
2854 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
2857 /* Get data from CEA blocks if present */
2858 edid_ext = drm_find_cea_extension(edid);
2860 info->cea_rev = edid_ext[1];
2862 /* The existence of a CEA block should imply RGB support */
2863 info->color_formats = DRM_COLOR_FORMAT_RGB444;
2864 if (edid_ext[3] & EDID_CEA_YCRCB444)
2865 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2866 if (edid_ext[3] & EDID_CEA_YCRCB422)
2867 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
2870 /* Only defined for 1.4 with digital displays */
2871 if (edid->revision < 4)
2874 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
2875 case DRM_EDID_DIGITAL_DEPTH_6:
2878 case DRM_EDID_DIGITAL_DEPTH_8:
2881 case DRM_EDID_DIGITAL_DEPTH_10:
2884 case DRM_EDID_DIGITAL_DEPTH_12:
2887 case DRM_EDID_DIGITAL_DEPTH_14:
2890 case DRM_EDID_DIGITAL_DEPTH_16:
2893 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
2899 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
2900 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
2901 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2902 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
2903 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
2907 * drm_add_edid_modes - add modes from EDID data, if available
2908 * @connector: connector we're probing
2911 * Add the specified modes to the connector's mode list.
2913 * Return number of modes added or 0 if we couldn't find any.
2915 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
2923 if (!drm_edid_is_valid(edid)) {
2924 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
2925 drm_get_connector_name(connector));
2929 quirks = edid_get_quirks(edid);
2932 * EDID spec says modes should be preferred in this order:
2933 * - preferred detailed mode
2934 * - other detailed modes from base block
2935 * - detailed modes from extension blocks
2936 * - CVT 3-byte code modes
2937 * - standard timing codes
2938 * - established timing codes
2939 * - modes inferred from GTF or CVT range information
2941 * We get this pretty much right.
2943 * XXX order for additional mode types in extension blocks?
2945 num_modes += add_detailed_modes(connector, edid, quirks);
2946 num_modes += add_cvt_modes(connector, edid);
2947 num_modes += add_standard_modes(connector, edid);
2948 num_modes += add_established_modes(connector, edid);
2949 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
2950 num_modes += add_inferred_modes(connector, edid);
2951 num_modes += add_cea_modes(connector, edid);
2953 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
2954 edid_fixup_preferred(connector, quirks);
2956 drm_add_display_info(edid, &connector->display_info);
2960 EXPORT_SYMBOL(drm_add_edid_modes);
2963 * drm_add_modes_noedid - add modes for the connectors without EDID
2964 * @connector: connector we're probing
2965 * @hdisplay: the horizontal display limit
2966 * @vdisplay: the vertical display limit
2968 * Add the specified modes to the connector's mode list. Only when the
2969 * hdisplay/vdisplay is not beyond the given limit, it will be added.
2971 * Return number of modes added or 0 if we couldn't find any.
2973 int drm_add_modes_noedid(struct drm_connector *connector,
2974 int hdisplay, int vdisplay)
2976 int i, count, num_modes = 0;
2977 struct drm_display_mode *mode;
2978 struct drm_device *dev = connector->dev;
2980 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
2986 for (i = 0; i < count; i++) {
2987 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
2988 if (hdisplay && vdisplay) {
2990 * Only when two are valid, they will be used to check
2991 * whether the mode should be added to the mode list of
2994 if (ptr->hdisplay > hdisplay ||
2995 ptr->vdisplay > vdisplay)
2998 if (drm_mode_vrefresh(ptr) > 61)
3000 mode = drm_mode_duplicate(dev, ptr);
3002 drm_mode_probed_add(connector, mode);
3008 EXPORT_SYMBOL(drm_add_modes_noedid);
3011 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3012 * data from a DRM display mode
3013 * @frame: HDMI AVI infoframe
3014 * @mode: DRM display mode
3016 * Returns 0 on success or a negative error code on failure.
3019 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
3020 const struct drm_display_mode *mode)
3024 if (!frame || !mode)
3027 err = hdmi_avi_infoframe_init(frame);
3031 frame->video_code = drm_match_cea_mode(mode);
3032 if (!frame->video_code)
3035 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
3036 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
3040 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);