2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
29 * the sale, use or other dealings in this Software without prior written
30 * authorization from the copyright holder(s) and author(s).
33 #include <linux/list.h>
34 #include <linux/list_sort.h>
35 #include <linux/export.h>
37 #include <drm/drm_crtc.h>
38 #include <video/of_videomode.h>
39 #include <video/videomode.h>
42 * drm_mode_debug_printmodeline - print a mode to dmesg
43 * @mode: mode to print
48 * Describe @mode using DRM_DEBUG.
50 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
52 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
54 mode->base.id, mode->name, mode->vrefresh, mode->clock,
55 mode->hdisplay, mode->hsync_start,
56 mode->hsync_end, mode->htotal,
57 mode->vdisplay, mode->vsync_start,
58 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
60 EXPORT_SYMBOL(drm_mode_debug_printmodeline);
63 * drm_cvt_mode -create a modeline based on CVT algorithm
65 * @hdisplay: hdisplay size
66 * @vdisplay: vdisplay size
67 * @vrefresh : vrefresh rate
68 * @reduced : Whether the GTF calculation is simplified
69 * @interlaced:Whether the interlace is supported
70 * @margins: whether to add margins or not
75 * return the modeline based on CVT algorithm
77 * This function is called to generate the modeline based on CVT algorithm
78 * according to the hdisplay, vdisplay, vrefresh.
79 * It is based from the VESA(TM) Coordinated Video Timing Generator by
80 * Graham Loveridge April 9, 2003 available at
81 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
83 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
84 * What I have done is to translate it by using integer calculation.
86 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
87 int vdisplay, int vrefresh,
88 bool reduced, bool interlaced, bool margins)
90 #define HV_FACTOR 1000
91 /* 1) top/bottom margin size (% of height) - default: 1.8, */
92 #define CVT_MARGIN_PERCENTAGE 18
93 /* 2) character cell horizontal granularity (pixels) - default 8 */
94 #define CVT_H_GRANULARITY 8
95 /* 3) Minimum vertical porch (lines) - default 3 */
96 #define CVT_MIN_V_PORCH 3
97 /* 4) Minimum number of vertical back porch lines - default 6 */
98 #define CVT_MIN_V_BPORCH 6
99 /* Pixel Clock step (kHz) */
100 #define CVT_CLOCK_STEP 250
101 struct drm_display_mode *drm_mode;
102 unsigned int vfieldrate, hperiod;
103 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
106 /* allocate the drm_display_mode structure. If failure, we will
109 drm_mode = drm_mode_create(dev);
113 /* the CVT default refresh rate is 60Hz */
117 /* the required field fresh rate */
119 vfieldrate = vrefresh * 2;
121 vfieldrate = vrefresh;
123 /* horizontal pixels */
124 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
126 /* determine the left&right borders */
129 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
130 hmargin -= hmargin % CVT_H_GRANULARITY;
132 /* find the total active pixels */
133 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
135 /* find the number of lines per field */
137 vdisplay_rnd = vdisplay / 2;
139 vdisplay_rnd = vdisplay;
141 /* find the top & bottom borders */
144 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
146 drm_mode->vdisplay = vdisplay + 2 * vmargin;
154 /* Determine VSync Width from aspect ratio */
155 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
157 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
159 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
161 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
163 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
169 /* simplify the GTF calculation */
170 /* 4) Minimum time of vertical sync + back porch interval (µs)
174 #define CVT_MIN_VSYNC_BP 550
175 /* 3) Nominal HSync width (% of line period) - default 8 */
176 #define CVT_HSYNC_PERCENTAGE 8
177 unsigned int hblank_percentage;
178 int vsyncandback_porch, vback_porch, hblank;
180 /* estimated the horizontal period */
181 tmp1 = HV_FACTOR * 1000000 -
182 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
183 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
185 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
187 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
188 /* 9. Find number of lines in sync + backporch */
189 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
190 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
192 vsyncandback_porch = tmp1;
193 /* 10. Find number of lines in back porch */
194 vback_porch = vsyncandback_porch - vsync;
195 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
196 vsyncandback_porch + CVT_MIN_V_PORCH;
197 /* 5) Definition of Horizontal blanking time limitation */
198 /* Gradient (%/kHz) - default 600 */
199 #define CVT_M_FACTOR 600
200 /* Offset (%) - default 40 */
201 #define CVT_C_FACTOR 40
202 /* Blanking time scaling factor - default 128 */
203 #define CVT_K_FACTOR 128
204 /* Scaling factor weighting - default 20 */
205 #define CVT_J_FACTOR 20
206 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
207 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
209 /* 12. Find ideal blanking duty cycle from formula */
210 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
212 /* 13. Blanking time */
213 if (hblank_percentage < 20 * HV_FACTOR)
214 hblank_percentage = 20 * HV_FACTOR;
215 hblank = drm_mode->hdisplay * hblank_percentage /
216 (100 * HV_FACTOR - hblank_percentage);
217 hblank -= hblank % (2 * CVT_H_GRANULARITY);
218 /* 14. find the total pixes per line */
219 drm_mode->htotal = drm_mode->hdisplay + hblank;
220 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
221 drm_mode->hsync_start = drm_mode->hsync_end -
222 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
223 drm_mode->hsync_start += CVT_H_GRANULARITY -
224 drm_mode->hsync_start % CVT_H_GRANULARITY;
225 /* fill the Vsync values */
226 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
227 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
229 /* Reduced blanking */
230 /* Minimum vertical blanking interval time (µs)- default 460 */
231 #define CVT_RB_MIN_VBLANK 460
232 /* Fixed number of clocks for horizontal sync */
233 #define CVT_RB_H_SYNC 32
234 /* Fixed number of clocks for horizontal blanking */
235 #define CVT_RB_H_BLANK 160
236 /* Fixed number of lines for vertical front porch - default 3*/
237 #define CVT_RB_VFPORCH 3
240 /* 8. Estimate Horizontal period. */
241 tmp1 = HV_FACTOR * 1000000 -
242 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
243 tmp2 = vdisplay_rnd + 2 * vmargin;
244 hperiod = tmp1 / (tmp2 * vfieldrate);
245 /* 9. Find number of lines in vertical blanking */
246 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
247 /* 10. Check if vertical blanking is sufficient */
248 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
249 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
250 /* 11. Find total number of lines in vertical field */
251 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
252 /* 12. Find total number of pixels in a line */
253 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
254 /* Fill in HSync values */
255 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
256 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
257 /* Fill in VSync values */
258 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
259 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
261 /* 15/13. Find pixel clock frequency (kHz for xf86) */
262 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
263 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
264 /* 18/16. Find actual vertical frame frequency */
265 /* ignore - just set the mode flag for interlaced */
267 drm_mode->vtotal *= 2;
268 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
270 /* Fill the mode line name */
271 drm_mode_set_name(drm_mode);
273 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
274 DRM_MODE_FLAG_NVSYNC);
276 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
277 DRM_MODE_FLAG_NHSYNC);
281 EXPORT_SYMBOL(drm_cvt_mode);
284 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
287 * @hdisplay :hdisplay size
288 * @vdisplay :vdisplay size
289 * @vrefresh :vrefresh rate.
290 * @interlaced :whether the interlace is supported
291 * @margins :desired margin size
292 * @GTF_M: extended GTF formula parameters
293 * @GTF_2C: extended GTF formula parameters
294 * @GTF_K: extended GTF formula parameters
295 * @GTF_2J: extended GTF formula parameters
300 * return the modeline based on full GTF algorithm.
302 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
303 * in here multiplied by two. For a C of 40, pass in 80.
305 struct drm_display_mode *
306 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
307 int vrefresh, bool interlaced, int margins,
308 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
309 { /* 1) top/bottom margin size (% of height) - default: 1.8, */
310 #define GTF_MARGIN_PERCENTAGE 18
311 /* 2) character cell horizontal granularity (pixels) - default 8 */
312 #define GTF_CELL_GRAN 8
313 /* 3) Minimum vertical porch (lines) - default 3 */
314 #define GTF_MIN_V_PORCH 1
315 /* width of vsync in lines */
317 /* width of hsync as % of total line */
318 #define H_SYNC_PERCENT 8
319 /* min time of vsync + back porch (microsec) */
320 #define MIN_VSYNC_PLUS_BP 550
321 /* C' and M' are part of the Blanking Duty Cycle computation */
322 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
323 #define GTF_M_PRIME (GTF_K * GTF_M / 256)
324 struct drm_display_mode *drm_mode;
325 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
326 int top_margin, bottom_margin;
328 unsigned int hfreq_est;
329 int vsync_plus_bp, vback_porch;
330 unsigned int vtotal_lines, vfieldrate_est, hperiod;
331 unsigned int vfield_rate, vframe_rate;
332 int left_margin, right_margin;
333 unsigned int total_active_pixels, ideal_duty_cycle;
334 unsigned int hblank, total_pixels, pixel_freq;
335 int hsync, hfront_porch, vodd_front_porch_lines;
336 unsigned int tmp1, tmp2;
338 drm_mode = drm_mode_create(dev);
342 /* 1. In order to give correct results, the number of horizontal
343 * pixels requested is first processed to ensure that it is divisible
344 * by the character size, by rounding it to the nearest character
347 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
348 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
350 /* 2. If interlace is requested, the number of vertical lines assumed
351 * by the calculation must be halved, as the computation calculates
352 * the number of vertical lines per field.
355 vdisplay_rnd = vdisplay / 2;
357 vdisplay_rnd = vdisplay;
359 /* 3. Find the frame rate required: */
361 vfieldrate_rqd = vrefresh * 2;
363 vfieldrate_rqd = vrefresh;
365 /* 4. Find number of lines in Top margin: */
368 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
370 /* 5. Find number of lines in bottom margin: */
371 bottom_margin = top_margin;
373 /* 6. If interlace is required, then set variable interlace: */
379 /* 7. Estimate the Horizontal frequency */
381 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
382 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
384 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
387 /* 8. Find the number of lines in V sync + back porch */
388 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
389 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
390 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
391 /* 9. Find the number of lines in V back porch alone: */
392 vback_porch = vsync_plus_bp - V_SYNC_RQD;
393 /* 10. Find the total number of lines in Vertical field period: */
394 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
395 vsync_plus_bp + GTF_MIN_V_PORCH;
396 /* 11. Estimate the Vertical field frequency: */
397 vfieldrate_est = hfreq_est / vtotal_lines;
398 /* 12. Find the actual horizontal period: */
399 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
401 /* 13. Find the actual Vertical field frequency: */
402 vfield_rate = hfreq_est / vtotal_lines;
403 /* 14. Find the Vertical frame frequency: */
405 vframe_rate = vfield_rate / 2;
407 vframe_rate = vfield_rate;
408 /* 15. Find number of pixels in left margin: */
410 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
415 /* 16.Find number of pixels in right margin: */
416 right_margin = left_margin;
417 /* 17.Find total number of active pixels in image and left and right */
418 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
419 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
420 ideal_duty_cycle = GTF_C_PRIME * 1000 -
421 (GTF_M_PRIME * 1000000 / hfreq_est);
422 /* 19.Find the number of pixels in the blanking time to the nearest
423 * double character cell: */
424 hblank = total_active_pixels * ideal_duty_cycle /
425 (100000 - ideal_duty_cycle);
426 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
427 hblank = hblank * 2 * GTF_CELL_GRAN;
428 /* 20.Find total number of pixels: */
429 total_pixels = total_active_pixels + hblank;
430 /* 21.Find pixel clock frequency: */
431 pixel_freq = total_pixels * hfreq_est / 1000;
432 /* Stage 1 computations are now complete; I should really pass
433 * the results to another function and do the Stage 2 computations,
434 * but I only need a few more values so I'll just append the
435 * computations here for now */
436 /* 17. Find the number of pixels in the horizontal sync period: */
437 hsync = H_SYNC_PERCENT * total_pixels / 100;
438 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
439 hsync = hsync * GTF_CELL_GRAN;
440 /* 18. Find the number of pixels in horizontal front porch period */
441 hfront_porch = hblank / 2 - hsync;
442 /* 36. Find the number of lines in the odd front porch period: */
443 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
445 /* finally, pack the results in the mode struct */
446 drm_mode->hdisplay = hdisplay_rnd;
447 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
448 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
449 drm_mode->htotal = total_pixels;
450 drm_mode->vdisplay = vdisplay_rnd;
451 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
452 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
453 drm_mode->vtotal = vtotal_lines;
455 drm_mode->clock = pixel_freq;
458 drm_mode->vtotal *= 2;
459 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
462 drm_mode_set_name(drm_mode);
463 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
464 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
466 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
470 EXPORT_SYMBOL(drm_gtf_mode_complex);
473 * drm_gtf_mode - create the modeline based on GTF algorithm
476 * @hdisplay :hdisplay size
477 * @vdisplay :vdisplay size
478 * @vrefresh :vrefresh rate.
479 * @interlaced :whether the interlace is supported
480 * @margins :whether the margin is supported
485 * return the modeline based on GTF algorithm
487 * This function is to create the modeline based on the GTF algorithm.
488 * Generalized Timing Formula is derived from:
489 * GTF Spreadsheet by Andy Morrish (1/5/97)
490 * available at http://www.vesa.org
492 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
493 * What I have done is to translate it by using integer calculation.
494 * I also refer to the function of fb_get_mode in the file of
495 * drivers/video/fbmon.c
497 * Standard GTF parameters:
503 struct drm_display_mode *
504 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
505 bool interlaced, int margins)
507 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh,
509 600, 40 * 2, 128, 20 * 2);
511 EXPORT_SYMBOL(drm_gtf_mode);
513 #ifdef CONFIG_VIDEOMODE_HELPERS
514 int drm_display_mode_from_videomode(const struct videomode *vm,
515 struct drm_display_mode *dmode)
517 dmode->hdisplay = vm->hactive;
518 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch;
519 dmode->hsync_end = dmode->hsync_start + vm->hsync_len;
520 dmode->htotal = dmode->hsync_end + vm->hback_porch;
522 dmode->vdisplay = vm->vactive;
523 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch;
524 dmode->vsync_end = dmode->vsync_start + vm->vsync_len;
525 dmode->vtotal = dmode->vsync_end + vm->vback_porch;
527 dmode->clock = vm->pixelclock / 1000;
530 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH)
531 dmode->flags |= DRM_MODE_FLAG_PHSYNC;
532 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
533 dmode->flags |= DRM_MODE_FLAG_NHSYNC;
534 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH)
535 dmode->flags |= DRM_MODE_FLAG_PVSYNC;
536 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
537 dmode->flags |= DRM_MODE_FLAG_NVSYNC;
538 if (vm->flags & DISPLAY_FLAGS_INTERLACED)
539 dmode->flags |= DRM_MODE_FLAG_INTERLACE;
540 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN)
541 dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
542 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
543 dmode->flags |= DRM_MODE_FLAG_DBLCLK;
544 drm_mode_set_name(dmode);
548 EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode);
552 * of_get_drm_display_mode - get a drm_display_mode from devicetree
553 * @np: device_node with the timing specification
554 * @dmode: will be set to the return value
555 * @index: index into the list of display timings in devicetree
557 * This function is expensive and should only be used, if only one mode is to be
558 * read from DT. To get multiple modes start with of_get_display_timings and
559 * work with that instead.
561 int of_get_drm_display_mode(struct device_node *np,
562 struct drm_display_mode *dmode, int index)
567 ret = of_get_videomode(np, &vm, index);
571 drm_display_mode_from_videomode(&vm, dmode);
573 pr_debug("%s: got %dx%d display mode from %s\n",
574 of_node_full_name(np), vm.hactive, vm.vactive, np->name);
575 drm_mode_debug_printmodeline(dmode);
579 EXPORT_SYMBOL_GPL(of_get_drm_display_mode);
580 #endif /* CONFIG_OF */
581 #endif /* CONFIG_VIDEOMODE_HELPERS */
584 * drm_mode_set_name - set the name on a mode
585 * @mode: name will be set in this mode
590 * Set the name of @mode to a standard format.
592 void drm_mode_set_name(struct drm_display_mode *mode)
594 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
596 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
597 mode->hdisplay, mode->vdisplay,
598 interlaced ? "i" : "");
600 EXPORT_SYMBOL(drm_mode_set_name);
603 * drm_mode_width - get the width of a mode
609 * Return @mode's width (hdisplay) value.
611 * FIXME: is this needed?
616 int drm_mode_width(const struct drm_display_mode *mode)
618 return mode->hdisplay;
621 EXPORT_SYMBOL(drm_mode_width);
624 * drm_mode_height - get the height of a mode
630 * Return @mode's height (vdisplay) value.
632 * FIXME: is this needed?
637 int drm_mode_height(const struct drm_display_mode *mode)
639 return mode->vdisplay;
641 EXPORT_SYMBOL(drm_mode_height);
643 /** drm_mode_hsync - get the hsync of a mode
649 * Return @modes's hsync rate in kHz, rounded to the nearest int.
651 int drm_mode_hsync(const struct drm_display_mode *mode)
653 unsigned int calc_val;
658 if (mode->htotal < 0)
661 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
662 calc_val += 500; /* round to 1000Hz */
663 calc_val /= 1000; /* truncate to kHz */
667 EXPORT_SYMBOL(drm_mode_hsync);
670 * drm_mode_vrefresh - get the vrefresh of a mode
676 * Return @mode's vrefresh rate in Hz or calculate it if necessary.
678 * FIXME: why is this needed? shouldn't vrefresh be set already?
681 * Vertical refresh rate. It will be the result of actual value plus 0.5.
682 * If it is 70.288, it will return 70Hz.
683 * If it is 59.6, it will return 60Hz.
685 int drm_mode_vrefresh(const struct drm_display_mode *mode)
688 unsigned int calc_val;
690 if (mode->vrefresh > 0)
691 refresh = mode->vrefresh;
692 else if (mode->htotal > 0 && mode->vtotal > 0) {
694 vtotal = mode->vtotal;
695 /* work out vrefresh the value will be x1000 */
696 calc_val = (mode->clock * 1000);
697 calc_val /= mode->htotal;
698 refresh = (calc_val + vtotal / 2) / vtotal;
700 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
702 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
705 refresh /= mode->vscan;
709 EXPORT_SYMBOL(drm_mode_vrefresh);
712 * drm_mode_set_crtcinfo - set CRTC modesetting parameters
714 * @adjust_flags: a combination of adjustment flags
719 * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
721 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
723 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
724 * buffers containing two eyes (only adjust the timings when needed, eg. for
725 * "frame packing" or "side by side full").
727 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
729 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
732 p->crtc_clock = p->clock;
733 p->crtc_hdisplay = p->hdisplay;
734 p->crtc_hsync_start = p->hsync_start;
735 p->crtc_hsync_end = p->hsync_end;
736 p->crtc_htotal = p->htotal;
737 p->crtc_hskew = p->hskew;
738 p->crtc_vdisplay = p->vdisplay;
739 p->crtc_vsync_start = p->vsync_start;
740 p->crtc_vsync_end = p->vsync_end;
741 p->crtc_vtotal = p->vtotal;
743 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
744 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
745 p->crtc_vdisplay /= 2;
746 p->crtc_vsync_start /= 2;
747 p->crtc_vsync_end /= 2;
752 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
753 p->crtc_vdisplay *= 2;
754 p->crtc_vsync_start *= 2;
755 p->crtc_vsync_end *= 2;
760 p->crtc_vdisplay *= p->vscan;
761 p->crtc_vsync_start *= p->vscan;
762 p->crtc_vsync_end *= p->vscan;
763 p->crtc_vtotal *= p->vscan;
766 if (adjust_flags & CRTC_STEREO_DOUBLE) {
767 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
770 case DRM_MODE_FLAG_3D_FRAME_PACKING:
772 p->crtc_vdisplay += p->crtc_vtotal;
773 p->crtc_vsync_start += p->crtc_vtotal;
774 p->crtc_vsync_end += p->crtc_vtotal;
775 p->crtc_vtotal += p->crtc_vtotal;
780 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
781 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
782 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
783 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
785 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
789 * drm_mode_copy - copy the mode
790 * @dst: mode to overwrite
796 * Copy an existing mode into another mode, preserving the object id and
797 * list head of the destination mode.
799 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
801 int id = dst->base.id;
802 struct list_head head = dst->head;
808 EXPORT_SYMBOL(drm_mode_copy);
811 * drm_mode_duplicate - allocate and duplicate an existing mode
812 * @dev: drm_device to allocate the duplicated mode for
813 * @mode: mode to duplicate
818 * Just allocate a new mode, copy the existing mode into it, and return
819 * a pointer to it. Used to create new instances of established modes.
821 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
822 const struct drm_display_mode *mode)
824 struct drm_display_mode *nmode;
826 nmode = drm_mode_create(dev);
830 drm_mode_copy(nmode, mode);
834 EXPORT_SYMBOL(drm_mode_duplicate);
837 * drm_mode_equal - test modes for equality
839 * @mode2: second mode
844 * Check to see if @mode1 and @mode2 are equivalent.
847 * True if the modes are equal, false otherwise.
849 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
851 /* do clock check convert to PICOS so fb modes get matched
853 if (mode1->clock && mode2->clock) {
854 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
856 } else if (mode1->clock != mode2->clock)
859 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) !=
860 (mode2->flags & DRM_MODE_FLAG_3D_MASK))
863 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
865 EXPORT_SYMBOL(drm_mode_equal);
868 * drm_mode_equal_no_clocks_no_stereo - test modes for equality
870 * @mode2: second mode
875 * Check to see if @mode1 and @mode2 are equivalent, but
876 * don't check the pixel clocks nor the stereo layout.
879 * True if the modes are equal, false otherwise.
881 bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
882 const struct drm_display_mode *mode2)
884 if (mode1->hdisplay == mode2->hdisplay &&
885 mode1->hsync_start == mode2->hsync_start &&
886 mode1->hsync_end == mode2->hsync_end &&
887 mode1->htotal == mode2->htotal &&
888 mode1->hskew == mode2->hskew &&
889 mode1->vdisplay == mode2->vdisplay &&
890 mode1->vsync_start == mode2->vsync_start &&
891 mode1->vsync_end == mode2->vsync_end &&
892 mode1->vtotal == mode2->vtotal &&
893 mode1->vscan == mode2->vscan &&
894 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) ==
895 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK))
900 EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo);
903 * drm_mode_validate_size - make sure modes adhere to size constraints
905 * @mode_list: list of modes to check
906 * @maxX: maximum width
907 * @maxY: maximum height
908 * @maxPitch: max pitch
911 * Caller must hold a lock protecting @mode_list.
913 * The DRM device (@dev) has size and pitch limits. Here we validate the
914 * modes we probed for @dev against those limits and set their status as
917 void drm_mode_validate_size(struct drm_device *dev,
918 struct list_head *mode_list,
919 int maxX, int maxY, int maxPitch)
921 struct drm_display_mode *mode;
923 list_for_each_entry(mode, mode_list, head) {
924 if (maxPitch > 0 && mode->hdisplay > maxPitch)
925 mode->status = MODE_BAD_WIDTH;
927 if (maxX > 0 && mode->hdisplay > maxX)
928 mode->status = MODE_VIRTUAL_X;
930 if (maxY > 0 && mode->vdisplay > maxY)
931 mode->status = MODE_VIRTUAL_Y;
934 EXPORT_SYMBOL(drm_mode_validate_size);
937 * drm_mode_prune_invalid - remove invalid modes from mode list
939 * @mode_list: list of modes to check
940 * @verbose: be verbose about it
943 * Caller must hold a lock protecting @mode_list.
945 * Once mode list generation is complete, a caller can use this routine to
946 * remove invalid modes from a mode list. If any of the modes have a
947 * status other than %MODE_OK, they are removed from @mode_list and freed.
949 void drm_mode_prune_invalid(struct drm_device *dev,
950 struct list_head *mode_list, bool verbose)
952 struct drm_display_mode *mode, *t;
954 list_for_each_entry_safe(mode, t, mode_list, head) {
955 if (mode->status != MODE_OK) {
956 list_del(&mode->head);
958 drm_mode_debug_printmodeline(mode);
959 DRM_DEBUG_KMS("Not using %s mode %d\n",
960 mode->name, mode->status);
962 drm_mode_destroy(dev, mode);
966 EXPORT_SYMBOL(drm_mode_prune_invalid);
969 * drm_mode_compare - compare modes for favorability
971 * @lh_a: list_head for first mode
972 * @lh_b: list_head for second mode
977 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
981 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
982 * positive if @lh_b is better than @lh_a.
984 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
986 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
987 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
990 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
991 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
994 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
998 diff = b->vrefresh - a->vrefresh;
1002 diff = b->clock - a->clock;
1007 * drm_mode_sort - sort mode list
1008 * @mode_list: list to sort
1011 * Caller must hold a lock protecting @mode_list.
1013 * Sort @mode_list by favorability, putting good modes first.
1015 void drm_mode_sort(struct list_head *mode_list)
1017 list_sort(NULL, mode_list, drm_mode_compare);
1019 EXPORT_SYMBOL(drm_mode_sort);
1022 * drm_mode_connector_list_update - update the mode list for the connector
1023 * @connector: the connector to update
1026 * Caller must hold a lock protecting @mode_list.
1028 * This moves the modes from the @connector probed_modes list
1029 * to the actual mode list. It compares the probed mode against the current
1030 * list and only adds different modes. All modes unverified after this point
1031 * will be removed by the prune invalid modes.
1033 void drm_mode_connector_list_update(struct drm_connector *connector)
1035 struct drm_display_mode *mode;
1036 struct drm_display_mode *pmode, *pt;
1039 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
1042 /* go through current modes checking for the new probed mode */
1043 list_for_each_entry(mode, &connector->modes, head) {
1044 if (drm_mode_equal(pmode, mode)) {
1046 /* if equal delete the probed mode */
1047 mode->status = pmode->status;
1048 /* Merge type bits together */
1049 mode->type |= pmode->type;
1050 list_del(&pmode->head);
1051 drm_mode_destroy(connector->dev, pmode);
1057 list_move_tail(&pmode->head, &connector->modes);
1061 EXPORT_SYMBOL(drm_mode_connector_list_update);
1064 * drm_mode_parse_command_line_for_connector - parse command line for connector
1065 * @mode_option: per connector mode option
1066 * @connector: connector to parse line for
1067 * @mode: preallocated mode structure to fill out
1069 * This parses the connector specific then generic command lines for
1070 * modes and options to configure the connector.
1072 * This uses the same parameters as the fb modedb.c, except for extra
1073 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1075 * enable/enable Digital/disable bit at the end
1077 bool drm_mode_parse_command_line_for_connector(const char *mode_option,
1078 struct drm_connector *connector,
1079 struct drm_cmdline_mode *mode)
1082 unsigned int namelen;
1083 bool res_specified = false, bpp_specified = false, refresh_specified = false;
1084 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
1085 bool yres_specified = false, cvt = false, rb = false;
1086 bool interlace = false, margins = false, was_digit = false;
1088 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1092 mode_option = fb_mode_option;
1096 mode->specified = false;
1101 namelen = strlen(name);
1102 for (i = namelen-1; i >= 0; i--) {
1105 if (!refresh_specified && !bpp_specified &&
1106 !yres_specified && !cvt && !rb && was_digit) {
1107 refresh = simple_strtol(&name[i+1], NULL, 10);
1108 refresh_specified = true;
1114 if (!bpp_specified && !yres_specified && !cvt &&
1116 bpp = simple_strtol(&name[i+1], NULL, 10);
1117 bpp_specified = true;
1123 if (!yres_specified && was_digit) {
1124 yres = simple_strtol(&name[i+1], NULL, 10);
1125 yres_specified = true;
1134 if (yres_specified || cvt || was_digit)
1139 if (yres_specified || cvt || rb || was_digit)
1144 if (cvt || yres_specified || was_digit)
1149 if (cvt || yres_specified || was_digit)
1154 if (yres_specified || bpp_specified || refresh_specified ||
1155 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1158 force = DRM_FORCE_ON;
1161 if (yres_specified || bpp_specified || refresh_specified ||
1162 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1165 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1166 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1167 force = DRM_FORCE_ON;
1169 force = DRM_FORCE_ON_DIGITAL;
1172 if (yres_specified || bpp_specified || refresh_specified ||
1173 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1176 force = DRM_FORCE_OFF;
1183 if (i < 0 && yres_specified) {
1185 xres = simple_strtol(name, &ch, 10);
1186 if ((ch != NULL) && (*ch == 'x'))
1187 res_specified = true;
1190 } else if (!yres_specified && was_digit) {
1191 /* catch mode that begins with digits but has no 'x' */
1197 "parse error at position %i in video mode '%s'\n",
1199 mode->specified = false;
1203 if (res_specified) {
1204 mode->specified = true;
1209 if (refresh_specified) {
1210 mode->refresh_specified = true;
1211 mode->refresh = refresh;
1214 if (bpp_specified) {
1215 mode->bpp_specified = true;
1220 mode->interlace = interlace;
1221 mode->margins = margins;
1222 mode->force = force;
1226 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1228 struct drm_display_mode *
1229 drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1230 struct drm_cmdline_mode *cmd)
1232 struct drm_display_mode *mode;
1235 mode = drm_cvt_mode(dev,
1236 cmd->xres, cmd->yres,
1237 cmd->refresh_specified ? cmd->refresh : 60,
1238 cmd->rb, cmd->interlace,
1241 mode = drm_gtf_mode(dev,
1242 cmd->xres, cmd->yres,
1243 cmd->refresh_specified ? cmd->refresh : 60,
1249 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1252 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);