2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
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13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
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30 * authorization from the copyright holder(s) and author(s).
33 #include <linux/list.h>
34 #include <linux/list_sort.h>
35 #include <linux/export.h>
37 #include <drm/drm_crtc.h>
38 #include <video/of_videomode.h>
39 #include <video/videomode.h>
40 #include <drm/drm_modes.h>
42 #include "drm_crtc_internal.h"
45 * drm_mode_debug_printmodeline - print a mode to dmesg
46 * @mode: mode to print
48 * Describe @mode using DRM_DEBUG.
50 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
52 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
54 mode->base.id, mode->name, mode->vrefresh, mode->clock,
55 mode->hdisplay, mode->hsync_start,
56 mode->hsync_end, mode->htotal,
57 mode->vdisplay, mode->vsync_start,
58 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
60 EXPORT_SYMBOL(drm_mode_debug_printmodeline);
63 * drm_mode_create - create a new display mode
66 * Create a new, cleared drm_display_mode with kzalloc, allocate an ID for it
70 * Pointer to new mode on success, NULL on error.
72 struct drm_display_mode *drm_mode_create(struct drm_device *dev)
74 struct drm_display_mode *nmode;
76 nmode = kzalloc(sizeof(struct drm_display_mode), GFP_KERNEL);
80 if (drm_mode_object_get(dev, &nmode->base, DRM_MODE_OBJECT_MODE)) {
87 EXPORT_SYMBOL(drm_mode_create);
90 * drm_mode_destroy - remove a mode
92 * @mode: mode to remove
94 * Release @mode's unique ID, then free it @mode structure itself using kfree.
96 void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode)
101 drm_mode_object_put(dev, &mode->base);
105 EXPORT_SYMBOL(drm_mode_destroy);
108 * drm_mode_probed_add - add a mode to a connector's probed_mode list
109 * @connector: connector the new mode
112 * Add @mode to @connector's probed_mode list for later use. This list should
113 * then in a second step get filtered and all the modes actually supported by
114 * the hardware moved to the @connector's modes list.
116 void drm_mode_probed_add(struct drm_connector *connector,
117 struct drm_display_mode *mode)
119 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
121 list_add_tail(&mode->head, &connector->probed_modes);
123 EXPORT_SYMBOL(drm_mode_probed_add);
126 * drm_cvt_mode -create a modeline based on the CVT algorithm
128 * @hdisplay: hdisplay size
129 * @vdisplay: vdisplay size
130 * @vrefresh: vrefresh rate
131 * @reduced: whether to use reduced blanking
132 * @interlaced: whether to compute an interlaced mode
133 * @margins: whether to add margins (borders)
135 * This function is called to generate the modeline based on CVT algorithm
136 * according to the hdisplay, vdisplay, vrefresh.
137 * It is based from the VESA(TM) Coordinated Video Timing Generator by
138 * Graham Loveridge April 9, 2003 available at
139 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
141 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
142 * What I have done is to translate it by using integer calculation.
145 * The modeline based on the CVT algorithm stored in a drm_display_mode object.
146 * The display mode object is allocated with drm_mode_create(). Returns NULL
147 * when no mode could be allocated.
149 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
150 int vdisplay, int vrefresh,
151 bool reduced, bool interlaced, bool margins)
153 #define HV_FACTOR 1000
154 /* 1) top/bottom margin size (% of height) - default: 1.8, */
155 #define CVT_MARGIN_PERCENTAGE 18
156 /* 2) character cell horizontal granularity (pixels) - default 8 */
157 #define CVT_H_GRANULARITY 8
158 /* 3) Minimum vertical porch (lines) - default 3 */
159 #define CVT_MIN_V_PORCH 3
160 /* 4) Minimum number of vertical back porch lines - default 6 */
161 #define CVT_MIN_V_BPORCH 6
162 /* Pixel Clock step (kHz) */
163 #define CVT_CLOCK_STEP 250
164 struct drm_display_mode *drm_mode;
165 unsigned int vfieldrate, hperiod;
166 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
169 /* allocate the drm_display_mode structure. If failure, we will
172 drm_mode = drm_mode_create(dev);
176 /* the CVT default refresh rate is 60Hz */
180 /* the required field fresh rate */
182 vfieldrate = vrefresh * 2;
184 vfieldrate = vrefresh;
186 /* horizontal pixels */
187 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
189 /* determine the left&right borders */
192 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
193 hmargin -= hmargin % CVT_H_GRANULARITY;
195 /* find the total active pixels */
196 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
198 /* find the number of lines per field */
200 vdisplay_rnd = vdisplay / 2;
202 vdisplay_rnd = vdisplay;
204 /* find the top & bottom borders */
207 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
209 drm_mode->vdisplay = vdisplay + 2 * vmargin;
217 /* Determine VSync Width from aspect ratio */
218 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
220 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
222 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
224 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
226 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
232 /* simplify the GTF calculation */
233 /* 4) Minimum time of vertical sync + back porch interval (µs)
237 #define CVT_MIN_VSYNC_BP 550
238 /* 3) Nominal HSync width (% of line period) - default 8 */
239 #define CVT_HSYNC_PERCENTAGE 8
240 unsigned int hblank_percentage;
241 int vsyncandback_porch, vback_porch, hblank;
243 /* estimated the horizontal period */
244 tmp1 = HV_FACTOR * 1000000 -
245 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
246 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
248 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
250 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
251 /* 9. Find number of lines in sync + backporch */
252 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
253 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
255 vsyncandback_porch = tmp1;
256 /* 10. Find number of lines in back porch */
257 vback_porch = vsyncandback_porch - vsync;
258 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
259 vsyncandback_porch + CVT_MIN_V_PORCH;
260 /* 5) Definition of Horizontal blanking time limitation */
261 /* Gradient (%/kHz) - default 600 */
262 #define CVT_M_FACTOR 600
263 /* Offset (%) - default 40 */
264 #define CVT_C_FACTOR 40
265 /* Blanking time scaling factor - default 128 */
266 #define CVT_K_FACTOR 128
267 /* Scaling factor weighting - default 20 */
268 #define CVT_J_FACTOR 20
269 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
270 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
272 /* 12. Find ideal blanking duty cycle from formula */
273 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
275 /* 13. Blanking time */
276 if (hblank_percentage < 20 * HV_FACTOR)
277 hblank_percentage = 20 * HV_FACTOR;
278 hblank = drm_mode->hdisplay * hblank_percentage /
279 (100 * HV_FACTOR - hblank_percentage);
280 hblank -= hblank % (2 * CVT_H_GRANULARITY);
281 /* 14. find the total pixes per line */
282 drm_mode->htotal = drm_mode->hdisplay + hblank;
283 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
284 drm_mode->hsync_start = drm_mode->hsync_end -
285 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
286 drm_mode->hsync_start += CVT_H_GRANULARITY -
287 drm_mode->hsync_start % CVT_H_GRANULARITY;
288 /* fill the Vsync values */
289 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
290 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
292 /* Reduced blanking */
293 /* Minimum vertical blanking interval time (µs)- default 460 */
294 #define CVT_RB_MIN_VBLANK 460
295 /* Fixed number of clocks for horizontal sync */
296 #define CVT_RB_H_SYNC 32
297 /* Fixed number of clocks for horizontal blanking */
298 #define CVT_RB_H_BLANK 160
299 /* Fixed number of lines for vertical front porch - default 3*/
300 #define CVT_RB_VFPORCH 3
303 /* 8. Estimate Horizontal period. */
304 tmp1 = HV_FACTOR * 1000000 -
305 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
306 tmp2 = vdisplay_rnd + 2 * vmargin;
307 hperiod = tmp1 / (tmp2 * vfieldrate);
308 /* 9. Find number of lines in vertical blanking */
309 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
310 /* 10. Check if vertical blanking is sufficient */
311 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
312 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
313 /* 11. Find total number of lines in vertical field */
314 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
315 /* 12. Find total number of pixels in a line */
316 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
317 /* Fill in HSync values */
318 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
319 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
320 /* Fill in VSync values */
321 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
322 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
324 /* 15/13. Find pixel clock frequency (kHz for xf86) */
325 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
326 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
327 /* 18/16. Find actual vertical frame frequency */
328 /* ignore - just set the mode flag for interlaced */
330 drm_mode->vtotal *= 2;
331 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
333 /* Fill the mode line name */
334 drm_mode_set_name(drm_mode);
336 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
337 DRM_MODE_FLAG_NVSYNC);
339 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
340 DRM_MODE_FLAG_NHSYNC);
344 EXPORT_SYMBOL(drm_cvt_mode);
347 * drm_gtf_mode_complex - create the modeline based on the full GTF algorithm
349 * @hdisplay: hdisplay size
350 * @vdisplay: vdisplay size
351 * @vrefresh: vrefresh rate.
352 * @interlaced: whether to compute an interlaced mode
353 * @margins: desired margin (borders) size
354 * @GTF_M: extended GTF formula parameters
355 * @GTF_2C: extended GTF formula parameters
356 * @GTF_K: extended GTF formula parameters
357 * @GTF_2J: extended GTF formula parameters
359 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
360 * in here multiplied by two. For a C of 40, pass in 80.
363 * The modeline based on the full GTF algorithm stored in a drm_display_mode object.
364 * The display mode object is allocated with drm_mode_create(). Returns NULL
365 * when no mode could be allocated.
367 struct drm_display_mode *
368 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
369 int vrefresh, bool interlaced, int margins,
370 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
371 { /* 1) top/bottom margin size (% of height) - default: 1.8, */
372 #define GTF_MARGIN_PERCENTAGE 18
373 /* 2) character cell horizontal granularity (pixels) - default 8 */
374 #define GTF_CELL_GRAN 8
375 /* 3) Minimum vertical porch (lines) - default 3 */
376 #define GTF_MIN_V_PORCH 1
377 /* width of vsync in lines */
379 /* width of hsync as % of total line */
380 #define H_SYNC_PERCENT 8
381 /* min time of vsync + back porch (microsec) */
382 #define MIN_VSYNC_PLUS_BP 550
383 /* C' and M' are part of the Blanking Duty Cycle computation */
384 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
385 #define GTF_M_PRIME (GTF_K * GTF_M / 256)
386 struct drm_display_mode *drm_mode;
387 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
388 int top_margin, bottom_margin;
390 unsigned int hfreq_est;
391 int vsync_plus_bp, vback_porch;
392 unsigned int vtotal_lines, vfieldrate_est, hperiod;
393 unsigned int vfield_rate, vframe_rate;
394 int left_margin, right_margin;
395 unsigned int total_active_pixels, ideal_duty_cycle;
396 unsigned int hblank, total_pixels, pixel_freq;
397 int hsync, hfront_porch, vodd_front_porch_lines;
398 unsigned int tmp1, tmp2;
400 drm_mode = drm_mode_create(dev);
404 /* 1. In order to give correct results, the number of horizontal
405 * pixels requested is first processed to ensure that it is divisible
406 * by the character size, by rounding it to the nearest character
409 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
410 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
412 /* 2. If interlace is requested, the number of vertical lines assumed
413 * by the calculation must be halved, as the computation calculates
414 * the number of vertical lines per field.
417 vdisplay_rnd = vdisplay / 2;
419 vdisplay_rnd = vdisplay;
421 /* 3. Find the frame rate required: */
423 vfieldrate_rqd = vrefresh * 2;
425 vfieldrate_rqd = vrefresh;
427 /* 4. Find number of lines in Top margin: */
430 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
432 /* 5. Find number of lines in bottom margin: */
433 bottom_margin = top_margin;
435 /* 6. If interlace is required, then set variable interlace: */
441 /* 7. Estimate the Horizontal frequency */
443 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
444 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
446 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
449 /* 8. Find the number of lines in V sync + back porch */
450 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
451 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
452 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
453 /* 9. Find the number of lines in V back porch alone: */
454 vback_porch = vsync_plus_bp - V_SYNC_RQD;
455 /* 10. Find the total number of lines in Vertical field period: */
456 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
457 vsync_plus_bp + GTF_MIN_V_PORCH;
458 /* 11. Estimate the Vertical field frequency: */
459 vfieldrate_est = hfreq_est / vtotal_lines;
460 /* 12. Find the actual horizontal period: */
461 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
463 /* 13. Find the actual Vertical field frequency: */
464 vfield_rate = hfreq_est / vtotal_lines;
465 /* 14. Find the Vertical frame frequency: */
467 vframe_rate = vfield_rate / 2;
469 vframe_rate = vfield_rate;
470 /* 15. Find number of pixels in left margin: */
472 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
477 /* 16.Find number of pixels in right margin: */
478 right_margin = left_margin;
479 /* 17.Find total number of active pixels in image and left and right */
480 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
481 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
482 ideal_duty_cycle = GTF_C_PRIME * 1000 -
483 (GTF_M_PRIME * 1000000 / hfreq_est);
484 /* 19.Find the number of pixels in the blanking time to the nearest
485 * double character cell: */
486 hblank = total_active_pixels * ideal_duty_cycle /
487 (100000 - ideal_duty_cycle);
488 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
489 hblank = hblank * 2 * GTF_CELL_GRAN;
490 /* 20.Find total number of pixels: */
491 total_pixels = total_active_pixels + hblank;
492 /* 21.Find pixel clock frequency: */
493 pixel_freq = total_pixels * hfreq_est / 1000;
494 /* Stage 1 computations are now complete; I should really pass
495 * the results to another function and do the Stage 2 computations,
496 * but I only need a few more values so I'll just append the
497 * computations here for now */
498 /* 17. Find the number of pixels in the horizontal sync period: */
499 hsync = H_SYNC_PERCENT * total_pixels / 100;
500 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
501 hsync = hsync * GTF_CELL_GRAN;
502 /* 18. Find the number of pixels in horizontal front porch period */
503 hfront_porch = hblank / 2 - hsync;
504 /* 36. Find the number of lines in the odd front porch period: */
505 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
507 /* finally, pack the results in the mode struct */
508 drm_mode->hdisplay = hdisplay_rnd;
509 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
510 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
511 drm_mode->htotal = total_pixels;
512 drm_mode->vdisplay = vdisplay_rnd;
513 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
514 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
515 drm_mode->vtotal = vtotal_lines;
517 drm_mode->clock = pixel_freq;
520 drm_mode->vtotal *= 2;
521 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
524 drm_mode_set_name(drm_mode);
525 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
526 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
528 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
532 EXPORT_SYMBOL(drm_gtf_mode_complex);
535 * drm_gtf_mode - create the modeline based on the GTF algorithm
537 * @hdisplay: hdisplay size
538 * @vdisplay: vdisplay size
539 * @vrefresh: vrefresh rate.
540 * @interlaced: whether to compute an interlaced mode
541 * @margins: desired margin (borders) size
543 * return the modeline based on GTF algorithm
545 * This function is to create the modeline based on the GTF algorithm.
546 * Generalized Timing Formula is derived from:
547 * GTF Spreadsheet by Andy Morrish (1/5/97)
548 * available at http://www.vesa.org
550 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
551 * What I have done is to translate it by using integer calculation.
552 * I also refer to the function of fb_get_mode in the file of
553 * drivers/video/fbmon.c
555 * Standard GTF parameters:
562 * The modeline based on the GTF algorithm stored in a drm_display_mode object.
563 * The display mode object is allocated with drm_mode_create(). Returns NULL
564 * when no mode could be allocated.
566 struct drm_display_mode *
567 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
568 bool interlaced, int margins)
570 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh,
572 600, 40 * 2, 128, 20 * 2);
574 EXPORT_SYMBOL(drm_gtf_mode);
576 #ifdef CONFIG_VIDEOMODE_HELPERS
578 * drm_display_mode_from_videomode - fill in @dmode using @vm,
579 * @vm: videomode structure to use as source
580 * @dmode: drm_display_mode structure to use as destination
582 * Fills out @dmode using the display mode specified in @vm.
584 void drm_display_mode_from_videomode(const struct videomode *vm,
585 struct drm_display_mode *dmode)
587 dmode->hdisplay = vm->hactive;
588 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch;
589 dmode->hsync_end = dmode->hsync_start + vm->hsync_len;
590 dmode->htotal = dmode->hsync_end + vm->hback_porch;
592 dmode->vdisplay = vm->vactive;
593 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch;
594 dmode->vsync_end = dmode->vsync_start + vm->vsync_len;
595 dmode->vtotal = dmode->vsync_end + vm->vback_porch;
597 dmode->clock = vm->pixelclock / 1000;
600 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH)
601 dmode->flags |= DRM_MODE_FLAG_PHSYNC;
602 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
603 dmode->flags |= DRM_MODE_FLAG_NHSYNC;
604 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH)
605 dmode->flags |= DRM_MODE_FLAG_PVSYNC;
606 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
607 dmode->flags |= DRM_MODE_FLAG_NVSYNC;
608 if (vm->flags & DISPLAY_FLAGS_INTERLACED)
609 dmode->flags |= DRM_MODE_FLAG_INTERLACE;
610 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN)
611 dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
612 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
613 dmode->flags |= DRM_MODE_FLAG_DBLCLK;
614 drm_mode_set_name(dmode);
616 EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode);
620 * of_get_drm_display_mode - get a drm_display_mode from devicetree
621 * @np: device_node with the timing specification
622 * @dmode: will be set to the return value
623 * @index: index into the list of display timings in devicetree
625 * This function is expensive and should only be used, if only one mode is to be
626 * read from DT. To get multiple modes start with of_get_display_timings and
627 * work with that instead.
630 * 0 on success, a negative errno code when no of videomode node was found.
632 int of_get_drm_display_mode(struct device_node *np,
633 struct drm_display_mode *dmode, int index)
638 ret = of_get_videomode(np, &vm, index);
642 drm_display_mode_from_videomode(&vm, dmode);
644 pr_debug("%s: got %dx%d display mode from %s\n",
645 of_node_full_name(np), vm.hactive, vm.vactive, np->name);
646 drm_mode_debug_printmodeline(dmode);
650 EXPORT_SYMBOL_GPL(of_get_drm_display_mode);
651 #endif /* CONFIG_OF */
652 #endif /* CONFIG_VIDEOMODE_HELPERS */
655 * drm_mode_set_name - set the name on a mode
656 * @mode: name will be set in this mode
658 * Set the name of @mode to a standard format which is <hdisplay>x<vdisplay>
659 * with an optional 'i' suffix for interlaced modes.
661 void drm_mode_set_name(struct drm_display_mode *mode)
663 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
665 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
666 mode->hdisplay, mode->vdisplay,
667 interlaced ? "i" : "");
669 EXPORT_SYMBOL(drm_mode_set_name);
671 /** drm_mode_hsync - get the hsync of a mode
675 * @modes's hsync rate in kHz, rounded to the nearest integer. Calculates the
676 * value first if it is not yet set.
678 int drm_mode_hsync(const struct drm_display_mode *mode)
680 unsigned int calc_val;
685 if (mode->htotal < 0)
688 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
689 calc_val += 500; /* round to 1000Hz */
690 calc_val /= 1000; /* truncate to kHz */
694 EXPORT_SYMBOL(drm_mode_hsync);
697 * drm_mode_vrefresh - get the vrefresh of a mode
701 * @modes's vrefresh rate in Hz, rounded to the nearest integer. Calculates the
702 * value first if it is not yet set.
704 int drm_mode_vrefresh(const struct drm_display_mode *mode)
707 unsigned int calc_val;
709 if (mode->vrefresh > 0)
710 refresh = mode->vrefresh;
711 else if (mode->htotal > 0 && mode->vtotal > 0) {
713 vtotal = mode->vtotal;
714 /* work out vrefresh the value will be x1000 */
715 calc_val = (mode->clock * 1000);
716 calc_val /= mode->htotal;
717 refresh = (calc_val + vtotal / 2) / vtotal;
719 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
721 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
724 refresh /= mode->vscan;
728 EXPORT_SYMBOL(drm_mode_vrefresh);
731 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
733 * @adjust_flags: a combination of adjustment flags
735 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
737 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
739 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
740 * buffers containing two eyes (only adjust the timings when needed, eg. for
741 * "frame packing" or "side by side full").
743 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
745 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
748 p->crtc_clock = p->clock;
749 p->crtc_hdisplay = p->hdisplay;
750 p->crtc_hsync_start = p->hsync_start;
751 p->crtc_hsync_end = p->hsync_end;
752 p->crtc_htotal = p->htotal;
753 p->crtc_hskew = p->hskew;
754 p->crtc_vdisplay = p->vdisplay;
755 p->crtc_vsync_start = p->vsync_start;
756 p->crtc_vsync_end = p->vsync_end;
757 p->crtc_vtotal = p->vtotal;
759 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
760 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
761 p->crtc_vdisplay /= 2;
762 p->crtc_vsync_start /= 2;
763 p->crtc_vsync_end /= 2;
768 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
769 p->crtc_vdisplay *= 2;
770 p->crtc_vsync_start *= 2;
771 p->crtc_vsync_end *= 2;
776 p->crtc_vdisplay *= p->vscan;
777 p->crtc_vsync_start *= p->vscan;
778 p->crtc_vsync_end *= p->vscan;
779 p->crtc_vtotal *= p->vscan;
782 if (adjust_flags & CRTC_STEREO_DOUBLE) {
783 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
786 case DRM_MODE_FLAG_3D_FRAME_PACKING:
788 p->crtc_vdisplay += p->crtc_vtotal;
789 p->crtc_vsync_start += p->crtc_vtotal;
790 p->crtc_vsync_end += p->crtc_vtotal;
791 p->crtc_vtotal += p->crtc_vtotal;
796 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
797 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
798 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
799 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
801 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
804 * drm_mode_copy - copy the mode
805 * @dst: mode to overwrite
808 * Copy an existing mode into another mode, preserving the object id and
809 * list head of the destination mode.
811 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
813 int id = dst->base.id;
814 struct list_head head = dst->head;
820 EXPORT_SYMBOL(drm_mode_copy);
823 * drm_mode_duplicate - allocate and duplicate an existing mode
824 * @dev: drm_device to allocate the duplicated mode for
825 * @mode: mode to duplicate
827 * Just allocate a new mode, copy the existing mode into it, and return
828 * a pointer to it. Used to create new instances of established modes.
831 * Pointer to duplicated mode on success, NULL on error.
833 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
834 const struct drm_display_mode *mode)
836 struct drm_display_mode *nmode;
838 nmode = drm_mode_create(dev);
842 drm_mode_copy(nmode, mode);
846 EXPORT_SYMBOL(drm_mode_duplicate);
849 * drm_mode_equal - test modes for equality
851 * @mode2: second mode
853 * Check to see if @mode1 and @mode2 are equivalent.
856 * True if the modes are equal, false otherwise.
858 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
860 /* do clock check convert to PICOS so fb modes get matched
862 if (mode1->clock && mode2->clock) {
863 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
865 } else if (mode1->clock != mode2->clock)
868 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) !=
869 (mode2->flags & DRM_MODE_FLAG_3D_MASK))
872 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
874 EXPORT_SYMBOL(drm_mode_equal);
877 * drm_mode_equal_no_clocks_no_stereo - test modes for equality
879 * @mode2: second mode
881 * Check to see if @mode1 and @mode2 are equivalent, but
882 * don't check the pixel clocks nor the stereo layout.
885 * True if the modes are equal, false otherwise.
887 bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
888 const struct drm_display_mode *mode2)
890 if (mode1->hdisplay == mode2->hdisplay &&
891 mode1->hsync_start == mode2->hsync_start &&
892 mode1->hsync_end == mode2->hsync_end &&
893 mode1->htotal == mode2->htotal &&
894 mode1->hskew == mode2->hskew &&
895 mode1->vdisplay == mode2->vdisplay &&
896 mode1->vsync_start == mode2->vsync_start &&
897 mode1->vsync_end == mode2->vsync_end &&
898 mode1->vtotal == mode2->vtotal &&
899 mode1->vscan == mode2->vscan &&
900 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) ==
901 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK))
906 EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo);
909 * drm_mode_validate_size - make sure modes adhere to size constraints
911 * @mode_list: list of modes to check
912 * @maxX: maximum width
913 * @maxY: maximum height
915 * This function is a helper which can be used to validate modes against size
916 * limitations of the DRM device/connector. If a mode is too big its status
917 * memeber is updated with the appropriate validation failure code. The list
918 * itself is not changed.
920 void drm_mode_validate_size(struct drm_device *dev,
921 struct list_head *mode_list,
924 struct drm_display_mode *mode;
926 list_for_each_entry(mode, mode_list, head) {
927 if (maxX > 0 && mode->hdisplay > maxX)
928 mode->status = MODE_VIRTUAL_X;
930 if (maxY > 0 && mode->vdisplay > maxY)
931 mode->status = MODE_VIRTUAL_Y;
934 EXPORT_SYMBOL(drm_mode_validate_size);
937 * drm_mode_prune_invalid - remove invalid modes from mode list
939 * @mode_list: list of modes to check
940 * @verbose: be verbose about it
942 * This helper function can be used to prune a display mode list after
943 * validation has been completed. All modes who's status is not MODE_OK will be
944 * removed from the list, and if @verbose the status code and mode name is also
947 void drm_mode_prune_invalid(struct drm_device *dev,
948 struct list_head *mode_list, bool verbose)
950 struct drm_display_mode *mode, *t;
952 list_for_each_entry_safe(mode, t, mode_list, head) {
953 if (mode->status != MODE_OK) {
954 list_del(&mode->head);
956 drm_mode_debug_printmodeline(mode);
957 DRM_DEBUG_KMS("Not using %s mode %d\n",
958 mode->name, mode->status);
960 drm_mode_destroy(dev, mode);
964 EXPORT_SYMBOL(drm_mode_prune_invalid);
967 * drm_mode_compare - compare modes for favorability
969 * @lh_a: list_head for first mode
970 * @lh_b: list_head for second mode
972 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
976 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
977 * positive if @lh_b is better than @lh_a.
979 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
981 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
982 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
985 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
986 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
989 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
993 diff = b->vrefresh - a->vrefresh;
997 diff = b->clock - a->clock;
1002 * drm_mode_sort - sort mode list
1003 * @mode_list: list of drm_display_mode structures to sort
1005 * Sort @mode_list by favorability, moving good modes to the head of the list.
1007 void drm_mode_sort(struct list_head *mode_list)
1009 list_sort(NULL, mode_list, drm_mode_compare);
1011 EXPORT_SYMBOL(drm_mode_sort);
1014 * drm_mode_connector_list_update - update the mode list for the connector
1015 * @connector: the connector to update
1017 * This moves the modes from the @connector probed_modes list
1018 * to the actual mode list. It compares the probed mode against the current
1019 * list and only adds different/new modes.
1021 * This is just a helper functions doesn't validate any modes itself and also
1022 * doesn't prune any invalid modes. Callers need to do that themselves.
1024 void drm_mode_connector_list_update(struct drm_connector *connector)
1026 struct drm_display_mode *mode;
1027 struct drm_display_mode *pmode, *pt;
1030 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
1032 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
1035 /* go through current modes checking for the new probed mode */
1036 list_for_each_entry(mode, &connector->modes, head) {
1037 if (drm_mode_equal(pmode, mode)) {
1039 /* if equal delete the probed mode */
1040 mode->status = pmode->status;
1041 /* Merge type bits together */
1042 mode->type |= pmode->type;
1043 list_del(&pmode->head);
1044 drm_mode_destroy(connector->dev, pmode);
1050 list_move_tail(&pmode->head, &connector->modes);
1054 EXPORT_SYMBOL(drm_mode_connector_list_update);
1057 * drm_mode_parse_command_line_for_connector - parse command line modeline for connector
1058 * @mode_option: optional per connector mode option
1059 * @connector: connector to parse modeline for
1060 * @mode: preallocated drm_cmdline_mode structure to fill out
1062 * This parses @mode_option command line modeline for modes and options to
1063 * configure the connector. If @mode_option is NULL the default command line
1064 * modeline in fb_mode_option will be parsed instead.
1066 * This uses the same parameters as the fb modedb.c, except for an extra
1067 * force-enable, force-enable-digital and force-disable bit at the end:
1069 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1071 * The intermediate drm_cmdline_mode structure is required to store additional
1072 * options from the command line modline like the force-enabel/disable flag.
1075 * True if a valid modeline has been parsed, false otherwise.
1077 bool drm_mode_parse_command_line_for_connector(const char *mode_option,
1078 struct drm_connector *connector,
1079 struct drm_cmdline_mode *mode)
1082 unsigned int namelen;
1083 bool res_specified = false, bpp_specified = false, refresh_specified = false;
1084 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
1085 bool yres_specified = false, cvt = false, rb = false;
1086 bool interlace = false, margins = false, was_digit = false;
1088 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1092 mode_option = fb_mode_option;
1096 mode->specified = false;
1101 namelen = strlen(name);
1102 for (i = namelen-1; i >= 0; i--) {
1105 if (!refresh_specified && !bpp_specified &&
1106 !yres_specified && !cvt && !rb && was_digit) {
1107 refresh = simple_strtol(&name[i+1], NULL, 10);
1108 refresh_specified = true;
1114 if (!bpp_specified && !yres_specified && !cvt &&
1116 bpp = simple_strtol(&name[i+1], NULL, 10);
1117 bpp_specified = true;
1123 if (!yres_specified && was_digit) {
1124 yres = simple_strtol(&name[i+1], NULL, 10);
1125 yres_specified = true;
1134 if (yres_specified || cvt || was_digit)
1139 if (yres_specified || cvt || rb || was_digit)
1144 if (cvt || yres_specified || was_digit)
1149 if (cvt || yres_specified || was_digit)
1154 if (yres_specified || bpp_specified || refresh_specified ||
1155 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1158 force = DRM_FORCE_ON;
1161 if (yres_specified || bpp_specified || refresh_specified ||
1162 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1165 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1166 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1167 force = DRM_FORCE_ON;
1169 force = DRM_FORCE_ON_DIGITAL;
1172 if (yres_specified || bpp_specified || refresh_specified ||
1173 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1176 force = DRM_FORCE_OFF;
1183 if (i < 0 && yres_specified) {
1185 xres = simple_strtol(name, &ch, 10);
1186 if ((ch != NULL) && (*ch == 'x'))
1187 res_specified = true;
1190 } else if (!yres_specified && was_digit) {
1191 /* catch mode that begins with digits but has no 'x' */
1197 "parse error at position %i in video mode '%s'\n",
1199 mode->specified = false;
1203 if (res_specified) {
1204 mode->specified = true;
1209 if (refresh_specified) {
1210 mode->refresh_specified = true;
1211 mode->refresh = refresh;
1214 if (bpp_specified) {
1215 mode->bpp_specified = true;
1220 mode->interlace = interlace;
1221 mode->margins = margins;
1222 mode->force = force;
1226 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1229 * drm_mode_create_from_cmdline_mode - convert a command line modeline into a DRM display mode
1230 * @dev: DRM device to create the new mode for
1231 * @cmd: input command line modeline
1234 * Pointer to converted mode on success, NULL on error.
1236 struct drm_display_mode *
1237 drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1238 struct drm_cmdline_mode *cmd)
1240 struct drm_display_mode *mode;
1243 mode = drm_cvt_mode(dev,
1244 cmd->xres, cmd->yres,
1245 cmd->refresh_specified ? cmd->refresh : 60,
1246 cmd->rb, cmd->interlace,
1249 mode = drm_gtf_mode(dev,
1250 cmd->xres, cmd->yres,
1251 cmd->refresh_specified ? cmd->refresh : 60,
1257 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1260 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);