drivers/gpu/drm/exynos/exynos_drm_fimd.c

   1 /* exynos_drm_fimd.c
   2  *
   3  * Copyright (C) 2011 Samsung Electronics Co.Ltd
   4  * Authors:
   5  *      Joonyoung Shim <jy0922.shim@samsung.com>
   6  *      Inki Dae <inki.dae@samsung.com>
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  */
  14 #include <drm/drmP.h>
  15
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/clk.h>
  20 #include <linux/pm_runtime.h>
  21
  22 #include <video/samsung_fimd.h>
  23 #include <drm/exynos_drm.h>
  24
  25 #include "exynos_drm_drv.h"
  26 #include "exynos_drm_fbdev.h"
  27 #include "exynos_drm_crtc.h"
  28 #include "exynos_drm_iommu.h"
  29
  30 /*
  31  * FIMD is stand for Fully Interactive Mobile Display and
  32  * as a display controller, it transfers contents drawn on memory
  33  * to a LCD Panel through Display Interfaces such as RGB or
  34  * CPU Interface.
  35  */
  36
  37 /* position control register for hardware window 0, 2 ~ 4.*/
  38 #define VIDOSD_A(win)           (VIDOSD_BASE + 0x00 + (win) * 16)
  39 #define VIDOSD_B(win)           (VIDOSD_BASE + 0x04 + (win) * 16)
  40 /* size control register for hardware window 0. */
  41 #define VIDOSD_C_SIZE_W0        (VIDOSD_BASE + 0x08)
  42 /* alpha control register for hardware window 1 ~ 4. */
  43 #define VIDOSD_C(win)           (VIDOSD_BASE + 0x18 + (win) * 16)
  44 /* size control register for hardware window 1 ~ 4. */
  45 #define VIDOSD_D(win)           (VIDOSD_BASE + 0x0C + (win) * 16)
  46
  47 #define VIDWx_BUF_START(win, buf)       (VIDW_BUF_START(buf) + (win) * 8)
  48 #define VIDWx_BUF_END(win, buf)         (VIDW_BUF_END(buf) + (win) * 8)
  49 #define VIDWx_BUF_SIZE(win, buf)        (VIDW_BUF_SIZE(buf) + (win) * 4)
  50
  51 /* color key control register for hardware window 1 ~ 4. */
  52 #define WKEYCON0_BASE(x)                ((WKEYCON0 + 0x140) + (x * 8))
  53 /* color key value register for hardware window 1 ~ 4. */
  54 #define WKEYCON1_BASE(x)                ((WKEYCON1 + 0x140) + (x * 8))
  55
  56 /* FIMD has totally five hardware windows. */
  57 #define WINDOWS_NR      5
  58
  59 #define get_fimd_context(dev)   platform_get_drvdata(to_platform_device(dev))
  60
  61 struct fimd_driver_data {
  62         unsigned int timing_base;
  63 };
  64
  65 static struct fimd_driver_data exynos4_fimd_driver_data = {
  66         .timing_base = 0x0,
  67 };
  68
  69 static struct fimd_driver_data exynos5_fimd_driver_data = {
  70         .timing_base = 0x20000,
  71 };
  72
  73 struct fimd_win_data {
  74         unsigned int            offset_x;
  75         unsigned int            offset_y;
  76         unsigned int            ovl_width;
  77         unsigned int            ovl_height;
  78         unsigned int            fb_width;
  79         unsigned int            fb_height;
  80         unsigned int            bpp;
  81         dma_addr_t              dma_addr;
  82         void __iomem            *vaddr;
  83         unsigned int            buf_offsize;
  84         unsigned int            line_size;      /* bytes */
  85         bool                    enabled;
  86 };
  87
  88 struct fimd_context {
  89         struct exynos_drm_subdrv        subdrv;
  90         int                             irq;
  91         struct drm_crtc                 *crtc;
  92         struct clk                      *bus_clk;
  93         struct clk                      *lcd_clk;
  94         void __iomem                    *regs;
  95         struct fimd_win_data            win_data[WINDOWS_NR];
  96         unsigned int                    clkdiv;
  97         unsigned int                    default_win;
  98         unsigned long                   irq_flags;
  99         u32                             vidcon0;
 100         u32                             vidcon1;
 101         bool                            suspended;
 102         struct mutex                    lock;
 103         wait_queue_head_t               wait_vsync_queue;
 104         atomic_t                        wait_vsync_event;
 105
 106         struct exynos_drm_panel_info *panel;
 107 };
 108
 109 static inline struct fimd_driver_data *drm_fimd_get_driver_data(
 110         struct platform_device *pdev)
 111 {
 112         return (struct fimd_driver_data *)
 113                 platform_get_device_id(pdev)->driver_data;
 114 }
 115
 116 static bool fimd_display_is_connected(struct device *dev)
 117 {
 118         DRM_DEBUG_KMS("%s\n", __FILE__);
 119
 120         /* TODO. */
 121
 122         return true;
 123 }
 124
 125 static void *fimd_get_panel(struct device *dev)
 126 {
 127         struct fimd_context *ctx = get_fimd_context(dev);
 128
 129         DRM_DEBUG_KMS("%s\n", __FILE__);
 130
 131         return ctx->panel;
 132 }
 133
 134 static int fimd_check_timing(struct device *dev, void *timing)
 135 {
 136         DRM_DEBUG_KMS("%s\n", __FILE__);
 137
 138         /* TODO. */
 139
 140         return 0;
 141 }
 142
 143 static int fimd_display_power_on(struct device *dev, int mode)
 144 {
 145         DRM_DEBUG_KMS("%s\n", __FILE__);
 146
 147         /* TODO */
 148
 149         return 0;
 150 }
 151
 152 static struct exynos_drm_display_ops fimd_display_ops = {
 153         .type = EXYNOS_DISPLAY_TYPE_LCD,
 154         .is_connected = fimd_display_is_connected,
 155         .get_panel = fimd_get_panel,
 156         .check_timing = fimd_check_timing,
 157         .power_on = fimd_display_power_on,
 158 };
 159
 160 static void fimd_dpms(struct device *subdrv_dev, int mode)
 161 {
 162         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 163
 164         DRM_DEBUG_KMS("%s, %d\n", __FILE__, mode);
 165
 166         mutex_lock(&ctx->lock);
 167
 168         switch (mode) {
 169         case DRM_MODE_DPMS_ON:
 170                 /*
 171                  * enable fimd hardware only if suspended status.
 172                  *
 173                  * P.S. fimd_dpms function would be called at booting time so
 174                  * clk_enable could be called double time.
 175                  */
 176                 if (ctx->suspended)
 177                         pm_runtime_get_sync(subdrv_dev);
 178                 break;
 179         case DRM_MODE_DPMS_STANDBY:
 180         case DRM_MODE_DPMS_SUSPEND:
 181         case DRM_MODE_DPMS_OFF:
 182                 if (!ctx->suspended)
 183                         pm_runtime_put_sync(subdrv_dev);
 184                 break;
 185         default:
 186                 DRM_DEBUG_KMS("unspecified mode %d\n", mode);
 187                 break;
 188         }
 189
 190         mutex_unlock(&ctx->lock);
 191 }
 192
 193 static void fimd_apply(struct device *subdrv_dev)
 194 {
 195         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 196         struct exynos_drm_manager *mgr = ctx->subdrv.manager;
 197         struct exynos_drm_manager_ops *mgr_ops = mgr->ops;
 198         struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops;
 199         struct fimd_win_data *win_data;
 200         int i;
 201
 202         DRM_DEBUG_KMS("%s\n", __FILE__);
 203
 204         for (i = 0; i < WINDOWS_NR; i++) {
 205                 win_data = &ctx->win_data[i];
 206                 if (win_data->enabled && (ovl_ops && ovl_ops->commit))
 207                         ovl_ops->commit(subdrv_dev, i);
 208         }
 209
 210         if (mgr_ops && mgr_ops->commit)
 211                 mgr_ops->commit(subdrv_dev);
 212 }
 213
 214 static void fimd_commit(struct device *dev)
 215 {
 216         struct fimd_context *ctx = get_fimd_context(dev);
 217         struct exynos_drm_panel_info *panel = ctx->panel;
 218         struct fb_videomode *timing = &panel->timing;
 219         struct fimd_driver_data *driver_data;
 220         struct platform_device *pdev = to_platform_device(dev);
 221         u32 val;
 222
 223         driver_data = drm_fimd_get_driver_data(pdev);
 224         if (ctx->suspended)
 225                 return;
 226
 227         DRM_DEBUG_KMS("%s\n", __FILE__);
 228
 229         /* setup polarity values from machine code. */
 230         writel(ctx->vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);
 231
 232         /* setup vertical timing values. */
 233         val = VIDTCON0_VBPD(timing->upper_margin - 1) |
 234                VIDTCON0_VFPD(timing->lower_margin - 1) |
 235                VIDTCON0_VSPW(timing->vsync_len - 1);
 236         writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);
 237
 238         /* setup horizontal timing values.  */
 239         val = VIDTCON1_HBPD(timing->left_margin - 1) |
 240                VIDTCON1_HFPD(timing->right_margin - 1) |
 241                VIDTCON1_HSPW(timing->hsync_len - 1);
 242         writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);
 243
 244         /* setup horizontal and vertical display size. */
 245         val = VIDTCON2_LINEVAL(timing->yres - 1) |
 246                VIDTCON2_HOZVAL(timing->xres - 1);
 247         writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
 248
 249         /* setup clock source, clock divider, enable dma. */
 250         val = ctx->vidcon0;
 251         val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
 252
 253         if (ctx->clkdiv > 1)
 254                 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR;
 255         else
 256                 val &= ~VIDCON0_CLKDIR; /* 1:1 clock */
 257
 258         /*
 259          * fields of register with prefix '_F' would be updated
 260          * at vsync(same as dma start)
 261          */
 262         val |= VIDCON0_ENVID | VIDCON0_ENVID_F;
 263         writel(val, ctx->regs + VIDCON0);
 264 }
 265
 266 static int fimd_enable_vblank(struct device *dev)
 267 {
 268         struct fimd_context *ctx = get_fimd_context(dev);
 269         u32 val;
 270
 271         DRM_DEBUG_KMS("%s\n", __FILE__);
 272
 273         if (ctx->suspended)
 274                 return -EPERM;
 275
 276         if (!test_and_set_bit(0, &ctx->irq_flags)) {
 277                 val = readl(ctx->regs + VIDINTCON0);
 278
 279                 val |= VIDINTCON0_INT_ENABLE;
 280                 val |= VIDINTCON0_INT_FRAME;
 281
 282                 val &= ~VIDINTCON0_FRAMESEL0_MASK;
 283                 val |= VIDINTCON0_FRAMESEL0_VSYNC;
 284                 val &= ~VIDINTCON0_FRAMESEL1_MASK;
 285                 val |= VIDINTCON0_FRAMESEL1_NONE;
 286
 287                 writel(val, ctx->regs + VIDINTCON0);
 288         }
 289
 290         return 0;
 291 }
 292
 293 static void fimd_disable_vblank(struct device *dev)
 294 {
 295         struct fimd_context *ctx = get_fimd_context(dev);
 296         u32 val;
 297
 298         DRM_DEBUG_KMS("%s\n", __FILE__);
 299
 300         if (ctx->suspended)
 301                 return;
 302
 303         if (test_and_clear_bit(0, &ctx->irq_flags)) {
 304                 val = readl(ctx->regs + VIDINTCON0);
 305
 306                 val &= ~VIDINTCON0_INT_FRAME;
 307                 val &= ~VIDINTCON0_INT_ENABLE;
 308
 309                 writel(val, ctx->regs + VIDINTCON0);
 310         }
 311 }
 312
 313 static void fimd_wait_for_vblank(struct device *dev)
 314 {
 315         struct fimd_context *ctx = get_fimd_context(dev);
 316
 317         if (ctx->suspended)
 318                 return;
 319
 320         atomic_set(&ctx->wait_vsync_event, 1);
 321
 322         /*
 323          * wait for FIMD to signal VSYNC interrupt or return after
 324          * timeout which is set to 50ms (refresh rate of 20).
 325          */
 326         if (!wait_event_timeout(ctx->wait_vsync_queue,
 327                                 !atomic_read(&ctx->wait_vsync_event),
 328                                 DRM_HZ/20))
 329                 DRM_DEBUG_KMS("vblank wait timed out.\n");
 330 }
 331
 332 static struct exynos_drm_manager_ops fimd_manager_ops = {
 333         .dpms = fimd_dpms,
 334         .apply = fimd_apply,
 335         .commit = fimd_commit,
 336         .enable_vblank = fimd_enable_vblank,
 337         .disable_vblank = fimd_disable_vblank,
 338         .wait_for_vblank = fimd_wait_for_vblank,
 339 };
 340
 341 static void fimd_win_mode_set(struct device *dev,
 342                               struct exynos_drm_overlay *overlay)
 343 {
 344         struct fimd_context *ctx = get_fimd_context(dev);
 345         struct fimd_win_data *win_data;
 346         int win;
 347         unsigned long offset;
 348
 349         DRM_DEBUG_KMS("%s\n", __FILE__);
 350
 351         if (!overlay) {
 352                 dev_err(dev, "overlay is NULL\n");
 353                 return;
 354         }
 355
 356         win = overlay->zpos;
 357         if (win == DEFAULT_ZPOS)
 358                 win = ctx->default_win;
 359
 360         if (win < 0 || win > WINDOWS_NR)
 361                 return;
 362
 363         offset = overlay->fb_x * (overlay->bpp >> 3);
 364         offset += overlay->fb_y * overlay->pitch;
 365
 366         DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch);
 367
 368         win_data = &ctx->win_data[win];
 369
 370         win_data->offset_x = overlay->crtc_x;
 371         win_data->offset_y = overlay->crtc_y;
 372         win_data->ovl_width = overlay->crtc_width;
 373         win_data->ovl_height = overlay->crtc_height;
 374         win_data->fb_width = overlay->fb_width;
 375         win_data->fb_height = overlay->fb_height;
 376         win_data->dma_addr = overlay->dma_addr[0] + offset;
 377         win_data->vaddr = overlay->vaddr[0] + offset;
 378         win_data->bpp = overlay->bpp;
 379         win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) *
 380                                 (overlay->bpp >> 3);
 381         win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3);
 382
 383         DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n",
 384                         win_data->offset_x, win_data->offset_y);
 385         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 386                         win_data->ovl_width, win_data->ovl_height);
 387         DRM_DEBUG_KMS("paddr = 0x%lx, vaddr = 0x%lx\n",
 388                         (unsigned long)win_data->dma_addr,
 389                         (unsigned long)win_data->vaddr);
 390         DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n",
 391                         overlay->fb_width, overlay->crtc_width);
 392 }
 393
 394 static void fimd_win_set_pixfmt(struct device *dev, unsigned int win)
 395 {
 396         struct fimd_context *ctx = get_fimd_context(dev);
 397         struct fimd_win_data *win_data = &ctx->win_data[win];
 398         unsigned long val;
 399
 400         DRM_DEBUG_KMS("%s\n", __FILE__);
 401
 402         val = WINCONx_ENWIN;
 403
 404         switch (win_data->bpp) {
 405         case 1:
 406                 val |= WINCON0_BPPMODE_1BPP;
 407                 val |= WINCONx_BITSWP;
 408                 val |= WINCONx_BURSTLEN_4WORD;
 409                 break;
 410         case 2:
 411                 val |= WINCON0_BPPMODE_2BPP;
 412                 val |= WINCONx_BITSWP;
 413                 val |= WINCONx_BURSTLEN_8WORD;
 414                 break;
 415         case 4:
 416                 val |= WINCON0_BPPMODE_4BPP;
 417                 val |= WINCONx_BITSWP;
 418                 val |= WINCONx_BURSTLEN_8WORD;
 419                 break;
 420         case 8:
 421                 val |= WINCON0_BPPMODE_8BPP_PALETTE;
 422                 val |= WINCONx_BURSTLEN_8WORD;
 423                 val |= WINCONx_BYTSWP;
 424                 break;
 425         case 16:
 426                 val |= WINCON0_BPPMODE_16BPP_565;
 427                 val |= WINCONx_HAWSWP;
 428                 val |= WINCONx_BURSTLEN_16WORD;
 429                 break;
 430         case 24:
 431                 val |= WINCON0_BPPMODE_24BPP_888;
 432                 val |= WINCONx_WSWP;
 433                 val |= WINCONx_BURSTLEN_16WORD;
 434                 break;
 435         case 32:
 436                 val |= WINCON1_BPPMODE_28BPP_A4888
 437                         | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
 438                 val |= WINCONx_WSWP;
 439                 val |= WINCONx_BURSTLEN_16WORD;
 440                 break;
 441         default:
 442                 DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n");
 443
 444                 val |= WINCON0_BPPMODE_24BPP_888;
 445                 val |= WINCONx_WSWP;
 446                 val |= WINCONx_BURSTLEN_16WORD;
 447                 break;
 448         }
 449
 450         DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp);
 451
 452         writel(val, ctx->regs + WINCON(win));
 453 }
 454
 455 static void fimd_win_set_colkey(struct device *dev, unsigned int win)
 456 {
 457         struct fimd_context *ctx = get_fimd_context(dev);
 458         unsigned int keycon0 = 0, keycon1 = 0;
 459
 460         DRM_DEBUG_KMS("%s\n", __FILE__);
 461
 462         keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F |
 463                         WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
 464
 465         keycon1 = WxKEYCON1_COLVAL(0xffffffff);
 466
 467         writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
 468         writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
 469 }
 470
 471 static void fimd_win_commit(struct device *dev, int zpos)
 472 {
 473         struct fimd_context *ctx = get_fimd_context(dev);
 474         struct fimd_win_data *win_data;
 475         int win = zpos;
 476         unsigned long val, alpha, size;
 477
 478         DRM_DEBUG_KMS("%s\n", __FILE__);
 479
 480         if (ctx->suspended)
 481                 return;
 482
 483         if (win == DEFAULT_ZPOS)
 484                 win = ctx->default_win;
 485
 486         if (win < 0 || win > WINDOWS_NR)
 487                 return;
 488
 489         win_data = &ctx->win_data[win];
 490
 491         /*
 492          * SHADOWCON register is used for enabling timing.
 493          *
 494          * for example, once only width value of a register is set,
 495          * if the dma is started then fimd hardware could malfunction so
 496          * with protect window setting, the register fields with prefix '_F'
 497          * wouldn't be updated at vsync also but updated once unprotect window
 498          * is set.
 499          */
 500
 501         /* protect windows */
 502         val = readl(ctx->regs + SHADOWCON);
 503         val |= SHADOWCON_WINx_PROTECT(win);
 504         writel(val, ctx->regs + SHADOWCON);
 505
 506         /* buffer start address */
 507         val = (unsigned long)win_data->dma_addr;
 508         writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
 509
 510         /* buffer end address */
 511         size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3);
 512         val = (unsigned long)(win_data->dma_addr + size);
 513         writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
 514
 515         DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n",
 516                         (unsigned long)win_data->dma_addr, val, size);
 517         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 518                         win_data->ovl_width, win_data->ovl_height);
 519
 520         /* buffer size */
 521         val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) |
 522                 VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size);
 523         writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
 524
 525         /* OSD position */
 526         val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) |
 527                 VIDOSDxA_TOPLEFT_Y(win_data->offset_y);
 528         writel(val, ctx->regs + VIDOSD_A(win));
 529
 530         val = VIDOSDxB_BOTRIGHT_X(win_data->offset_x +
 531                                         win_data->ovl_width - 1) |
 532                 VIDOSDxB_BOTRIGHT_Y(win_data->offset_y +
 533                                         win_data->ovl_height - 1);
 534         writel(val, ctx->regs + VIDOSD_B(win));
 535
 536         DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
 537                         win_data->offset_x, win_data->offset_y,
 538                         win_data->offset_x + win_data->ovl_width - 1,
 539                         win_data->offset_y + win_data->ovl_height - 1);
 540
 541         /* hardware window 0 doesn't support alpha channel. */
 542         if (win != 0) {
 543                 /* OSD alpha */
 544                 alpha = VIDISD14C_ALPHA1_R(0xf) |
 545                         VIDISD14C_ALPHA1_G(0xf) |
 546                         VIDISD14C_ALPHA1_B(0xf);
 547
 548                 writel(alpha, ctx->regs + VIDOSD_C(win));
 549         }
 550
 551         /* OSD size */
 552         if (win != 3 && win != 4) {
 553                 u32 offset = VIDOSD_D(win);
 554                 if (win == 0)
 555                         offset = VIDOSD_C_SIZE_W0;
 556                 val = win_data->ovl_width * win_data->ovl_height;
 557                 writel(val, ctx->regs + offset);
 558
 559                 DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
 560         }
 561
 562         fimd_win_set_pixfmt(dev, win);
 563
 564         /* hardware window 0 doesn't support color key. */
 565         if (win != 0)
 566                 fimd_win_set_colkey(dev, win);
 567
 568         /* wincon */
 569         val = readl(ctx->regs + WINCON(win));
 570         val |= WINCONx_ENWIN;
 571         writel(val, ctx->regs + WINCON(win));
 572
 573         /* Enable DMA channel and unprotect windows */
 574         val = readl(ctx->regs + SHADOWCON);
 575         val |= SHADOWCON_CHx_ENABLE(win);
 576         val &= ~SHADOWCON_WINx_PROTECT(win);
 577         writel(val, ctx->regs + SHADOWCON);
 578
 579         win_data->enabled = true;
 580 }
 581
 582 static void fimd_win_disable(struct device *dev, int zpos)
 583 {
 584         struct fimd_context *ctx = get_fimd_context(dev);
 585         struct fimd_win_data *win_data;
 586         int win = zpos;
 587         u32 val;
 588
 589         DRM_DEBUG_KMS("%s\n", __FILE__);
 590
 591         if (win == DEFAULT_ZPOS)
 592                 win = ctx->default_win;
 593
 594         if (win < 0 || win > WINDOWS_NR)
 595                 return;
 596
 597         win_data = &ctx->win_data[win];
 598
 599         /* protect windows */
 600         val = readl(ctx->regs + SHADOWCON);
 601         val |= SHADOWCON_WINx_PROTECT(win);
 602         writel(val, ctx->regs + SHADOWCON);
 603
 604         /* wincon */
 605         val = readl(ctx->regs + WINCON(win));
 606         val &= ~WINCONx_ENWIN;
 607         writel(val, ctx->regs + WINCON(win));
 608
 609         /* unprotect windows */
 610         val = readl(ctx->regs + SHADOWCON);
 611         val &= ~SHADOWCON_CHx_ENABLE(win);
 612         val &= ~SHADOWCON_WINx_PROTECT(win);
 613         writel(val, ctx->regs + SHADOWCON);
 614
 615         win_data->enabled = false;
 616 }
 617
 618 static struct exynos_drm_overlay_ops fimd_overlay_ops = {
 619         .mode_set = fimd_win_mode_set,
 620         .commit = fimd_win_commit,
 621         .disable = fimd_win_disable,
 622 };
 623
 624 static struct exynos_drm_manager fimd_manager = {
 625         .pipe           = -1,
 626         .ops            = &fimd_manager_ops,
 627         .overlay_ops    = &fimd_overlay_ops,
 628         .display_ops    = &fimd_display_ops,
 629 };
 630
 631 static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc)
 632 {
 633         struct exynos_drm_private *dev_priv = drm_dev->dev_private;
 634         struct drm_pending_vblank_event *e, *t;
 635         struct timeval now;
 636         unsigned long flags;
 637
 638         spin_lock_irqsave(&drm_dev->event_lock, flags);
 639
 640         list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
 641                         base.link) {
 642                 /* if event's pipe isn't same as crtc then ignore it. */
 643                 if (crtc != e->pipe)
 644                         continue;
 645
 646                 do_gettimeofday(&now);
 647                 e->event.sequence = 0;
 648                 e->event.tv_sec = now.tv_sec;
 649                 e->event.tv_usec = now.tv_usec;
 650
 651                 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
 652                 wake_up_interruptible(&e->base.file_priv->event_wait);
 653                 drm_vblank_put(drm_dev, crtc);
 654         }
 655
 656         spin_unlock_irqrestore(&drm_dev->event_lock, flags);
 657 }
 658
 659 static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
 660 {
 661         struct fimd_context *ctx = (struct fimd_context *)dev_id;
 662         struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
 663         struct drm_device *drm_dev = subdrv->drm_dev;
 664         struct exynos_drm_manager *manager = subdrv->manager;
 665         u32 val;
 666
 667         val = readl(ctx->regs + VIDINTCON1);
 668
 669         if (val & VIDINTCON1_INT_FRAME)
 670                 /* VSYNC interrupt */
 671                 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1);
 672
 673         /* check the crtc is detached already from encoder */
 674         if (manager->pipe < 0)
 675                 goto out;
 676
 677         drm_handle_vblank(drm_dev, manager->pipe);
 678         fimd_finish_pageflip(drm_dev, manager->pipe);
 679
 680         /* set wait vsync event to zero and wake up queue. */
 681         if (atomic_read(&ctx->wait_vsync_event)) {
 682                 atomic_set(&ctx->wait_vsync_event, 0);
 683                 DRM_WAKEUP(&ctx->wait_vsync_queue);
 684         }
 685 out:
 686         return IRQ_HANDLED;
 687 }
 688
 689 static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
 690 {
 691         DRM_DEBUG_KMS("%s\n", __FILE__);
 692
 693         /*
 694          * enable drm irq mode.
 695          * - with irq_enabled = 1, we can use the vblank feature.
 696          *
 697          * P.S. note that we wouldn't use drm irq handler but
 698          *      just specific driver own one instead because
 699          *      drm framework supports only one irq handler.
 700          */
 701         drm_dev->irq_enabled = 1;
 702
 703         /*
 704          * with vblank_disable_allowed = 1, vblank interrupt will be disabled
 705          * by drm timer once a current process gives up ownership of
 706          * vblank event.(after drm_vblank_put function is called)
 707          */
 708         drm_dev->vblank_disable_allowed = 1;
 709
 710         /* attach this sub driver to iommu mapping if supported. */
 711         if (is_drm_iommu_supported(drm_dev))
 712                 drm_iommu_attach_device(drm_dev, dev);
 713
 714         return 0;
 715 }
 716
 717 static void fimd_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
 718 {
 719         DRM_DEBUG_KMS("%s\n", __FILE__);
 720
 721         /* detach this sub driver from iommu mapping if supported. */
 722         if (is_drm_iommu_supported(drm_dev))
 723                 drm_iommu_detach_device(drm_dev, dev);
 724 }
 725
 726 static int fimd_calc_clkdiv(struct fimd_context *ctx,
 727                             struct fb_videomode *timing)
 728 {
 729         unsigned long clk = clk_get_rate(ctx->lcd_clk);
 730         u32 retrace;
 731         u32 clkdiv;
 732         u32 best_framerate = 0;
 733         u32 framerate;
 734
 735         DRM_DEBUG_KMS("%s\n", __FILE__);
 736
 737         retrace = timing->left_margin + timing->hsync_len +
 738                                 timing->right_margin + timing->xres;
 739         retrace *= timing->upper_margin + timing->vsync_len +
 740                                 timing->lower_margin + timing->yres;
 741
 742         /* default framerate is 60Hz */
 743         if (!timing->refresh)
 744                 timing->refresh = 60;
 745
 746         clk /= retrace;
 747
 748         for (clkdiv = 1; clkdiv < 0x100; clkdiv++) {
 749                 int tmp;
 750
 751                 /* get best framerate */
 752                 framerate = clk / clkdiv;
 753                 tmp = timing->refresh - framerate;
 754                 if (tmp < 0) {
 755                         best_framerate = framerate;
 756                         continue;
 757                 } else {
 758                         if (!best_framerate)
 759                                 best_framerate = framerate;
 760                         else if (tmp < (best_framerate - framerate))
 761                                 best_framerate = framerate;
 762                         break;
 763                 }
 764         }
 765
 766         return clkdiv;
 767 }
 768
 769 static void fimd_clear_win(struct fimd_context *ctx, int win)
 770 {
 771         u32 val;
 772
 773         DRM_DEBUG_KMS("%s\n", __FILE__);
 774
 775         writel(0, ctx->regs + WINCON(win));
 776         writel(0, ctx->regs + VIDOSD_A(win));
 777         writel(0, ctx->regs + VIDOSD_B(win));
 778         writel(0, ctx->regs + VIDOSD_C(win));
 779
 780         if (win == 1 || win == 2)
 781                 writel(0, ctx->regs + VIDOSD_D(win));
 782
 783         val = readl(ctx->regs + SHADOWCON);
 784         val &= ~SHADOWCON_WINx_PROTECT(win);
 785         writel(val, ctx->regs + SHADOWCON);
 786 }
 787
 788 static int fimd_clock(struct fimd_context *ctx, bool enable)
 789 {
 790         DRM_DEBUG_KMS("%s\n", __FILE__);
 791
 792         if (enable) {
 793                 int ret;
 794
 795                 ret = clk_enable(ctx->bus_clk);
 796                 if (ret < 0)
 797                         return ret;
 798
 799                 ret = clk_enable(ctx->lcd_clk);
 800                 if  (ret < 0) {
 801                         clk_disable(ctx->bus_clk);
 802                         return ret;
 803                 }
 804         } else {
 805                 clk_disable(ctx->lcd_clk);
 806                 clk_disable(ctx->bus_clk);
 807         }
 808
 809         return 0;
 810 }
 811
 812 static int fimd_activate(struct fimd_context *ctx, bool enable)
 813 {
 814         if (enable) {
 815                 int ret;
 816                 struct device *dev = ctx->subdrv.dev;
 817
 818                 ret = fimd_clock(ctx, true);
 819                 if (ret < 0)
 820                         return ret;
 821
 822                 ctx->suspended = false;
 823
 824                 /* if vblank was enabled status, enable it again. */
 825                 if (test_and_clear_bit(0, &ctx->irq_flags))
 826                         fimd_enable_vblank(dev);
 827         } else {
 828                 fimd_clock(ctx, false);
 829                 ctx->suspended = true;
 830         }
 831
 832         return 0;
 833 }
 834
 835 static int __devinit fimd_probe(struct platform_device *pdev)
 836 {
 837         struct device *dev = &pdev->dev;
 838         struct fimd_context *ctx;
 839         struct exynos_drm_subdrv *subdrv;
 840         struct exynos_drm_fimd_pdata *pdata;
 841         struct exynos_drm_panel_info *panel;
 842         struct resource *res;
 843         int win;
 844         int ret = -EINVAL;
 845
 846         DRM_DEBUG_KMS("%s\n", __FILE__);
 847
 848         pdata = pdev->dev.platform_data;
 849         if (!pdata) {
 850                 dev_err(dev, "no platform data specified\n");
 851                 return -EINVAL;
 852         }
 853
 854         panel = &pdata->panel;
 855         if (!panel) {
 856                 dev_err(dev, "panel is null.\n");
 857                 return -EINVAL;
 858         }
 859
 860         ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
 861         if (!ctx)
 862                 return -ENOMEM;
 863
 864         ctx->bus_clk = devm_clk_get(dev, "fimd");
 865         if (IS_ERR(ctx->bus_clk)) {
 866                 dev_err(dev, "failed to get bus clock\n");
 867                 return PTR_ERR(ctx->bus_clk);
 868         }
 869
 870         ctx->lcd_clk = devm_clk_get(dev, "sclk_fimd");
 871         if (IS_ERR(ctx->lcd_clk)) {
 872                 dev_err(dev, "failed to get lcd clock\n");
 873                 return PTR_ERR(ctx->lcd_clk);
 874         }
 875
 876         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 877
 878         ctx->regs = devm_request_and_ioremap(&pdev->dev, res);
 879         if (!ctx->regs) {
 880                 dev_err(dev, "failed to map registers\n");
 881                 return -ENXIO;
 882         }
 883
 884         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 885         if (!res) {
 886                 dev_err(dev, "irq request failed.\n");
 887                 return -ENXIO;
 888         }
 889
 890         ctx->irq = res->start;
 891
 892         ret = devm_request_irq(&pdev->dev, ctx->irq, fimd_irq_handler,
 893                                                         0, "drm_fimd", ctx);
 894         if (ret) {
 895                 dev_err(dev, "irq request failed.\n");
 896                 return ret;
 897         }
 898
 899         ctx->vidcon0 = pdata->vidcon0;
 900         ctx->vidcon1 = pdata->vidcon1;
 901         ctx->default_win = pdata->default_win;
 902         ctx->panel = panel;
 903         DRM_INIT_WAITQUEUE(&ctx->wait_vsync_queue);
 904         atomic_set(&ctx->wait_vsync_event, 0);
 905
 906         subdrv = &ctx->subdrv;
 907
 908         subdrv->dev = dev;
 909         subdrv->manager = &fimd_manager;
 910         subdrv->probe = fimd_subdrv_probe;
 911         subdrv->remove = fimd_subdrv_remove;
 912
 913         mutex_init(&ctx->lock);
 914
 915         platform_set_drvdata(pdev, ctx);
 916
 917         pm_runtime_enable(dev);
 918         pm_runtime_get_sync(dev);
 919
 920         ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing);
 921         panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
 922
 923         DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n",
 924                         panel->timing.pixclock, ctx->clkdiv);
 925
 926         for (win = 0; win < WINDOWS_NR; win++)
 927                 fimd_clear_win(ctx, win);
 928
 929         exynos_drm_subdrv_register(subdrv);
 930
 931         return 0;
 932 }
 933
 934 static int __devexit fimd_remove(struct platform_device *pdev)
 935 {
 936         struct device *dev = &pdev->dev;
 937         struct fimd_context *ctx = platform_get_drvdata(pdev);
 938
 939         DRM_DEBUG_KMS("%s\n", __FILE__);
 940
 941         exynos_drm_subdrv_unregister(&ctx->subdrv);
 942
 943         if (ctx->suspended)
 944                 goto out;
 945
 946         clk_disable(ctx->lcd_clk);
 947         clk_disable(ctx->bus_clk);
 948
 949         pm_runtime_set_suspended(dev);
 950         pm_runtime_put_sync(dev);
 951
 952 out:
 953         pm_runtime_disable(dev);
 954
 955         return 0;
 956 }
 957
 958 #ifdef CONFIG_PM_SLEEP
 959 static int fimd_suspend(struct device *dev)
 960 {
 961         struct fimd_context *ctx = get_fimd_context(dev);
 962
 963         /*
 964          * do not use pm_runtime_suspend(). if pm_runtime_suspend() is
 965          * called here, an error would be returned by that interface
 966          * because the usage_count of pm runtime is more than 1.
 967          */
 968         if (!pm_runtime_suspended(dev))
 969                 return fimd_activate(ctx, false);
 970
 971         return 0;
 972 }
 973
 974 static int fimd_resume(struct device *dev)
 975 {
 976         struct fimd_context *ctx = get_fimd_context(dev);
 977
 978         /*
 979          * if entered to sleep when lcd panel was on, the usage_count
 980          * of pm runtime would still be 1 so in this case, fimd driver
 981          * should be on directly not drawing on pm runtime interface.
 982          */
 983         if (pm_runtime_suspended(dev)) {
 984                 int ret;
 985
 986                 ret = fimd_activate(ctx, true);
 987                 if (ret < 0)
 988                         return ret;
 989
 990                 /*
 991                  * in case of dpms on(standby), fimd_apply function will
 992                  * be called by encoder's dpms callback to update fimd's
 993                  * registers but in case of sleep wakeup, it's not.
 994                  * so fimd_apply function should be called at here.
 995                  */
 996                 fimd_apply(dev);
 997         }
 998
 999         return 0;
1000 }
1001 #endif
1002
1003 #ifdef CONFIG_PM_RUNTIME
1004 static int fimd_runtime_suspend(struct device *dev)
1005 {
1006         struct fimd_context *ctx = get_fimd_context(dev);
1007
1008         DRM_DEBUG_KMS("%s\n", __FILE__);
1009
1010         return fimd_activate(ctx, false);
1011 }
1012
1013 static int fimd_runtime_resume(struct device *dev)
1014 {
1015         struct fimd_context *ctx = get_fimd_context(dev);
1016
1017         DRM_DEBUG_KMS("%s\n", __FILE__);
1018
1019         return fimd_activate(ctx, true);
1020 }
1021 #endif
1022
1023 static struct platform_device_id fimd_driver_ids[] = {
1024         {
1025                 .name           = "exynos4-fb",
1026                 .driver_data    = (unsigned long)&exynos4_fimd_driver_data,
1027         }, {
1028                 .name           = "exynos5-fb",
1029                 .driver_data    = (unsigned long)&exynos5_fimd_driver_data,
1030         },
1031         {},
1032 };
1033 MODULE_DEVICE_TABLE(platform, fimd_driver_ids);
1034
1035 static const struct dev_pm_ops fimd_pm_ops = {
1036         SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume)
1037         SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL)
1038 };
1039
1040 struct platform_driver fimd_driver = {
1041         .probe          = fimd_probe,
1042         .remove         = __devexit_p(fimd_remove),
1043         .id_table       = fimd_driver_ids,
1044         .driver         = {
1045                 .name   = "exynos4-fb",
1046                 .owner  = THIS_MODULE,
1047                 .pm     = &fimd_pm_ops,
1048         },
1049 };