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25 * DOC: atomic modeset support
27 * The functions here implement the state management and hardware programming
28 * dispatch required by the atomic modeset infrastructure.
29 * See intel_atomic_plane.c for the plane-specific atomic functionality.
33 #include <drm/drm_atomic.h>
34 #include <drm/drm_atomic_helper.h>
35 #include <drm/drm_plane_helper.h>
36 #include "intel_drv.h"
40 * intel_atomic_check - validate state object
42 * @state: state to validate
44 int intel_atomic_check(struct drm_device *dev,
45 struct drm_atomic_state *state)
47 int nplanes = dev->mode_config.num_total_plane;
48 int ncrtcs = dev->mode_config.num_crtc;
49 int nconnectors = dev->mode_config.num_connector;
50 enum pipe nuclear_pipe = INVALID_PIPE;
51 struct intel_crtc *nuclear_crtc = NULL;
52 struct intel_crtc_state *crtc_state = NULL;
55 bool not_nuclear = false;
58 * FIXME: At the moment, we only support "nuclear pageflip" on a
59 * single CRTC. Cross-crtc updates will be added later.
61 for (i = 0; i < nplanes; i++) {
62 struct intel_plane *plane = to_intel_plane(state->planes[i]);
66 if (nuclear_pipe == INVALID_PIPE) {
67 nuclear_pipe = plane->pipe;
68 } else if (nuclear_pipe != plane->pipe) {
69 DRM_DEBUG_KMS("i915 only support atomic plane operations on a single CRTC at the moment\n");
75 * FIXME: We only handle planes for now; make sure there are no CRTC's
76 * or connectors involved.
78 state->allow_modeset = false;
79 for (i = 0; i < ncrtcs; i++) {
80 struct intel_crtc *crtc = to_intel_crtc(state->crtcs[i]);
82 memset(&crtc->atomic, 0, sizeof(crtc->atomic));
83 if (crtc && crtc->pipe != nuclear_pipe)
85 if (crtc && crtc->pipe == nuclear_pipe) {
87 crtc_state = to_intel_crtc_state(state->crtc_states[i]);
90 for (i = 0; i < nconnectors; i++)
91 if (state->connectors[i] != NULL)
95 DRM_DEBUG_KMS("i915 only supports atomic plane operations at the moment\n");
99 ret = drm_atomic_helper_check_planes(dev, state);
103 /* FIXME: move to crtc atomic check function once it is ready */
104 ret = intel_atomic_setup_scalers(dev, nuclear_crtc, crtc_state);
113 * intel_atomic_commit - commit validated state object
115 * @state: the top-level driver state object
116 * @async: asynchronous commit
118 * This function commits a top-level state object that has been validated
119 * with drm_atomic_helper_check().
121 * FIXME: Atomic modeset support for i915 is not yet complete. At the moment
122 * we can only handle plane-related operations and do not yet support
123 * asynchronous commit.
126 * Zero for success or -errno.
128 int intel_atomic_commit(struct drm_device *dev,
129 struct drm_atomic_state *state,
136 DRM_DEBUG_KMS("i915 does not yet support async commit\n");
140 ret = drm_atomic_helper_prepare_planes(dev, state);
144 /* Point of no return */
147 * FIXME: The proper sequence here will eventually be:
149 * drm_atomic_helper_swap_state(dev, state)
150 * drm_atomic_helper_commit_modeset_disables(dev, state);
151 * drm_atomic_helper_commit_planes(dev, state);
152 * drm_atomic_helper_commit_modeset_enables(dev, state);
153 * drm_atomic_helper_wait_for_vblanks(dev, state);
154 * drm_atomic_helper_cleanup_planes(dev, state);
155 * drm_atomic_state_free(state);
157 * once we have full atomic modeset. For now, just manually update
158 * plane states to avoid clobbering good states with dummy states
159 * while nuclear pageflipping.
161 for (i = 0; i < dev->mode_config.num_total_plane; i++) {
162 struct drm_plane *plane = state->planes[i];
167 plane->state->state = state;
168 swap(state->plane_states[i], plane->state);
169 plane->state->state = NULL;
172 /* swap crtc_scaler_state */
173 for (i = 0; i < dev->mode_config.num_crtc; i++) {
174 struct drm_crtc *crtc = state->crtcs[i];
179 to_intel_crtc(crtc)->config->scaler_state =
180 to_intel_crtc_state(state->crtc_states[i])->scaler_state;
182 if (INTEL_INFO(dev)->gen >= 9)
183 skl_detach_scalers(to_intel_crtc(crtc));
186 drm_atomic_helper_commit_planes(dev, state);
187 drm_atomic_helper_wait_for_vblanks(dev, state);
188 drm_atomic_helper_cleanup_planes(dev, state);
189 drm_atomic_state_free(state);
195 * intel_connector_atomic_get_property - fetch connector property value
196 * @connector: connector to fetch property for
197 * @state: state containing the property value
198 * @property: property to look up
199 * @val: pointer to write property value into
201 * The DRM core does not store shadow copies of properties for
202 * atomic-capable drivers. This entrypoint is used to fetch
203 * the current value of a driver-specific connector property.
206 intel_connector_atomic_get_property(struct drm_connector *connector,
207 const struct drm_connector_state *state,
208 struct drm_property *property,
214 * TODO: We only have atomic modeset for planes at the moment, so the
215 * crtc/connector code isn't quite ready yet. Until it's ready,
216 * continue to look up all property values in the DRM's shadow copy
217 * in obj->properties->values[].
219 * When the crtc/connector state work matures, this function should
220 * be updated to read the values out of the state structure instead.
222 for (i = 0; i < connector->base.properties->count; i++) {
223 if (connector->base.properties->properties[i] == property) {
224 *val = connector->base.properties->values[i];
233 * intel_crtc_duplicate_state - duplicate crtc state
236 * Allocates and returns a copy of the crtc state (both common and
237 * Intel-specific) for the specified crtc.
239 * Returns: The newly allocated crtc state, or NULL on failure.
241 struct drm_crtc_state *
242 intel_crtc_duplicate_state(struct drm_crtc *crtc)
244 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
245 struct intel_crtc_state *crtc_state;
247 if (WARN_ON(!intel_crtc->config))
248 crtc_state = kzalloc(sizeof(*crtc_state), GFP_KERNEL);
250 crtc_state = kmemdup(intel_crtc->config,
251 sizeof(*intel_crtc->config), GFP_KERNEL);
256 __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);
258 crtc_state->base.crtc = crtc;
260 return &crtc_state->base;
264 * intel_crtc_destroy_state - destroy crtc state
267 * Destroys the crtc state (both common and Intel-specific) for the
271 intel_crtc_destroy_state(struct drm_crtc *crtc,
272 struct drm_crtc_state *state)
274 drm_atomic_helper_crtc_destroy_state(crtc, state);
278 * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
281 * @crtc_state: incoming crtc_state to validate and setup scalers
283 * This function sets up scalers based on staged scaling requests for
284 * a @crtc and its planes. It is called from crtc level check path. If request
285 * is a supportable request, it attaches scalers to requested planes and crtc.
287 * This function takes into account the current scaler(s) in use by any planes
288 * not being part of this atomic state
291 * 0 - scalers were setup succesfully
292 * error code - otherwise
294 int intel_atomic_setup_scalers(struct drm_device *dev,
295 struct intel_crtc *intel_crtc,
296 struct intel_crtc_state *crtc_state)
298 struct drm_plane *plane = NULL;
299 struct intel_plane *intel_plane;
300 struct intel_plane_state *plane_state = NULL;
301 struct intel_crtc_scaler_state *scaler_state;
302 struct drm_atomic_state *drm_state;
303 int num_scalers_need;
306 if (INTEL_INFO(dev)->gen < 9 || !intel_crtc || !crtc_state)
309 scaler_state = &crtc_state->scaler_state;
310 drm_state = crtc_state->base.state;
312 num_scalers_need = hweight32(scaler_state->scaler_users);
313 DRM_DEBUG_KMS("crtc_state = %p need = %d avail = %d scaler_users = 0x%x\n",
314 crtc_state, num_scalers_need, intel_crtc->num_scalers,
315 scaler_state->scaler_users);
319 * - staged scaler requests are already in scaler_state->scaler_users
320 * - check whether staged scaling requests can be supported
321 * - add planes using scalers that aren't in current transaction
322 * - assign scalers to requested users
323 * - as part of plane commit, scalers will be committed
324 * (i.e., either attached or detached) to respective planes in hw
325 * - as part of crtc_commit, scaler will be either attached or detached
329 /* fail if required scalers > available scalers */
330 if (num_scalers_need > intel_crtc->num_scalers){
331 DRM_DEBUG_KMS("Too many scaling requests %d > %d\n",
332 num_scalers_need, intel_crtc->num_scalers);
336 /* walkthrough scaler_users bits and start assigning scalers */
337 for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
340 /* skip if scaler not required */
341 if (!(scaler_state->scaler_users & (1 << i)))
344 if (i == SKL_CRTC_INDEX) {
345 /* panel fitter case: assign as a crtc scaler */
346 scaler_id = &scaler_state->scaler_id;
351 /* plane scaler case: assign as a plane scaler */
352 /* find the plane that set the bit as scaler_user */
353 plane = drm_state->planes[i];
356 * to enable/disable hq mode, add planes that are using scaler
357 * into this transaction
360 struct drm_plane_state *state;
361 plane = drm_plane_from_index(dev, i);
362 state = drm_atomic_get_plane_state(drm_state, plane);
364 DRM_DEBUG_KMS("Failed to add [PLANE:%d] to drm_state\n",
366 return PTR_ERR(state);
370 intel_plane = to_intel_plane(plane);
372 /* plane on different crtc cannot be a scaler user of this crtc */
373 if (WARN_ON(intel_plane->pipe != intel_crtc->pipe)) {
377 plane_state = to_intel_plane_state(drm_state->plane_states[i]);
378 scaler_id = &plane_state->scaler_id;
381 if (*scaler_id < 0) {
382 /* find a free scaler */
383 for (j = 0; j < intel_crtc->num_scalers; j++) {
384 if (!scaler_state->scalers[j].in_use) {
385 scaler_state->scalers[j].in_use = 1;
386 *scaler_id = scaler_state->scalers[j].id;
387 DRM_DEBUG_KMS("Attached scaler id %u.%u to %s:%d\n",
389 i == SKL_CRTC_INDEX ? scaler_state->scaler_id :
390 plane_state->scaler_id,
391 i == SKL_CRTC_INDEX ? "CRTC" : "PLANE",
392 i == SKL_CRTC_INDEX ? intel_crtc->base.base.id :
399 if (WARN_ON(*scaler_id < 0)) {
400 DRM_DEBUG_KMS("Cannot find scaler for %s:%d\n",
401 i == SKL_CRTC_INDEX ? "CRTC" : "PLANE",
402 i == SKL_CRTC_INDEX ? intel_crtc->base.base.id:plane->base.id);
406 /* set scaler mode */
407 if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) {
409 * when only 1 scaler is in use on either pipe A or B,
410 * scaler 0 operates in high quality (HQ) mode.
411 * In this case use scaler 0 to take advantage of HQ mode
414 scaler_state->scalers[0].in_use = 1;
415 scaler_state->scalers[0].mode = PS_SCALER_MODE_HQ;
416 scaler_state->scalers[1].in_use = 0;
418 scaler_state->scalers[*scaler_id].mode = PS_SCALER_MODE_DYN;