drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "drm_crtc.h"
  37 #include "drm_edid.h"
  38 #include "intel_drv.h"
  39 #include "i915_drm.h"
  40 #include "i915_drv.h"
  41 #include <linux/acpi.h>
  42
  43 /* Private structure for the integrated LVDS support */
  44 struct intel_lvds {
  45         struct intel_encoder base;
  46         int fitting_mode;
  47         u32 pfit_control;
  48         u32 pfit_pgm_ratios;
  49 };
  50
  51 static struct intel_lvds *enc_to_intel_lvds(struct drm_encoder *encoder)
  52 {
  53         return container_of(enc_to_intel_encoder(encoder), struct intel_lvds, base);
  54 }
  55
  56 /**
  57  * Sets the backlight level.
  58  *
  59  * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
  60  */
  61 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
  62 {
  63         struct drm_i915_private *dev_priv = dev->dev_private;
  64         u32 blc_pwm_ctl, reg;
  65
  66         if (HAS_PCH_SPLIT(dev))
  67                 reg = BLC_PWM_CPU_CTL;
  68         else
  69                 reg = BLC_PWM_CTL;
  70
  71         blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  72         I915_WRITE(reg, (blc_pwm_ctl |
  73                                  (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  74 }
  75
  76 /**
  77  * Returns the maximum level of the backlight duty cycle field.
  78  */
  79 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
  80 {
  81         struct drm_i915_private *dev_priv = dev->dev_private;
  82         u32 reg;
  83
  84         if (HAS_PCH_SPLIT(dev))
  85                 reg = BLC_PWM_PCH_CTL2;
  86         else
  87                 reg = BLC_PWM_CTL;
  88
  89         return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
  90                 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  91 }
  92
  93 /**
  94  * Sets the power state for the panel.
  95  */
  96 static void intel_lvds_set_power(struct drm_device *dev, bool on)
  97 {
  98         struct drm_i915_private *dev_priv = dev->dev_private;
  99         u32 pp_status, ctl_reg, status_reg, lvds_reg;
 100
 101         if (HAS_PCH_SPLIT(dev)) {
 102                 ctl_reg = PCH_PP_CONTROL;
 103                 status_reg = PCH_PP_STATUS;
 104                 lvds_reg = PCH_LVDS;
 105         } else {
 106                 ctl_reg = PP_CONTROL;
 107                 status_reg = PP_STATUS;
 108                 lvds_reg = LVDS;
 109         }
 110
 111         if (on) {
 112                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
 113                 POSTING_READ(lvds_reg);
 114
 115                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
 116                            POWER_TARGET_ON);
 117                 do {
 118                         pp_status = I915_READ(status_reg);
 119                 } while ((pp_status & PP_ON) == 0);
 120
 121                 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
 122         } else {
 123                 intel_lvds_set_backlight(dev, 0);
 124
 125                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
 126                            ~POWER_TARGET_ON);
 127                 do {
 128                         pp_status = I915_READ(status_reg);
 129                 } while (pp_status & PP_ON);
 130
 131                 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
 132                 POSTING_READ(lvds_reg);
 133         }
 134 }
 135
 136 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 137 {
 138         struct drm_device *dev = encoder->dev;
 139
 140         if (mode == DRM_MODE_DPMS_ON)
 141                 intel_lvds_set_power(dev, true);
 142         else
 143                 intel_lvds_set_power(dev, false);
 144
 145         /* XXX: We never power down the LVDS pairs. */
 146 }
 147
 148 static int intel_lvds_mode_valid(struct drm_connector *connector,
 149                                  struct drm_display_mode *mode)
 150 {
 151         struct drm_device *dev = connector->dev;
 152         struct drm_i915_private *dev_priv = dev->dev_private;
 153         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
 154
 155         if (fixed_mode) {
 156                 if (mode->hdisplay > fixed_mode->hdisplay)
 157                         return MODE_PANEL;
 158                 if (mode->vdisplay > fixed_mode->vdisplay)
 159                         return MODE_PANEL;
 160         }
 161
 162         return MODE_OK;
 163 }
 164
 165 static void
 166 centre_horizontally(struct drm_display_mode *mode,
 167                     int width)
 168 {
 169         u32 border, sync_pos, blank_width, sync_width;
 170
 171         /* keep the hsync and hblank widths constant */
 172         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 173         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 174         sync_pos = (blank_width - sync_width + 1) / 2;
 175
 176         border = (mode->hdisplay - width + 1) / 2;
 177         border += border & 1; /* make the border even */
 178
 179         mode->crtc_hdisplay = width;
 180         mode->crtc_hblank_start = width + border;
 181         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 182
 183         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 184         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 185 }
 186
 187 static void
 188 centre_vertically(struct drm_display_mode *mode,
 189                   int height)
 190 {
 191         u32 border, sync_pos, blank_width, sync_width;
 192
 193         /* keep the vsync and vblank widths constant */
 194         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 195         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 196         sync_pos = (blank_width - sync_width + 1) / 2;
 197
 198         border = (mode->vdisplay - height + 1) / 2;
 199
 200         mode->crtc_vdisplay = height;
 201         mode->crtc_vblank_start = height + border;
 202         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 203
 204         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 205         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 206 }
 207
 208 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 209 {
 210         /*
 211          * Floating point operation is not supported. So the FACTOR
 212          * is defined, which can avoid the floating point computation
 213          * when calculating the panel ratio.
 214          */
 215 #define ACCURACY 12
 216 #define FACTOR (1 << ACCURACY)
 217         u32 ratio = source * FACTOR / target;
 218         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 219 }
 220
 221 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 222                                   struct drm_display_mode *mode,
 223                                   struct drm_display_mode *adjusted_mode)
 224 {
 225         struct drm_device *dev = encoder->dev;
 226         struct drm_i915_private *dev_priv = dev->dev_private;
 227         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 228         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 229         struct drm_encoder *tmp_encoder;
 230         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 231
 232         /* Should never happen!! */
 233         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
 234                 DRM_ERROR("Can't support LVDS on pipe A\n");
 235                 return false;
 236         }
 237
 238         /* Should never happen!! */
 239         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 240                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 241                         DRM_ERROR("Can't enable LVDS and another "
 242                                "encoder on the same pipe\n");
 243                         return false;
 244                 }
 245         }
 246         /* If we don't have a panel mode, there is nothing we can do */
 247         if (dev_priv->panel_fixed_mode == NULL)
 248                 return true;
 249         /*
 250          * We have timings from the BIOS for the panel, put them in
 251          * to the adjusted mode.  The CRTC will be set up for this mode,
 252          * with the panel scaling set up to source from the H/VDisplay
 253          * of the original mode.
 254          */
 255         adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
 256         adjusted_mode->hsync_start =
 257                 dev_priv->panel_fixed_mode->hsync_start;
 258         adjusted_mode->hsync_end =
 259                 dev_priv->panel_fixed_mode->hsync_end;
 260         adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
 261         adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
 262         adjusted_mode->vsync_start =
 263                 dev_priv->panel_fixed_mode->vsync_start;
 264         adjusted_mode->vsync_end =
 265                 dev_priv->panel_fixed_mode->vsync_end;
 266         adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
 267         adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
 268         drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
 269
 270         /* Make sure pre-965s set dither correctly */
 271         if (!IS_I965G(dev)) {
 272                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
 273                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 274         }
 275
 276         /* Native modes don't need fitting */
 277         if (adjusted_mode->hdisplay == mode->hdisplay &&
 278             adjusted_mode->vdisplay == mode->vdisplay)
 279                 goto out;
 280
 281         /* full screen scale for now */
 282         if (HAS_PCH_SPLIT(dev))
 283                 goto out;
 284
 285         /* 965+ wants fuzzy fitting */
 286         if (IS_I965G(dev))
 287                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 288                                  PFIT_FILTER_FUZZY);
 289
 290         /*
 291          * Enable automatic panel scaling for non-native modes so that they fill
 292          * the screen.  Should be enabled before the pipe is enabled, according
 293          * to register description and PRM.
 294          * Change the value here to see the borders for debugging
 295          */
 296         if (!HAS_PCH_SPLIT(dev)) {
 297                 I915_WRITE(BCLRPAT_A, 0);
 298                 I915_WRITE(BCLRPAT_B, 0);
 299         }
 300
 301         switch (intel_lvds->fitting_mode) {
 302         case DRM_MODE_SCALE_CENTER:
 303                 /*
 304                  * For centered modes, we have to calculate border widths &
 305                  * heights and modify the values programmed into the CRTC.
 306                  */
 307                 centre_horizontally(adjusted_mode, mode->hdisplay);
 308                 centre_vertically(adjusted_mode, mode->vdisplay);
 309                 border = LVDS_BORDER_ENABLE;
 310                 break;
 311
 312         case DRM_MODE_SCALE_ASPECT:
 313                 /* Scale but preserve the aspect ratio */
 314                 if (IS_I965G(dev)) {
 315                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 316                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 317
 318                         pfit_control |= PFIT_ENABLE;
 319                         /* 965+ is easy, it does everything in hw */
 320                         if (scaled_width > scaled_height)
 321                                 pfit_control |= PFIT_SCALING_PILLAR;
 322                         else if (scaled_width < scaled_height)
 323                                 pfit_control |= PFIT_SCALING_LETTER;
 324                         else
 325                                 pfit_control |= PFIT_SCALING_AUTO;
 326                 } else {
 327                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 328                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 329                         /*
 330                          * For earlier chips we have to calculate the scaling
 331                          * ratio by hand and program it into the
 332                          * PFIT_PGM_RATIO register
 333                          */
 334                         if (scaled_width > scaled_height) { /* pillar */
 335                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
 336
 337                                 border = LVDS_BORDER_ENABLE;
 338                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 339                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 340                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 341                                                             bits << PFIT_VERT_SCALE_SHIFT);
 342                                         pfit_control |= (PFIT_ENABLE |
 343                                                          VERT_INTERP_BILINEAR |
 344                                                          HORIZ_INTERP_BILINEAR);
 345                                 }
 346                         } else if (scaled_width < scaled_height) { /* letter */
 347                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
 348
 349                                 border = LVDS_BORDER_ENABLE;
 350                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 351                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 352                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 353                                                             bits << PFIT_VERT_SCALE_SHIFT);
 354                                         pfit_control |= (PFIT_ENABLE |
 355                                                          VERT_INTERP_BILINEAR |
 356                                                          HORIZ_INTERP_BILINEAR);
 357                                 }
 358                         } else
 359                                 /* Aspects match, Let hw scale both directions */
 360                                 pfit_control |= (PFIT_ENABLE |
 361                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 362                                                  VERT_INTERP_BILINEAR |
 363                                                  HORIZ_INTERP_BILINEAR);
 364                 }
 365                 break;
 366
 367         case DRM_MODE_SCALE_FULLSCREEN:
 368                 /*
 369                  * Full scaling, even if it changes the aspect ratio.
 370                  * Fortunately this is all done for us in hw.
 371                  */
 372                 pfit_control |= PFIT_ENABLE;
 373                 if (IS_I965G(dev))
 374                         pfit_control |= PFIT_SCALING_AUTO;
 375                 else
 376                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 377                                          VERT_INTERP_BILINEAR |
 378                                          HORIZ_INTERP_BILINEAR);
 379                 break;
 380
 381         default:
 382                 break;
 383         }
 384
 385 out:
 386         intel_lvds->pfit_control = pfit_control;
 387         intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
 388         dev_priv->lvds_border_bits = border;
 389
 390         /*
 391          * XXX: It would be nice to support lower refresh rates on the
 392          * panels to reduce power consumption, and perhaps match the
 393          * user's requested refresh rate.
 394          */
 395
 396         return true;
 397 }
 398
 399 static void intel_lvds_prepare(struct drm_encoder *encoder)
 400 {
 401         struct drm_device *dev = encoder->dev;
 402         struct drm_i915_private *dev_priv = dev->dev_private;
 403         u32 reg;
 404
 405         if (HAS_PCH_SPLIT(dev))
 406                 reg = BLC_PWM_CPU_CTL;
 407         else
 408                 reg = BLC_PWM_CTL;
 409
 410         dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
 411         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
 412                                        BACKLIGHT_DUTY_CYCLE_MASK);
 413
 414         intel_lvds_set_power(dev, false);
 415 }
 416
 417 static void intel_lvds_commit( struct drm_encoder *encoder)
 418 {
 419         struct drm_device *dev = encoder->dev;
 420         struct drm_i915_private *dev_priv = dev->dev_private;
 421
 422         if (dev_priv->backlight_duty_cycle == 0)
 423                 dev_priv->backlight_duty_cycle =
 424                         intel_lvds_get_max_backlight(dev);
 425
 426         intel_lvds_set_power(dev, true);
 427 }
 428
 429 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 430                                 struct drm_display_mode *mode,
 431                                 struct drm_display_mode *adjusted_mode)
 432 {
 433         struct drm_device *dev = encoder->dev;
 434         struct drm_i915_private *dev_priv = dev->dev_private;
 435         struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 436
 437         /*
 438          * The LVDS pin pair will already have been turned on in the
 439          * intel_crtc_mode_set since it has a large impact on the DPLL
 440          * settings.
 441          */
 442
 443         if (HAS_PCH_SPLIT(dev))
 444                 return;
 445
 446         /*
 447          * Enable automatic panel scaling so that non-native modes fill the
 448          * screen.  Should be enabled before the pipe is enabled, according to
 449          * register description and PRM.
 450          */
 451         I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
 452         I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
 453 }
 454
 455 /**
 456  * Detect the LVDS connection.
 457  *
 458  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 459  * connected and closed means disconnected.  We also send hotplug events as
 460  * needed, using lid status notification from the input layer.
 461  */
 462 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
 463 {
 464         struct drm_device *dev = connector->dev;
 465         enum drm_connector_status status = connector_status_connected;
 466
 467         /* ACPI lid methods were generally unreliable in this generation, so
 468          * don't even bother.
 469          */
 470         if (IS_GEN2(dev) || IS_GEN3(dev))
 471                 return connector_status_connected;
 472
 473         return status;
 474 }
 475
 476 /**
 477  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 478  */
 479 static int intel_lvds_get_modes(struct drm_connector *connector)
 480 {
 481         struct drm_device *dev = connector->dev;
 482         struct drm_encoder *encoder = intel_attached_encoder(connector);
 483         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 484         struct drm_i915_private *dev_priv = dev->dev_private;
 485         int ret = 0;
 486
 487         if (dev_priv->lvds_edid_good) {
 488                 ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
 489
 490                 if (ret)
 491                         return ret;
 492         }
 493
 494         /* Didn't get an EDID, so
 495          * Set wide sync ranges so we get all modes
 496          * handed to valid_mode for checking
 497          */
 498         connector->display_info.min_vfreq = 0;
 499         connector->display_info.max_vfreq = 200;
 500         connector->display_info.min_hfreq = 0;
 501         connector->display_info.max_hfreq = 200;
 502
 503         if (dev_priv->panel_fixed_mode != NULL) {
 504                 struct drm_display_mode *mode;
 505
 506                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
 507                 drm_mode_probed_add(connector, mode);
 508
 509                 return 1;
 510         }
 511
 512         return 0;
 513 }
 514
 515 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 516 {
 517         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
 518         return 1;
 519 }
 520
 521 /* The GPU hangs up on these systems if modeset is performed on LID open */
 522 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 523         {
 524                 .callback = intel_no_modeset_on_lid_dmi_callback,
 525                 .ident = "Toshiba Tecra A11",
 526                 .matches = {
 527                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 528                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 529                 },
 530         },
 531
 532         { }     /* terminating entry */
 533 };
 534
 535 /*
 536  * Lid events. Note the use of 'modeset_on_lid':
 537  *  - we set it on lid close, and reset it on open
 538  *  - we use it as a "only once" bit (ie we ignore
 539  *    duplicate events where it was already properly
 540  *    set/reset)
 541  *  - the suspend/resume paths will also set it to
 542  *    zero, since they restore the mode ("lid open").
 543  */
 544 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 545                             void *unused)
 546 {
 547         struct drm_i915_private *dev_priv =
 548                 container_of(nb, struct drm_i915_private, lid_notifier);
 549         struct drm_device *dev = dev_priv->dev;
 550         struct drm_connector *connector = dev_priv->int_lvds_connector;
 551
 552         /*
 553          * check and update the status of LVDS connector after receiving
 554          * the LID nofication event.
 555          */
 556         if (connector)
 557                 connector->status = connector->funcs->detect(connector);
 558         /* Don't force modeset on machines where it causes a GPU lockup */
 559         if (dmi_check_system(intel_no_modeset_on_lid))
 560                 return NOTIFY_OK;
 561         if (!acpi_lid_open()) {
 562                 dev_priv->modeset_on_lid = 1;
 563                 return NOTIFY_OK;
 564         }
 565
 566         if (!dev_priv->modeset_on_lid)
 567                 return NOTIFY_OK;
 568
 569         dev_priv->modeset_on_lid = 0;
 570
 571         mutex_lock(&dev->mode_config.mutex);
 572         drm_helper_resume_force_mode(dev);
 573         mutex_unlock(&dev->mode_config.mutex);
 574
 575         return NOTIFY_OK;
 576 }
 577
 578 /**
 579  * intel_lvds_destroy - unregister and free LVDS structures
 580  * @connector: connector to free
 581  *
 582  * Unregister the DDC bus for this connector then free the driver private
 583  * structure.
 584  */
 585 static void intel_lvds_destroy(struct drm_connector *connector)
 586 {
 587         struct drm_device *dev = connector->dev;
 588         struct drm_i915_private *dev_priv = dev->dev_private;
 589
 590         if (dev_priv->lid_notifier.notifier_call)
 591                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 592         drm_sysfs_connector_remove(connector);
 593         drm_connector_cleanup(connector);
 594         kfree(connector);
 595 }
 596
 597 static int intel_lvds_set_property(struct drm_connector *connector,
 598                                    struct drm_property *property,
 599                                    uint64_t value)
 600 {
 601         struct drm_device *dev = connector->dev;
 602
 603         if (property == dev->mode_config.scaling_mode_property &&
 604                                 connector->encoder) {
 605                 struct drm_crtc *crtc = connector->encoder->crtc;
 606                 struct drm_encoder *encoder = connector->encoder;
 607                 struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder);
 608
 609                 if (value == DRM_MODE_SCALE_NONE) {
 610                         DRM_DEBUG_KMS("no scaling not supported\n");
 611                         return 0;
 612                 }
 613                 if (intel_lvds->fitting_mode == value) {
 614                         /* the LVDS scaling property is not changed */
 615                         return 0;
 616                 }
 617                 intel_lvds->fitting_mode = value;
 618                 if (crtc && crtc->enabled) {
 619                         /*
 620                          * If the CRTC is enabled, the display will be changed
 621                          * according to the new panel fitting mode.
 622                          */
 623                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 624                                 crtc->x, crtc->y, crtc->fb);
 625                 }
 626         }
 627
 628         return 0;
 629 }
 630
 631 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 632         .dpms = intel_lvds_dpms,
 633         .mode_fixup = intel_lvds_mode_fixup,
 634         .prepare = intel_lvds_prepare,
 635         .mode_set = intel_lvds_mode_set,
 636         .commit = intel_lvds_commit,
 637 };
 638
 639 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 640         .get_modes = intel_lvds_get_modes,
 641         .mode_valid = intel_lvds_mode_valid,
 642         .best_encoder = intel_attached_encoder,
 643 };
 644
 645 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 646         .dpms = drm_helper_connector_dpms,
 647         .detect = intel_lvds_detect,
 648         .fill_modes = drm_helper_probe_single_connector_modes,
 649         .set_property = intel_lvds_set_property,
 650         .destroy = intel_lvds_destroy,
 651 };
 652
 653 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 654         .destroy = intel_encoder_destroy,
 655 };
 656
 657 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 658 {
 659         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 660         return 1;
 661 }
 662
 663 /* These systems claim to have LVDS, but really don't */
 664 static const struct dmi_system_id intel_no_lvds[] = {
 665         {
 666                 .callback = intel_no_lvds_dmi_callback,
 667                 .ident = "Apple Mac Mini (Core series)",
 668                 .matches = {
 669                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 670                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 671                 },
 672         },
 673         {
 674                 .callback = intel_no_lvds_dmi_callback,
 675                 .ident = "Apple Mac Mini (Core 2 series)",
 676                 .matches = {
 677                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 678                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 679                 },
 680         },
 681         {
 682                 .callback = intel_no_lvds_dmi_callback,
 683                 .ident = "MSI IM-945GSE-A",
 684                 .matches = {
 685                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 686                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 687                 },
 688         },
 689         {
 690                 .callback = intel_no_lvds_dmi_callback,
 691                 .ident = "Dell Studio Hybrid",
 692                 .matches = {
 693                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 694                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 695                 },
 696         },
 697         {
 698                 .callback = intel_no_lvds_dmi_callback,
 699                 .ident = "AOpen Mini PC",
 700                 .matches = {
 701                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 702                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 703                 },
 704         },
 705         {
 706                 .callback = intel_no_lvds_dmi_callback,
 707                 .ident = "AOpen Mini PC MP915",
 708                 .matches = {
 709                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 710                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 711                 },
 712         },
 713         {
 714                 .callback = intel_no_lvds_dmi_callback,
 715                 .ident = "Aopen i945GTt-VFA",
 716                 .matches = {
 717                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 718                 },
 719         },
 720         {
 721                 .callback = intel_no_lvds_dmi_callback,
 722                 .ident = "Clientron U800",
 723                 .matches = {
 724                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 725                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 726                 },
 727         },
 728
 729         { }     /* terminating entry */
 730 };
 731
 732 /**
 733  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 734  * @dev: drm device
 735  * @connector: LVDS connector
 736  *
 737  * Find the reduced downclock for LVDS in EDID.
 738  */
 739 static void intel_find_lvds_downclock(struct drm_device *dev,
 740                                 struct drm_connector *connector)
 741 {
 742         struct drm_i915_private *dev_priv = dev->dev_private;
 743         struct drm_display_mode *scan, *panel_fixed_mode;
 744         int temp_downclock;
 745
 746         panel_fixed_mode = dev_priv->panel_fixed_mode;
 747         temp_downclock = panel_fixed_mode->clock;
 748
 749         mutex_lock(&dev->mode_config.mutex);
 750         list_for_each_entry(scan, &connector->probed_modes, head) {
 751                 /*
 752                  * If one mode has the same resolution with the fixed_panel
 753                  * mode while they have the different refresh rate, it means
 754                  * that the reduced downclock is found for the LVDS. In such
 755                  * case we can set the different FPx0/1 to dynamically select
 756                  * between low and high frequency.
 757                  */
 758                 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
 759                         scan->hsync_start == panel_fixed_mode->hsync_start &&
 760                         scan->hsync_end == panel_fixed_mode->hsync_end &&
 761                         scan->htotal == panel_fixed_mode->htotal &&
 762                         scan->vdisplay == panel_fixed_mode->vdisplay &&
 763                         scan->vsync_start == panel_fixed_mode->vsync_start &&
 764                         scan->vsync_end == panel_fixed_mode->vsync_end &&
 765                         scan->vtotal == panel_fixed_mode->vtotal) {
 766                         if (scan->clock < temp_downclock) {
 767                                 /*
 768                                  * The downclock is already found. But we
 769                                  * expect to find the lower downclock.
 770                                  */
 771                                 temp_downclock = scan->clock;
 772                         }
 773                 }
 774         }
 775         mutex_unlock(&dev->mode_config.mutex);
 776         if (temp_downclock < panel_fixed_mode->clock &&
 777             i915_lvds_downclock) {
 778                 /* We found the downclock for LVDS. */
 779                 dev_priv->lvds_downclock_avail = 1;
 780                 dev_priv->lvds_downclock = temp_downclock;
 781                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 782                                 "Normal clock %dKhz, downclock %dKhz\n",
 783                                 panel_fixed_mode->clock, temp_downclock);
 784         }
 785         return;
 786 }
 787
 788 /*
 789  * Enumerate the child dev array parsed from VBT to check whether
 790  * the LVDS is present.
 791  * If it is present, return 1.
 792  * If it is not present, return false.
 793  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 794  * Note: The addin_offset should also be checked for LVDS panel.
 795  * Only when it is non-zero, it is assumed that it is present.
 796  */
 797 static int lvds_is_present_in_vbt(struct drm_device *dev)
 798 {
 799         struct drm_i915_private *dev_priv = dev->dev_private;
 800         struct child_device_config *p_child;
 801         int i, ret;
 802
 803         if (!dev_priv->child_dev_num)
 804                 return 1;
 805
 806         ret = 0;
 807         for (i = 0; i < dev_priv->child_dev_num; i++) {
 808                 p_child = dev_priv->child_dev + i;
 809                 /*
 810                  * If the device type is not LFP, continue.
 811                  * If the device type is 0x22, it is also regarded as LFP.
 812                  */
 813                 if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
 814                         p_child->device_type != DEVICE_TYPE_LFP)
 815                         continue;
 816
 817                 /* The addin_offset should be checked. Only when it is
 818                  * non-zero, it is regarded as present.
 819                  */
 820                 if (p_child->addin_offset) {
 821                         ret = 1;
 822                         break;
 823                 }
 824         }
 825         return ret;
 826 }
 827
 828 /**
 829  * intel_lvds_init - setup LVDS connectors on this device
 830  * @dev: drm device
 831  *
 832  * Create the connector, register the LVDS DDC bus, and try to figure out what
 833  * modes we can display on the LVDS panel (if present).
 834  */
 835 void intel_lvds_init(struct drm_device *dev)
 836 {
 837         struct drm_i915_private *dev_priv = dev->dev_private;
 838         struct intel_lvds *intel_lvds;
 839         struct intel_encoder *intel_encoder;
 840         struct intel_connector *intel_connector;
 841         struct drm_connector *connector;
 842         struct drm_encoder *encoder;
 843         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 844         struct drm_crtc *crtc;
 845         u32 lvds;
 846         int pipe, gpio = GPIOC;
 847
 848         /* Skip init on machines we know falsely report LVDS */
 849         if (dmi_check_system(intel_no_lvds))
 850                 return;
 851
 852         if (!lvds_is_present_in_vbt(dev)) {
 853                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 854                 return;
 855         }
 856
 857         if (HAS_PCH_SPLIT(dev)) {
 858                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 859                         return;
 860                 if (dev_priv->edp_support) {
 861                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 862                         return;
 863                 }
 864                 gpio = PCH_GPIOC;
 865         }
 866
 867         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
 868         if (!intel_lvds) {
 869                 return;
 870         }
 871
 872         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 873         if (!intel_connector) {
 874                 kfree(intel_lvds);
 875                 return;
 876         }
 877
 878         intel_encoder = &intel_lvds->base;
 879         encoder = &intel_encoder->enc;
 880         connector = &intel_connector->base;
 881         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 882                            DRM_MODE_CONNECTOR_LVDS);
 883
 884         drm_encoder_init(dev, &intel_encoder->enc, &intel_lvds_enc_funcs,
 885                          DRM_MODE_ENCODER_LVDS);
 886
 887         drm_mode_connector_attach_encoder(&intel_connector->base, &intel_encoder->enc);
 888         intel_encoder->type = INTEL_OUTPUT_LVDS;
 889
 890         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 891         intel_encoder->crtc_mask = (1 << 1);
 892         if (IS_I965G(dev))
 893                 intel_encoder->crtc_mask |= (1 << 0);
 894         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 895         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 896         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 897         connector->interlace_allowed = false;
 898         connector->doublescan_allowed = false;
 899
 900         /* create the scaling mode property */
 901         drm_mode_create_scaling_mode_property(dev);
 902         /*
 903          * the initial panel fitting mode will be FULL_SCREEN.
 904          */
 905
 906         drm_connector_attach_property(&intel_connector->base,
 907                                       dev->mode_config.scaling_mode_property,
 908                                       DRM_MODE_SCALE_ASPECT);
 909         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
 910         /*
 911          * LVDS discovery:
 912          * 1) check for EDID on DDC
 913          * 2) check for VBT data
 914          * 3) check to see if LVDS is already on
 915          *    if none of the above, no panel
 916          * 4) make sure lid is open
 917          *    if closed, act like it's not there for now
 918          */
 919
 920         /* Set up the DDC bus. */
 921         intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
 922         if (!intel_encoder->ddc_bus) {
 923                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
 924                            "failed.\n");
 925                 goto failed;
 926         }
 927
 928         /*
 929          * Attempt to get the fixed panel mode from DDC.  Assume that the
 930          * preferred mode is the right one.
 931          */
 932         dev_priv->lvds_edid_good = true;
 933
 934         if (!intel_ddc_get_modes(connector, intel_encoder->ddc_bus))
 935                 dev_priv->lvds_edid_good = false;
 936
 937         list_for_each_entry(scan, &connector->probed_modes, head) {
 938                 mutex_lock(&dev->mode_config.mutex);
 939                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
 940                         dev_priv->panel_fixed_mode =
 941                                 drm_mode_duplicate(dev, scan);
 942                         mutex_unlock(&dev->mode_config.mutex);
 943                         intel_find_lvds_downclock(dev, connector);
 944                         goto out;
 945                 }
 946                 mutex_unlock(&dev->mode_config.mutex);
 947         }
 948
 949         /* Failed to get EDID, what about VBT? */
 950         if (dev_priv->lfp_lvds_vbt_mode) {
 951                 mutex_lock(&dev->mode_config.mutex);
 952                 dev_priv->panel_fixed_mode =
 953                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
 954                 mutex_unlock(&dev->mode_config.mutex);
 955                 if (dev_priv->panel_fixed_mode) {
 956                         dev_priv->panel_fixed_mode->type |=
 957                                 DRM_MODE_TYPE_PREFERRED;
 958                         goto out;
 959                 }
 960         }
 961
 962         /*
 963          * If we didn't get EDID, try checking if the panel is already turned
 964          * on.  If so, assume that whatever is currently programmed is the
 965          * correct mode.
 966          */
 967
 968         /* Ironlake: FIXME if still fail, not try pipe mode now */
 969         if (HAS_PCH_SPLIT(dev))
 970                 goto failed;
 971
 972         lvds = I915_READ(LVDS);
 973         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
 974         crtc = intel_get_crtc_from_pipe(dev, pipe);
 975
 976         if (crtc && (lvds & LVDS_PORT_EN)) {
 977                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
 978                 if (dev_priv->panel_fixed_mode) {
 979                         dev_priv->panel_fixed_mode->type |=
 980                                 DRM_MODE_TYPE_PREFERRED;
 981                         goto out;
 982                 }
 983         }
 984
 985         /* If we still don't have a mode after all that, give up. */
 986         if (!dev_priv->panel_fixed_mode)
 987                 goto failed;
 988
 989 out:
 990         if (HAS_PCH_SPLIT(dev)) {
 991                 u32 pwm;
 992                 /* make sure PWM is enabled */
 993                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
 994                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
 995                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
 996
 997                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
 998                 pwm |= PWM_PCH_ENABLE;
 999                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1000         }
1001         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1002         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1003                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1004                 dev_priv->lid_notifier.notifier_call = NULL;
1005         }
1006         /* keep the LVDS connector */
1007         dev_priv->int_lvds_connector = connector;
1008         drm_sysfs_connector_add(connector);
1009         return;
1010
1011 failed:
1012         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1013         if (intel_encoder->ddc_bus)
1014                 intel_i2c_destroy(intel_encoder->ddc_bus);
1015         drm_connector_cleanup(connector);
1016         drm_encoder_cleanup(encoder);
1017         kfree(intel_lvds);
1018         kfree(intel_connector);
1019 }