2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
40 #include <linux/acpi.h>
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_connector {
44 struct intel_connector base;
46 struct notifier_block lid_notifier;
49 struct intel_lvds_encoder {
50 struct intel_encoder base;
56 struct intel_lvds_connector *attached_connector;
59 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
61 return container_of(encoder, struct intel_lvds_encoder, base.base);
64 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
66 return container_of(connector, struct intel_lvds_connector, base.base);
69 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
72 struct drm_device *dev = encoder->base.dev;
73 struct drm_i915_private *dev_priv = dev->dev_private;
74 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
75 enum intel_display_power_domain power_domain;
78 power_domain = intel_display_port_power_domain(encoder);
79 if (!intel_display_power_enabled(dev_priv, power_domain))
82 tmp = I915_READ(lvds_encoder->reg);
84 if (!(tmp & LVDS_PORT_EN))
88 *pipe = PORT_TO_PIPE_CPT(tmp);
90 *pipe = PORT_TO_PIPE(tmp);
95 static void intel_lvds_get_config(struct intel_encoder *encoder,
96 struct intel_crtc_config *pipe_config)
98 struct drm_device *dev = encoder->base.dev;
99 struct drm_i915_private *dev_priv = dev->dev_private;
100 u32 lvds_reg, tmp, flags = 0;
103 if (HAS_PCH_SPLIT(dev))
108 tmp = I915_READ(lvds_reg);
109 if (tmp & LVDS_HSYNC_POLARITY)
110 flags |= DRM_MODE_FLAG_NHSYNC;
112 flags |= DRM_MODE_FLAG_PHSYNC;
113 if (tmp & LVDS_VSYNC_POLARITY)
114 flags |= DRM_MODE_FLAG_NVSYNC;
116 flags |= DRM_MODE_FLAG_PVSYNC;
118 pipe_config->adjusted_mode.flags |= flags;
120 /* gen2/3 store dither state in pfit control, needs to match */
121 if (INTEL_INFO(dev)->gen < 4) {
122 tmp = I915_READ(PFIT_CONTROL);
124 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
127 dotclock = pipe_config->port_clock;
129 if (HAS_PCH_SPLIT(dev_priv->dev))
130 ironlake_check_encoder_dotclock(pipe_config, dotclock);
132 pipe_config->adjusted_mode.crtc_clock = dotclock;
135 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
137 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
138 struct drm_device *dev = encoder->base.dev;
139 struct drm_i915_private *dev_priv = dev->dev_private;
140 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
141 const struct drm_display_mode *adjusted_mode =
142 &crtc->config.adjusted_mode;
143 int pipe = crtc->pipe;
146 if (HAS_PCH_SPLIT(dev)) {
147 assert_fdi_rx_pll_disabled(dev_priv, pipe);
148 assert_shared_dpll_disabled(dev_priv,
149 intel_crtc_to_shared_dpll(crtc));
151 assert_pll_disabled(dev_priv, pipe);
154 temp = I915_READ(lvds_encoder->reg);
155 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
157 if (HAS_PCH_CPT(dev)) {
158 temp &= ~PORT_TRANS_SEL_MASK;
159 temp |= PORT_TRANS_SEL_CPT(pipe);
162 temp |= LVDS_PIPEB_SELECT;
164 temp &= ~LVDS_PIPEB_SELECT;
168 /* set the corresponsding LVDS_BORDER bit */
169 temp &= ~LVDS_BORDER_ENABLE;
170 temp |= crtc->config.gmch_pfit.lvds_border_bits;
171 /* Set the B0-B3 data pairs corresponding to whether we're going to
172 * set the DPLLs for dual-channel mode or not.
174 if (lvds_encoder->is_dual_link)
175 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
177 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
179 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
180 * appropriately here, but we need to look more thoroughly into how
181 * panels behave in the two modes. For now, let's just maintain the
182 * value we got from the BIOS.
184 temp &= ~LVDS_A3_POWER_MASK;
185 temp |= lvds_encoder->a3_power;
187 /* Set the dithering flag on LVDS as needed, note that there is no
188 * special lvds dither control bit on pch-split platforms, dithering is
189 * only controlled through the PIPECONF reg. */
190 if (INTEL_INFO(dev)->gen == 4) {
191 /* Bspec wording suggests that LVDS port dithering only exists
192 * for 18bpp panels. */
193 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
194 temp |= LVDS_ENABLE_DITHER;
196 temp &= ~LVDS_ENABLE_DITHER;
198 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
199 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
200 temp |= LVDS_HSYNC_POLARITY;
201 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
202 temp |= LVDS_VSYNC_POLARITY;
204 I915_WRITE(lvds_encoder->reg, temp);
208 * Sets the power state for the panel.
210 static void intel_enable_lvds(struct intel_encoder *encoder)
212 struct drm_device *dev = encoder->base.dev;
213 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
214 struct intel_connector *intel_connector =
215 &lvds_encoder->attached_connector->base;
216 struct drm_i915_private *dev_priv = dev->dev_private;
217 u32 ctl_reg, stat_reg;
219 if (HAS_PCH_SPLIT(dev)) {
220 ctl_reg = PCH_PP_CONTROL;
221 stat_reg = PCH_PP_STATUS;
223 ctl_reg = PP_CONTROL;
224 stat_reg = PP_STATUS;
227 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
229 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
230 POSTING_READ(lvds_encoder->reg);
231 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
232 DRM_ERROR("timed out waiting for panel to power on\n");
234 intel_panel_enable_backlight(intel_connector);
237 static void intel_disable_lvds(struct intel_encoder *encoder)
239 struct drm_device *dev = encoder->base.dev;
240 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
241 struct intel_connector *intel_connector =
242 &lvds_encoder->attached_connector->base;
243 struct drm_i915_private *dev_priv = dev->dev_private;
244 u32 ctl_reg, stat_reg;
246 if (HAS_PCH_SPLIT(dev)) {
247 ctl_reg = PCH_PP_CONTROL;
248 stat_reg = PCH_PP_STATUS;
250 ctl_reg = PP_CONTROL;
251 stat_reg = PP_STATUS;
254 intel_panel_disable_backlight(intel_connector);
256 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
257 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
258 DRM_ERROR("timed out waiting for panel to power off\n");
260 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
261 POSTING_READ(lvds_encoder->reg);
264 static enum drm_mode_status
265 intel_lvds_mode_valid(struct drm_connector *connector,
266 struct drm_display_mode *mode)
268 struct intel_connector *intel_connector = to_intel_connector(connector);
269 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
271 if (mode->hdisplay > fixed_mode->hdisplay)
273 if (mode->vdisplay > fixed_mode->vdisplay)
279 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
280 struct intel_crtc_config *pipe_config)
282 struct drm_device *dev = intel_encoder->base.dev;
283 struct intel_lvds_encoder *lvds_encoder =
284 to_lvds_encoder(&intel_encoder->base);
285 struct intel_connector *intel_connector =
286 &lvds_encoder->attached_connector->base;
287 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
288 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
289 unsigned int lvds_bpp;
291 /* Should never happen!! */
292 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
293 DRM_ERROR("Can't support LVDS on pipe A\n");
297 if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
302 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
303 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
304 pipe_config->pipe_bpp, lvds_bpp);
305 pipe_config->pipe_bpp = lvds_bpp;
309 * We have timings from the BIOS for the panel, put them in
310 * to the adjusted mode. The CRTC will be set up for this mode,
311 * with the panel scaling set up to source from the H/VDisplay
312 * of the original mode.
314 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
317 if (HAS_PCH_SPLIT(dev)) {
318 pipe_config->has_pch_encoder = true;
320 intel_pch_panel_fitting(intel_crtc, pipe_config,
321 intel_connector->panel.fitting_mode);
323 intel_gmch_panel_fitting(intel_crtc, pipe_config,
324 intel_connector->panel.fitting_mode);
329 * XXX: It would be nice to support lower refresh rates on the
330 * panels to reduce power consumption, and perhaps match the
331 * user's requested refresh rate.
338 * Detect the LVDS connection.
340 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
341 * connected and closed means disconnected. We also send hotplug events as
342 * needed, using lid status notification from the input layer.
344 static enum drm_connector_status
345 intel_lvds_detect(struct drm_connector *connector, bool force)
347 struct drm_device *dev = connector->dev;
348 enum drm_connector_status status;
350 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
351 connector->base.id, connector->name);
353 status = intel_panel_detect(dev);
354 if (status != connector_status_unknown)
357 return connector_status_connected;
361 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
363 static int intel_lvds_get_modes(struct drm_connector *connector)
365 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
366 struct drm_device *dev = connector->dev;
367 struct drm_display_mode *mode;
369 /* use cached edid if we have one */
370 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
371 return drm_add_edid_modes(connector, lvds_connector->base.edid);
373 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
377 drm_mode_probed_add(connector, mode);
381 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
383 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
387 /* The GPU hangs up on these systems if modeset is performed on LID open */
388 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
390 .callback = intel_no_modeset_on_lid_dmi_callback,
391 .ident = "Toshiba Tecra A11",
393 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
394 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
398 { } /* terminating entry */
402 * Lid events. Note the use of 'modeset':
403 * - we set it to MODESET_ON_LID_OPEN on lid close,
404 * and set it to MODESET_DONE on open
405 * - we use it as a "only once" bit (ie we ignore
406 * duplicate events where it was already properly set)
407 * - the suspend/resume paths will set it to
408 * MODESET_SUSPENDED and ignore the lid open event,
409 * because they restore the mode ("lid open").
411 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
414 struct intel_lvds_connector *lvds_connector =
415 container_of(nb, struct intel_lvds_connector, lid_notifier);
416 struct drm_connector *connector = &lvds_connector->base.base;
417 struct drm_device *dev = connector->dev;
418 struct drm_i915_private *dev_priv = dev->dev_private;
420 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
423 mutex_lock(&dev_priv->modeset_restore_lock);
424 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
427 * check and update the status of LVDS connector after receiving
428 * the LID nofication event.
430 connector->status = connector->funcs->detect(connector, false);
432 /* Don't force modeset on machines where it causes a GPU lockup */
433 if (dmi_check_system(intel_no_modeset_on_lid))
435 if (!acpi_lid_open()) {
436 /* do modeset on next lid open event */
437 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
441 if (dev_priv->modeset_restore == MODESET_DONE)
445 * Some old platform's BIOS love to wreak havoc while the lid is closed.
446 * We try to detect this here and undo any damage. The split for PCH
447 * platforms is rather conservative and a bit arbitrary expect that on
448 * those platforms VGA disabling requires actual legacy VGA I/O access,
449 * and as part of the cleanup in the hw state restore we also redisable
452 if (!HAS_PCH_SPLIT(dev)) {
453 drm_modeset_lock_all(dev);
454 intel_modeset_setup_hw_state(dev, true);
455 drm_modeset_unlock_all(dev);
458 dev_priv->modeset_restore = MODESET_DONE;
461 mutex_unlock(&dev_priv->modeset_restore_lock);
466 * intel_lvds_destroy - unregister and free LVDS structures
467 * @connector: connector to free
469 * Unregister the DDC bus for this connector then free the driver private
472 static void intel_lvds_destroy(struct drm_connector *connector)
474 struct intel_lvds_connector *lvds_connector =
475 to_lvds_connector(connector);
477 if (lvds_connector->lid_notifier.notifier_call)
478 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
480 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
481 kfree(lvds_connector->base.edid);
483 intel_panel_fini(&lvds_connector->base.panel);
485 drm_connector_cleanup(connector);
489 static int intel_lvds_set_property(struct drm_connector *connector,
490 struct drm_property *property,
493 struct intel_connector *intel_connector = to_intel_connector(connector);
494 struct drm_device *dev = connector->dev;
496 if (property == dev->mode_config.scaling_mode_property) {
497 struct drm_crtc *crtc;
499 if (value == DRM_MODE_SCALE_NONE) {
500 DRM_DEBUG_KMS("no scaling not supported\n");
504 if (intel_connector->panel.fitting_mode == value) {
505 /* the LVDS scaling property is not changed */
508 intel_connector->panel.fitting_mode = value;
510 crtc = intel_attached_encoder(connector)->base.crtc;
511 if (crtc && crtc->enabled) {
513 * If the CRTC is enabled, the display will be changed
514 * according to the new panel fitting mode.
516 intel_crtc_restore_mode(crtc);
523 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
524 .get_modes = intel_lvds_get_modes,
525 .mode_valid = intel_lvds_mode_valid,
526 .best_encoder = intel_best_encoder,
529 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
530 .dpms = intel_connector_dpms,
531 .detect = intel_lvds_detect,
532 .fill_modes = drm_helper_probe_single_connector_modes,
533 .set_property = intel_lvds_set_property,
534 .destroy = intel_lvds_destroy,
537 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
538 .destroy = intel_encoder_destroy,
541 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
543 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
547 /* These systems claim to have LVDS, but really don't */
548 static const struct dmi_system_id intel_no_lvds[] = {
550 .callback = intel_no_lvds_dmi_callback,
551 .ident = "Apple Mac Mini (Core series)",
553 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
554 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
558 .callback = intel_no_lvds_dmi_callback,
559 .ident = "Apple Mac Mini (Core 2 series)",
561 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
562 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
566 .callback = intel_no_lvds_dmi_callback,
567 .ident = "MSI IM-945GSE-A",
569 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
570 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
574 .callback = intel_no_lvds_dmi_callback,
575 .ident = "Dell Studio Hybrid",
577 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
578 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
582 .callback = intel_no_lvds_dmi_callback,
583 .ident = "Dell OptiPlex FX170",
585 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
586 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
590 .callback = intel_no_lvds_dmi_callback,
591 .ident = "AOpen Mini PC",
593 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
594 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
598 .callback = intel_no_lvds_dmi_callback,
599 .ident = "AOpen Mini PC MP915",
601 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
602 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
606 .callback = intel_no_lvds_dmi_callback,
607 .ident = "AOpen i915GMm-HFS",
609 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
610 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
614 .callback = intel_no_lvds_dmi_callback,
615 .ident = "AOpen i45GMx-I",
617 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
618 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
622 .callback = intel_no_lvds_dmi_callback,
623 .ident = "Aopen i945GTt-VFA",
625 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
629 .callback = intel_no_lvds_dmi_callback,
630 .ident = "Clientron U800",
632 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
633 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
637 .callback = intel_no_lvds_dmi_callback,
638 .ident = "Clientron E830",
640 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
641 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
645 .callback = intel_no_lvds_dmi_callback,
646 .ident = "Asus EeeBox PC EB1007",
648 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
649 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
653 .callback = intel_no_lvds_dmi_callback,
654 .ident = "Asus AT5NM10T-I",
656 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
657 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
661 .callback = intel_no_lvds_dmi_callback,
662 .ident = "Hewlett-Packard HP t5740",
664 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
665 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
669 .callback = intel_no_lvds_dmi_callback,
670 .ident = "Hewlett-Packard t5745",
672 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
673 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
677 .callback = intel_no_lvds_dmi_callback,
678 .ident = "Hewlett-Packard st5747",
680 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
681 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
685 .callback = intel_no_lvds_dmi_callback,
686 .ident = "MSI Wind Box DC500",
688 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
689 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
693 .callback = intel_no_lvds_dmi_callback,
694 .ident = "Gigabyte GA-D525TUD",
696 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
697 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
701 .callback = intel_no_lvds_dmi_callback,
702 .ident = "Supermicro X7SPA-H",
704 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
705 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
709 .callback = intel_no_lvds_dmi_callback,
710 .ident = "Fujitsu Esprimo Q900",
712 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
713 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
717 .callback = intel_no_lvds_dmi_callback,
718 .ident = "Intel D410PT",
720 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
721 DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
725 .callback = intel_no_lvds_dmi_callback,
726 .ident = "Intel D425KT",
728 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
729 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
733 .callback = intel_no_lvds_dmi_callback,
734 .ident = "Intel D510MO",
736 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
737 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
741 .callback = intel_no_lvds_dmi_callback,
742 .ident = "Intel D525MW",
744 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
745 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
749 { } /* terminating entry */
753 * Enumerate the child dev array parsed from VBT to check whether
754 * the LVDS is present.
755 * If it is present, return 1.
756 * If it is not present, return false.
757 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
759 static bool lvds_is_present_in_vbt(struct drm_device *dev,
762 struct drm_i915_private *dev_priv = dev->dev_private;
765 if (!dev_priv->vbt.child_dev_num)
768 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
769 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
770 struct old_child_dev_config *child = &uchild->old;
772 /* If the device type is not LFP, continue.
773 * We have to check both the new identifiers as well as the
774 * old for compatibility with some BIOSes.
776 if (child->device_type != DEVICE_TYPE_INT_LFP &&
777 child->device_type != DEVICE_TYPE_LFP)
780 if (intel_gmbus_is_port_valid(child->i2c_pin))
781 *i2c_pin = child->i2c_pin;
783 /* However, we cannot trust the BIOS writers to populate
784 * the VBT correctly. Since LVDS requires additional
785 * information from AIM blocks, a non-zero addin offset is
786 * a good indicator that the LVDS is actually present.
788 if (child->addin_offset)
791 /* But even then some BIOS writers perform some black magic
792 * and instantiate the device without reference to any
793 * additional data. Trust that if the VBT was written into
794 * the OpRegion then they have validated the LVDS's existence.
796 if (dev_priv->opregion.vbt)
803 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
805 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
809 static const struct dmi_system_id intel_dual_link_lvds[] = {
811 .callback = intel_dual_link_lvds_callback,
812 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
814 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
815 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
818 { } /* terminating entry */
821 bool intel_is_dual_link_lvds(struct drm_device *dev)
823 struct intel_encoder *encoder;
824 struct intel_lvds_encoder *lvds_encoder;
826 for_each_intel_encoder(dev, encoder) {
827 if (encoder->type == INTEL_OUTPUT_LVDS) {
828 lvds_encoder = to_lvds_encoder(&encoder->base);
830 return lvds_encoder->is_dual_link;
837 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
839 struct drm_device *dev = lvds_encoder->base.base.dev;
841 struct drm_i915_private *dev_priv = dev->dev_private;
843 /* use the module option value if specified */
844 if (i915.lvds_channel_mode > 0)
845 return i915.lvds_channel_mode == 2;
847 if (dmi_check_system(intel_dual_link_lvds))
850 /* BIOS should set the proper LVDS register value at boot, but
851 * in reality, it doesn't set the value when the lid is closed;
852 * we need to check "the value to be set" in VBT when LVDS
853 * register is uninitialized.
855 val = I915_READ(lvds_encoder->reg);
856 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
857 val = dev_priv->vbt.bios_lvds_val;
859 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
862 static bool intel_lvds_supported(struct drm_device *dev)
864 /* With the introduction of the PCH we gained a dedicated
865 * LVDS presence pin, use it. */
866 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
869 /* Otherwise LVDS was only attached to mobile products,
870 * except for the inglorious 830gm */
871 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
878 * intel_lvds_init - setup LVDS connectors on this device
881 * Create the connector, register the LVDS DDC bus, and try to figure out what
882 * modes we can display on the LVDS panel (if present).
884 void intel_lvds_init(struct drm_device *dev)
886 struct drm_i915_private *dev_priv = dev->dev_private;
887 struct intel_lvds_encoder *lvds_encoder;
888 struct intel_encoder *intel_encoder;
889 struct intel_lvds_connector *lvds_connector;
890 struct intel_connector *intel_connector;
891 struct drm_connector *connector;
892 struct drm_encoder *encoder;
893 struct drm_display_mode *scan; /* *modes, *bios_mode; */
894 struct drm_display_mode *fixed_mode = NULL;
895 struct drm_display_mode *downclock_mode = NULL;
897 struct drm_crtc *crtc;
903 * Unlock registers and just leave them unlocked. Do this before
904 * checking quirk lists to avoid bogus WARNINGs.
906 if (HAS_PCH_SPLIT(dev)) {
907 I915_WRITE(PCH_PP_CONTROL,
908 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
910 I915_WRITE(PP_CONTROL,
911 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
913 if (!intel_lvds_supported(dev))
916 /* Skip init on machines we know falsely report LVDS */
917 if (dmi_check_system(intel_no_lvds))
920 pin = GMBUS_PORT_PANEL;
921 if (!lvds_is_present_in_vbt(dev, &pin)) {
922 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
926 if (HAS_PCH_SPLIT(dev)) {
927 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
929 if (dev_priv->vbt.edp_support) {
930 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
935 lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
939 lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
940 if (!lvds_connector) {
945 lvds_encoder->attached_connector = lvds_connector;
947 intel_encoder = &lvds_encoder->base;
948 encoder = &intel_encoder->base;
949 intel_connector = &lvds_connector->base;
950 connector = &intel_connector->base;
951 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
952 DRM_MODE_CONNECTOR_LVDS);
954 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
955 DRM_MODE_ENCODER_LVDS);
957 intel_encoder->enable = intel_enable_lvds;
958 intel_encoder->pre_enable = intel_pre_enable_lvds;
959 intel_encoder->compute_config = intel_lvds_compute_config;
960 intel_encoder->disable = intel_disable_lvds;
961 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
962 intel_encoder->get_config = intel_lvds_get_config;
963 intel_connector->get_hw_state = intel_connector_get_hw_state;
964 intel_connector->unregister = intel_connector_unregister;
966 intel_connector_attach_encoder(intel_connector, intel_encoder);
967 intel_encoder->type = INTEL_OUTPUT_LVDS;
969 intel_encoder->cloneable = 0;
970 if (HAS_PCH_SPLIT(dev))
971 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
972 else if (IS_GEN4(dev))
973 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
975 intel_encoder->crtc_mask = (1 << 1);
977 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
978 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
979 connector->interlace_allowed = false;
980 connector->doublescan_allowed = false;
982 if (HAS_PCH_SPLIT(dev)) {
983 lvds_encoder->reg = PCH_LVDS;
985 lvds_encoder->reg = LVDS;
988 /* create the scaling mode property */
989 drm_mode_create_scaling_mode_property(dev);
990 drm_object_attach_property(&connector->base,
991 dev->mode_config.scaling_mode_property,
992 DRM_MODE_SCALE_ASPECT);
993 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
996 * 1) check for EDID on DDC
997 * 2) check for VBT data
998 * 3) check to see if LVDS is already on
999 * if none of the above, no panel
1000 * 4) make sure lid is open
1001 * if closed, act like it's not there for now
1005 * Attempt to get the fixed panel mode from DDC. Assume that the
1006 * preferred mode is the right one.
1008 mutex_lock(&dev->mode_config.mutex);
1009 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1011 if (drm_add_edid_modes(connector, edid)) {
1012 drm_mode_connector_update_edid_property(connector,
1016 edid = ERR_PTR(-EINVAL);
1019 edid = ERR_PTR(-ENOENT);
1021 lvds_connector->base.edid = edid;
1023 if (IS_ERR_OR_NULL(edid)) {
1024 /* Didn't get an EDID, so
1025 * Set wide sync ranges so we get all modes
1026 * handed to valid_mode for checking
1028 connector->display_info.min_vfreq = 0;
1029 connector->display_info.max_vfreq = 200;
1030 connector->display_info.min_hfreq = 0;
1031 connector->display_info.max_hfreq = 200;
1034 list_for_each_entry(scan, &connector->probed_modes, head) {
1035 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1036 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1037 drm_mode_debug_printmodeline(scan);
1039 fixed_mode = drm_mode_duplicate(dev, scan);
1042 intel_find_panel_downclock(dev,
1043 fixed_mode, connector);
1044 if (downclock_mode != NULL &&
1045 i915.lvds_downclock) {
1046 /* We found the downclock for LVDS. */
1047 dev_priv->lvds_downclock_avail = true;
1048 dev_priv->lvds_downclock =
1049 downclock_mode->clock;
1050 DRM_DEBUG_KMS("LVDS downclock is found"
1051 " in EDID. Normal clock %dKhz, "
1052 "downclock %dKhz\n",
1054 dev_priv->lvds_downclock);
1061 /* Failed to get EDID, what about VBT? */
1062 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1063 DRM_DEBUG_KMS("using mode from VBT: ");
1064 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1066 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1068 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1074 * If we didn't get EDID, try checking if the panel is already turned
1075 * on. If so, assume that whatever is currently programmed is the
1079 /* Ironlake: FIXME if still fail, not try pipe mode now */
1080 if (HAS_PCH_SPLIT(dev))
1083 lvds = I915_READ(LVDS);
1084 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1085 crtc = intel_get_crtc_for_pipe(dev, pipe);
1087 if (crtc && (lvds & LVDS_PORT_EN)) {
1088 fixed_mode = intel_crtc_mode_get(dev, crtc);
1090 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1091 drm_mode_debug_printmodeline(fixed_mode);
1092 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1097 /* If we still don't have a mode after all that, give up. */
1102 mutex_unlock(&dev->mode_config.mutex);
1104 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1105 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1106 lvds_encoder->is_dual_link ? "dual" : "single");
1108 lvds_encoder->a3_power = I915_READ(lvds_encoder->reg) &
1111 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1112 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1113 DRM_DEBUG_KMS("lid notifier registration failed\n");
1114 lvds_connector->lid_notifier.notifier_call = NULL;
1116 drm_connector_register(connector);
1118 intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1119 intel_panel_setup_backlight(connector);
1124 mutex_unlock(&dev->mode_config.mutex);
1126 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1127 drm_connector_cleanup(connector);
1128 drm_encoder_cleanup(encoder);
1129 kfree(lvds_encoder);
1130 kfree(lvds_connector);