2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
40 #include <linux/acpi.h>
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_connector {
44 struct intel_connector base;
46 struct notifier_block lid_notifier;
49 struct intel_lvds_encoder {
50 struct intel_encoder base;
55 struct intel_lvds_connector *attached_connector;
58 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
60 return container_of(encoder, struct intel_lvds_encoder, base.base);
63 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
65 return container_of(connector, struct intel_lvds_connector, base.base);
68 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
71 struct drm_device *dev = encoder->base.dev;
72 struct drm_i915_private *dev_priv = dev->dev_private;
73 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
76 tmp = I915_READ(lvds_encoder->reg);
78 if (!(tmp & LVDS_PORT_EN))
82 *pipe = PORT_TO_PIPE_CPT(tmp);
84 *pipe = PORT_TO_PIPE(tmp);
89 static void intel_lvds_get_config(struct intel_encoder *encoder,
90 struct intel_crtc_config *pipe_config)
92 struct drm_device *dev = encoder->base.dev;
93 struct drm_i915_private *dev_priv = dev->dev_private;
94 u32 lvds_reg, tmp, flags = 0;
96 if (HAS_PCH_SPLIT(dev))
101 tmp = I915_READ(lvds_reg);
102 if (tmp & LVDS_HSYNC_POLARITY)
103 flags |= DRM_MODE_FLAG_NHSYNC;
105 flags |= DRM_MODE_FLAG_PHSYNC;
106 if (tmp & LVDS_VSYNC_POLARITY)
107 flags |= DRM_MODE_FLAG_NVSYNC;
109 flags |= DRM_MODE_FLAG_PVSYNC;
111 pipe_config->adjusted_mode.flags |= flags;
113 /* gen2/3 store dither state in pfit control, needs to match */
114 if (INTEL_INFO(dev)->gen < 4) {
115 tmp = I915_READ(PFIT_CONTROL);
117 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
121 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
122 * This is an exception to the general rule that mode_set doesn't turn
125 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
127 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
128 struct drm_device *dev = encoder->base.dev;
129 struct drm_i915_private *dev_priv = dev->dev_private;
130 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
131 const struct drm_display_mode *adjusted_mode =
132 &crtc->config.adjusted_mode;
133 int pipe = crtc->pipe;
136 if (HAS_PCH_SPLIT(dev)) {
137 assert_fdi_rx_pll_disabled(dev_priv, pipe);
138 assert_shared_dpll_disabled(dev_priv,
139 intel_crtc_to_shared_dpll(crtc));
141 assert_pll_disabled(dev_priv, pipe);
144 temp = I915_READ(lvds_encoder->reg);
145 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
147 if (HAS_PCH_CPT(dev)) {
148 temp &= ~PORT_TRANS_SEL_MASK;
149 temp |= PORT_TRANS_SEL_CPT(pipe);
152 temp |= LVDS_PIPEB_SELECT;
154 temp &= ~LVDS_PIPEB_SELECT;
158 /* set the corresponsding LVDS_BORDER bit */
159 temp &= ~LVDS_BORDER_ENABLE;
160 temp |= crtc->config.gmch_pfit.lvds_border_bits;
161 /* Set the B0-B3 data pairs corresponding to whether we're going to
162 * set the DPLLs for dual-channel mode or not.
164 if (lvds_encoder->is_dual_link)
165 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
167 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
169 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
170 * appropriately here, but we need to look more thoroughly into how
171 * panels behave in the two modes.
174 /* Set the dithering flag on LVDS as needed, note that there is no
175 * special lvds dither control bit on pch-split platforms, dithering is
176 * only controlled through the PIPECONF reg. */
177 if (INTEL_INFO(dev)->gen == 4) {
178 /* Bspec wording suggests that LVDS port dithering only exists
179 * for 18bpp panels. */
180 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
181 temp |= LVDS_ENABLE_DITHER;
183 temp &= ~LVDS_ENABLE_DITHER;
185 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
186 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
187 temp |= LVDS_HSYNC_POLARITY;
188 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
189 temp |= LVDS_VSYNC_POLARITY;
191 I915_WRITE(lvds_encoder->reg, temp);
195 * Sets the power state for the panel.
197 static void intel_enable_lvds(struct intel_encoder *encoder)
199 struct drm_device *dev = encoder->base.dev;
200 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
201 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
202 struct drm_i915_private *dev_priv = dev->dev_private;
203 u32 ctl_reg, stat_reg;
205 if (HAS_PCH_SPLIT(dev)) {
206 ctl_reg = PCH_PP_CONTROL;
207 stat_reg = PCH_PP_STATUS;
209 ctl_reg = PP_CONTROL;
210 stat_reg = PP_STATUS;
213 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
215 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
216 POSTING_READ(lvds_encoder->reg);
217 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
218 DRM_ERROR("timed out waiting for panel to power on\n");
220 intel_panel_enable_backlight(dev, intel_crtc->pipe);
223 static void intel_disable_lvds(struct intel_encoder *encoder)
225 struct drm_device *dev = encoder->base.dev;
226 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
227 struct drm_i915_private *dev_priv = dev->dev_private;
228 u32 ctl_reg, stat_reg;
230 if (HAS_PCH_SPLIT(dev)) {
231 ctl_reg = PCH_PP_CONTROL;
232 stat_reg = PCH_PP_STATUS;
234 ctl_reg = PP_CONTROL;
235 stat_reg = PP_STATUS;
238 intel_panel_disable_backlight(dev);
240 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
241 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
242 DRM_ERROR("timed out waiting for panel to power off\n");
244 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
245 POSTING_READ(lvds_encoder->reg);
248 static int intel_lvds_mode_valid(struct drm_connector *connector,
249 struct drm_display_mode *mode)
251 struct intel_connector *intel_connector = to_intel_connector(connector);
252 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
254 if (mode->hdisplay > fixed_mode->hdisplay)
256 if (mode->vdisplay > fixed_mode->vdisplay)
262 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
263 struct intel_crtc_config *pipe_config)
265 struct drm_device *dev = intel_encoder->base.dev;
266 struct drm_i915_private *dev_priv = dev->dev_private;
267 struct intel_lvds_encoder *lvds_encoder =
268 to_lvds_encoder(&intel_encoder->base);
269 struct intel_connector *intel_connector =
270 &lvds_encoder->attached_connector->base;
271 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
272 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
273 unsigned int lvds_bpp;
275 /* Should never happen!! */
276 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
277 DRM_ERROR("Can't support LVDS on pipe A\n");
281 if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
287 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
288 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
289 pipe_config->pipe_bpp, lvds_bpp);
290 pipe_config->pipe_bpp = lvds_bpp;
294 * We have timings from the BIOS for the panel, put them in
295 * to the adjusted mode. The CRTC will be set up for this mode,
296 * with the panel scaling set up to source from the H/VDisplay
297 * of the original mode.
299 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
302 if (HAS_PCH_SPLIT(dev)) {
303 pipe_config->has_pch_encoder = true;
305 intel_pch_panel_fitting(intel_crtc, pipe_config,
306 intel_connector->panel.fitting_mode);
308 intel_gmch_panel_fitting(intel_crtc, pipe_config,
309 intel_connector->panel.fitting_mode);
314 * XXX: It would be nice to support lower refresh rates on the
315 * panels to reduce power consumption, and perhaps match the
316 * user's requested refresh rate.
322 static void intel_lvds_mode_set(struct intel_encoder *encoder)
325 * We don't do anything here, the LVDS port is fully set up in the pre
326 * enable hook - the ordering constraints for enabling the lvds port vs.
327 * enabling the display pll are too strict.
332 * Detect the LVDS connection.
334 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
335 * connected and closed means disconnected. We also send hotplug events as
336 * needed, using lid status notification from the input layer.
338 static enum drm_connector_status
339 intel_lvds_detect(struct drm_connector *connector, bool force)
341 struct drm_device *dev = connector->dev;
342 enum drm_connector_status status;
344 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
345 connector->base.id, drm_get_connector_name(connector));
347 status = intel_panel_detect(dev);
348 if (status != connector_status_unknown)
351 return connector_status_connected;
355 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
357 static int intel_lvds_get_modes(struct drm_connector *connector)
359 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
360 struct drm_device *dev = connector->dev;
361 struct drm_display_mode *mode;
363 /* use cached edid if we have one */
364 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
365 return drm_add_edid_modes(connector, lvds_connector->base.edid);
367 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
371 drm_mode_probed_add(connector, mode);
375 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
377 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
381 /* The GPU hangs up on these systems if modeset is performed on LID open */
382 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
384 .callback = intel_no_modeset_on_lid_dmi_callback,
385 .ident = "Toshiba Tecra A11",
387 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
388 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
392 { } /* terminating entry */
396 * Lid events. Note the use of 'modeset':
397 * - we set it to MODESET_ON_LID_OPEN on lid close,
398 * and set it to MODESET_DONE on open
399 * - we use it as a "only once" bit (ie we ignore
400 * duplicate events where it was already properly set)
401 * - the suspend/resume paths will set it to
402 * MODESET_SUSPENDED and ignore the lid open event,
403 * because they restore the mode ("lid open").
405 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
408 struct intel_lvds_connector *lvds_connector =
409 container_of(nb, struct intel_lvds_connector, lid_notifier);
410 struct drm_connector *connector = &lvds_connector->base.base;
411 struct drm_device *dev = connector->dev;
412 struct drm_i915_private *dev_priv = dev->dev_private;
414 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
417 mutex_lock(&dev_priv->modeset_restore_lock);
418 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
421 * check and update the status of LVDS connector after receiving
422 * the LID nofication event.
424 connector->status = connector->funcs->detect(connector, false);
426 /* Don't force modeset on machines where it causes a GPU lockup */
427 if (dmi_check_system(intel_no_modeset_on_lid))
429 if (!acpi_lid_open()) {
430 /* do modeset on next lid open event */
431 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
435 if (dev_priv->modeset_restore == MODESET_DONE)
438 drm_modeset_lock_all(dev);
439 intel_modeset_setup_hw_state(dev, true);
440 drm_modeset_unlock_all(dev);
442 dev_priv->modeset_restore = MODESET_DONE;
445 mutex_unlock(&dev_priv->modeset_restore_lock);
450 * intel_lvds_destroy - unregister and free LVDS structures
451 * @connector: connector to free
453 * Unregister the DDC bus for this connector then free the driver private
456 static void intel_lvds_destroy(struct drm_connector *connector)
458 struct intel_lvds_connector *lvds_connector =
459 to_lvds_connector(connector);
461 if (lvds_connector->lid_notifier.notifier_call)
462 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
464 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
465 kfree(lvds_connector->base.edid);
467 intel_panel_fini(&lvds_connector->base.panel);
469 drm_sysfs_connector_remove(connector);
470 drm_connector_cleanup(connector);
474 static int intel_lvds_set_property(struct drm_connector *connector,
475 struct drm_property *property,
478 struct intel_connector *intel_connector = to_intel_connector(connector);
479 struct drm_device *dev = connector->dev;
481 if (property == dev->mode_config.scaling_mode_property) {
482 struct drm_crtc *crtc;
484 if (value == DRM_MODE_SCALE_NONE) {
485 DRM_DEBUG_KMS("no scaling not supported\n");
489 if (intel_connector->panel.fitting_mode == value) {
490 /* the LVDS scaling property is not changed */
493 intel_connector->panel.fitting_mode = value;
495 crtc = intel_attached_encoder(connector)->base.crtc;
496 if (crtc && crtc->enabled) {
498 * If the CRTC is enabled, the display will be changed
499 * according to the new panel fitting mode.
501 intel_crtc_restore_mode(crtc);
508 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
509 .get_modes = intel_lvds_get_modes,
510 .mode_valid = intel_lvds_mode_valid,
511 .best_encoder = intel_best_encoder,
514 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
515 .dpms = intel_connector_dpms,
516 .detect = intel_lvds_detect,
517 .fill_modes = drm_helper_probe_single_connector_modes,
518 .set_property = intel_lvds_set_property,
519 .destroy = intel_lvds_destroy,
522 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
523 .destroy = intel_encoder_destroy,
526 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
528 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
532 /* These systems claim to have LVDS, but really don't */
533 static const struct dmi_system_id intel_no_lvds[] = {
535 .callback = intel_no_lvds_dmi_callback,
536 .ident = "Apple Mac Mini (Core series)",
538 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
539 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
543 .callback = intel_no_lvds_dmi_callback,
544 .ident = "Apple Mac Mini (Core 2 series)",
546 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
547 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
551 .callback = intel_no_lvds_dmi_callback,
552 .ident = "MSI IM-945GSE-A",
554 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
555 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
559 .callback = intel_no_lvds_dmi_callback,
560 .ident = "Dell Studio Hybrid",
562 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
563 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
567 .callback = intel_no_lvds_dmi_callback,
568 .ident = "Dell OptiPlex FX170",
570 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
571 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
575 .callback = intel_no_lvds_dmi_callback,
576 .ident = "AOpen Mini PC",
578 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
579 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
583 .callback = intel_no_lvds_dmi_callback,
584 .ident = "AOpen Mini PC MP915",
586 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
587 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
591 .callback = intel_no_lvds_dmi_callback,
592 .ident = "AOpen i915GMm-HFS",
594 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
595 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
599 .callback = intel_no_lvds_dmi_callback,
600 .ident = "AOpen i45GMx-I",
602 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
603 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
607 .callback = intel_no_lvds_dmi_callback,
608 .ident = "Aopen i945GTt-VFA",
610 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
614 .callback = intel_no_lvds_dmi_callback,
615 .ident = "Clientron U800",
617 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
618 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
622 .callback = intel_no_lvds_dmi_callback,
623 .ident = "Clientron E830",
625 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
626 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
630 .callback = intel_no_lvds_dmi_callback,
631 .ident = "Asus EeeBox PC EB1007",
633 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
634 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
638 .callback = intel_no_lvds_dmi_callback,
639 .ident = "Asus AT5NM10T-I",
641 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
642 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
646 .callback = intel_no_lvds_dmi_callback,
647 .ident = "Hewlett-Packard HP t5740",
649 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
650 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
654 .callback = intel_no_lvds_dmi_callback,
655 .ident = "Hewlett-Packard t5745",
657 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
658 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
662 .callback = intel_no_lvds_dmi_callback,
663 .ident = "Hewlett-Packard st5747",
665 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
666 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
670 .callback = intel_no_lvds_dmi_callback,
671 .ident = "MSI Wind Box DC500",
673 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
674 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
678 .callback = intel_no_lvds_dmi_callback,
679 .ident = "Gigabyte GA-D525TUD",
681 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
682 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
686 .callback = intel_no_lvds_dmi_callback,
687 .ident = "Supermicro X7SPA-H",
689 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
690 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
694 .callback = intel_no_lvds_dmi_callback,
695 .ident = "Fujitsu Esprimo Q900",
697 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
698 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
702 .callback = intel_no_lvds_dmi_callback,
703 .ident = "Intel D510MO",
705 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
706 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
710 .callback = intel_no_lvds_dmi_callback,
711 .ident = "Intel D525MW",
713 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
714 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
718 { } /* terminating entry */
722 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
724 * @connector: LVDS connector
726 * Find the reduced downclock for LVDS in EDID.
728 static void intel_find_lvds_downclock(struct drm_device *dev,
729 struct drm_display_mode *fixed_mode,
730 struct drm_connector *connector)
732 struct drm_i915_private *dev_priv = dev->dev_private;
733 struct drm_display_mode *scan;
736 temp_downclock = fixed_mode->clock;
737 list_for_each_entry(scan, &connector->probed_modes, head) {
739 * If one mode has the same resolution with the fixed_panel
740 * mode while they have the different refresh rate, it means
741 * that the reduced downclock is found for the LVDS. In such
742 * case we can set the different FPx0/1 to dynamically select
743 * between low and high frequency.
745 if (scan->hdisplay == fixed_mode->hdisplay &&
746 scan->hsync_start == fixed_mode->hsync_start &&
747 scan->hsync_end == fixed_mode->hsync_end &&
748 scan->htotal == fixed_mode->htotal &&
749 scan->vdisplay == fixed_mode->vdisplay &&
750 scan->vsync_start == fixed_mode->vsync_start &&
751 scan->vsync_end == fixed_mode->vsync_end &&
752 scan->vtotal == fixed_mode->vtotal) {
753 if (scan->clock < temp_downclock) {
755 * The downclock is already found. But we
756 * expect to find the lower downclock.
758 temp_downclock = scan->clock;
762 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
763 /* We found the downclock for LVDS. */
764 dev_priv->lvds_downclock_avail = 1;
765 dev_priv->lvds_downclock = temp_downclock;
766 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
767 "Normal clock %dKhz, downclock %dKhz\n",
768 fixed_mode->clock, temp_downclock);
773 * Enumerate the child dev array parsed from VBT to check whether
774 * the LVDS is present.
775 * If it is present, return 1.
776 * If it is not present, return false.
777 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
779 static bool lvds_is_present_in_vbt(struct drm_device *dev,
782 struct drm_i915_private *dev_priv = dev->dev_private;
785 if (!dev_priv->vbt.child_dev_num)
788 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
789 struct child_device_config *child = dev_priv->vbt.child_dev + i;
791 /* If the device type is not LFP, continue.
792 * We have to check both the new identifiers as well as the
793 * old for compatibility with some BIOSes.
795 if (child->device_type != DEVICE_TYPE_INT_LFP &&
796 child->device_type != DEVICE_TYPE_LFP)
799 if (intel_gmbus_is_port_valid(child->i2c_pin))
800 *i2c_pin = child->i2c_pin;
802 /* However, we cannot trust the BIOS writers to populate
803 * the VBT correctly. Since LVDS requires additional
804 * information from AIM blocks, a non-zero addin offset is
805 * a good indicator that the LVDS is actually present.
807 if (child->addin_offset)
810 /* But even then some BIOS writers perform some black magic
811 * and instantiate the device without reference to any
812 * additional data. Trust that if the VBT was written into
813 * the OpRegion then they have validated the LVDS's existence.
815 if (dev_priv->opregion.vbt)
822 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
824 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
828 static const struct dmi_system_id intel_dual_link_lvds[] = {
830 .callback = intel_dual_link_lvds_callback,
831 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
833 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
834 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
837 { } /* terminating entry */
840 bool intel_is_dual_link_lvds(struct drm_device *dev)
842 struct intel_encoder *encoder;
843 struct intel_lvds_encoder *lvds_encoder;
845 list_for_each_entry(encoder, &dev->mode_config.encoder_list,
847 if (encoder->type == INTEL_OUTPUT_LVDS) {
848 lvds_encoder = to_lvds_encoder(&encoder->base);
850 return lvds_encoder->is_dual_link;
857 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
859 struct drm_device *dev = lvds_encoder->base.base.dev;
861 struct drm_i915_private *dev_priv = dev->dev_private;
863 /* use the module option value if specified */
864 if (i915_lvds_channel_mode > 0)
865 return i915_lvds_channel_mode == 2;
867 if (dmi_check_system(intel_dual_link_lvds))
870 /* BIOS should set the proper LVDS register value at boot, but
871 * in reality, it doesn't set the value when the lid is closed;
872 * we need to check "the value to be set" in VBT when LVDS
873 * register is uninitialized.
875 val = I915_READ(lvds_encoder->reg);
876 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
877 val = dev_priv->vbt.bios_lvds_val;
879 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
882 static bool intel_lvds_supported(struct drm_device *dev)
884 /* With the introduction of the PCH we gained a dedicated
885 * LVDS presence pin, use it. */
886 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
889 /* Otherwise LVDS was only attached to mobile products,
890 * except for the inglorious 830gm */
891 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
898 * intel_lvds_init - setup LVDS connectors on this device
901 * Create the connector, register the LVDS DDC bus, and try to figure out what
902 * modes we can display on the LVDS panel (if present).
904 void intel_lvds_init(struct drm_device *dev)
906 struct drm_i915_private *dev_priv = dev->dev_private;
907 struct intel_lvds_encoder *lvds_encoder;
908 struct intel_encoder *intel_encoder;
909 struct intel_lvds_connector *lvds_connector;
910 struct intel_connector *intel_connector;
911 struct drm_connector *connector;
912 struct drm_encoder *encoder;
913 struct drm_display_mode *scan; /* *modes, *bios_mode; */
914 struct drm_display_mode *fixed_mode = NULL;
916 struct drm_crtc *crtc;
921 if (!intel_lvds_supported(dev))
924 /* Skip init on machines we know falsely report LVDS */
925 if (dmi_check_system(intel_no_lvds))
928 pin = GMBUS_PORT_PANEL;
929 if (!lvds_is_present_in_vbt(dev, &pin)) {
930 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
934 if (HAS_PCH_SPLIT(dev)) {
935 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
937 if (dev_priv->vbt.edp_support) {
938 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
943 lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
947 lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
948 if (!lvds_connector) {
953 lvds_encoder->attached_connector = lvds_connector;
955 intel_encoder = &lvds_encoder->base;
956 encoder = &intel_encoder->base;
957 intel_connector = &lvds_connector->base;
958 connector = &intel_connector->base;
959 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
960 DRM_MODE_CONNECTOR_LVDS);
962 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
963 DRM_MODE_ENCODER_LVDS);
965 intel_encoder->enable = intel_enable_lvds;
966 intel_encoder->pre_enable = intel_pre_enable_lvds;
967 intel_encoder->compute_config = intel_lvds_compute_config;
968 intel_encoder->mode_set = intel_lvds_mode_set;
969 intel_encoder->disable = intel_disable_lvds;
970 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
971 intel_encoder->get_config = intel_lvds_get_config;
972 intel_connector->get_hw_state = intel_connector_get_hw_state;
974 intel_connector_attach_encoder(intel_connector, intel_encoder);
975 intel_encoder->type = INTEL_OUTPUT_LVDS;
977 intel_encoder->cloneable = false;
978 if (HAS_PCH_SPLIT(dev))
979 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
980 else if (IS_GEN4(dev))
981 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
983 intel_encoder->crtc_mask = (1 << 1);
985 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
986 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
987 connector->interlace_allowed = false;
988 connector->doublescan_allowed = false;
990 if (HAS_PCH_SPLIT(dev)) {
991 lvds_encoder->reg = PCH_LVDS;
993 lvds_encoder->reg = LVDS;
996 /* create the scaling mode property */
997 drm_mode_create_scaling_mode_property(dev);
998 drm_object_attach_property(&connector->base,
999 dev->mode_config.scaling_mode_property,
1000 DRM_MODE_SCALE_ASPECT);
1001 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1004 * 1) check for EDID on DDC
1005 * 2) check for VBT data
1006 * 3) check to see if LVDS is already on
1007 * if none of the above, no panel
1008 * 4) make sure lid is open
1009 * if closed, act like it's not there for now
1013 * Attempt to get the fixed panel mode from DDC. Assume that the
1014 * preferred mode is the right one.
1016 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1018 if (drm_add_edid_modes(connector, edid)) {
1019 drm_mode_connector_update_edid_property(connector,
1023 edid = ERR_PTR(-EINVAL);
1026 edid = ERR_PTR(-ENOENT);
1028 lvds_connector->base.edid = edid;
1030 if (IS_ERR_OR_NULL(edid)) {
1031 /* Didn't get an EDID, so
1032 * Set wide sync ranges so we get all modes
1033 * handed to valid_mode for checking
1035 connector->display_info.min_vfreq = 0;
1036 connector->display_info.max_vfreq = 200;
1037 connector->display_info.min_hfreq = 0;
1038 connector->display_info.max_hfreq = 200;
1041 list_for_each_entry(scan, &connector->probed_modes, head) {
1042 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1043 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1044 drm_mode_debug_printmodeline(scan);
1046 fixed_mode = drm_mode_duplicate(dev, scan);
1048 intel_find_lvds_downclock(dev, fixed_mode,
1055 /* Failed to get EDID, what about VBT? */
1056 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1057 DRM_DEBUG_KMS("using mode from VBT: ");
1058 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1060 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1062 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1068 * If we didn't get EDID, try checking if the panel is already turned
1069 * on. If so, assume that whatever is currently programmed is the
1073 /* Ironlake: FIXME if still fail, not try pipe mode now */
1074 if (HAS_PCH_SPLIT(dev))
1077 lvds = I915_READ(LVDS);
1078 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1079 crtc = intel_get_crtc_for_pipe(dev, pipe);
1081 if (crtc && (lvds & LVDS_PORT_EN)) {
1082 fixed_mode = intel_crtc_mode_get(dev, crtc);
1084 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1085 drm_mode_debug_printmodeline(fixed_mode);
1086 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1091 /* If we still don't have a mode after all that, give up. */
1096 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1097 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1098 lvds_encoder->is_dual_link ? "dual" : "single");
1101 * Unlock registers and just
1102 * leave them unlocked
1104 if (HAS_PCH_SPLIT(dev)) {
1105 I915_WRITE(PCH_PP_CONTROL,
1106 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1108 I915_WRITE(PP_CONTROL,
1109 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1111 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1112 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1113 DRM_DEBUG_KMS("lid notifier registration failed\n");
1114 lvds_connector->lid_notifier.notifier_call = NULL;
1116 drm_sysfs_connector_add(connector);
1118 intel_panel_init(&intel_connector->panel, fixed_mode);
1119 intel_panel_setup_backlight(connector);
1124 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1125 drm_connector_cleanup(connector);
1126 drm_encoder_cleanup(encoder);
1128 drm_mode_destroy(dev, fixed_mode);
1129 kfree(lvds_encoder);
1130 kfree(lvds_connector);