drivers/gpu/drm/i915/intel_panel.c

   1 /*
   2  * Copyright © 2006-2010 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  *      Chris Wilson <chris@chris-wilson.co.uk>
  29  */
  30
  31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  32
  33 #include <linux/kernel.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/pwm.h>
  36 #include "intel_drv.h"
  37
  38 #define CRC_PMIC_PWM_PERIOD_NS  21333
  39
  40 void
  41 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
  42                        struct drm_display_mode *adjusted_mode)
  43 {
  44         drm_mode_copy(adjusted_mode, fixed_mode);
  45
  46         drm_mode_set_crtcinfo(adjusted_mode, 0);
  47 }
  48
  49 /**
  50  * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
  51  * @dev: drm device
  52  * @fixed_mode : panel native mode
  53  * @connector: LVDS/eDP connector
  54  *
  55  * Return downclock_avail
  56  * Find the reduced downclock for LVDS/eDP in EDID.
  57  */
  58 struct drm_display_mode *
  59 intel_find_panel_downclock(struct drm_device *dev,
  60                         struct drm_display_mode *fixed_mode,
  61                         struct drm_connector *connector)
  62 {
  63         struct drm_display_mode *scan, *tmp_mode;
  64         int temp_downclock;
  65
  66         temp_downclock = fixed_mode->clock;
  67         tmp_mode = NULL;
  68
  69         list_for_each_entry(scan, &connector->probed_modes, head) {
  70                 /*
  71                  * If one mode has the same resolution with the fixed_panel
  72                  * mode while they have the different refresh rate, it means
  73                  * that the reduced downclock is found. In such
  74                  * case we can set the different FPx0/1 to dynamically select
  75                  * between low and high frequency.
  76                  */
  77                 if (scan->hdisplay == fixed_mode->hdisplay &&
  78                     scan->hsync_start == fixed_mode->hsync_start &&
  79                     scan->hsync_end == fixed_mode->hsync_end &&
  80                     scan->htotal == fixed_mode->htotal &&
  81                     scan->vdisplay == fixed_mode->vdisplay &&
  82                     scan->vsync_start == fixed_mode->vsync_start &&
  83                     scan->vsync_end == fixed_mode->vsync_end &&
  84                     scan->vtotal == fixed_mode->vtotal) {
  85                         if (scan->clock < temp_downclock) {
  86                                 /*
  87                                  * The downclock is already found. But we
  88                                  * expect to find the lower downclock.
  89                                  */
  90                                 temp_downclock = scan->clock;
  91                                 tmp_mode = scan;
  92                         }
  93                 }
  94         }
  95
  96         if (temp_downclock < fixed_mode->clock)
  97                 return drm_mode_duplicate(dev, tmp_mode);
  98         else
  99                 return NULL;
 100 }
 101
 102 /* adjusted_mode has been preset to be the panel's fixed mode */
 103 void
 104 intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
 105                         struct intel_crtc_state *pipe_config,
 106                         int fitting_mode)
 107 {
 108         struct drm_display_mode *adjusted_mode;
 109         int x, y, width, height;
 110
 111         adjusted_mode = &pipe_config->base.adjusted_mode;
 112
 113         x = y = width = height = 0;
 114
 115         /* Native modes don't need fitting */
 116         if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
 117             adjusted_mode->vdisplay == pipe_config->pipe_src_h)
 118                 goto done;
 119
 120         switch (fitting_mode) {
 121         case DRM_MODE_SCALE_CENTER:
 122                 width = pipe_config->pipe_src_w;
 123                 height = pipe_config->pipe_src_h;
 124                 x = (adjusted_mode->hdisplay - width + 1)/2;
 125                 y = (adjusted_mode->vdisplay - height + 1)/2;
 126                 break;
 127
 128         case DRM_MODE_SCALE_ASPECT:
 129                 /* Scale but preserve the aspect ratio */
 130                 {
 131                         u32 scaled_width = adjusted_mode->hdisplay
 132                                 * pipe_config->pipe_src_h;
 133                         u32 scaled_height = pipe_config->pipe_src_w
 134                                 * adjusted_mode->vdisplay;
 135                         if (scaled_width > scaled_height) { /* pillar */
 136                                 width = scaled_height / pipe_config->pipe_src_h;
 137                                 if (width & 1)
 138                                         width++;
 139                                 x = (adjusted_mode->hdisplay - width + 1) / 2;
 140                                 y = 0;
 141                                 height = adjusted_mode->vdisplay;
 142                         } else if (scaled_width < scaled_height) { /* letter */
 143                                 height = scaled_width / pipe_config->pipe_src_w;
 144                                 if (height & 1)
 145                                     height++;
 146                                 y = (adjusted_mode->vdisplay - height + 1) / 2;
 147                                 x = 0;
 148                                 width = adjusted_mode->hdisplay;
 149                         } else {
 150                                 x = y = 0;
 151                                 width = adjusted_mode->hdisplay;
 152                                 height = adjusted_mode->vdisplay;
 153                         }
 154                 }
 155                 break;
 156
 157         case DRM_MODE_SCALE_FULLSCREEN:
 158                 x = y = 0;
 159                 width = adjusted_mode->hdisplay;
 160                 height = adjusted_mode->vdisplay;
 161                 break;
 162
 163         default:
 164                 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
 165                 return;
 166         }
 167
 168 done:
 169         pipe_config->pch_pfit.pos = (x << 16) | y;
 170         pipe_config->pch_pfit.size = (width << 16) | height;
 171         pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
 172 }
 173
 174 static void
 175 centre_horizontally(struct drm_display_mode *mode,
 176                     int width)
 177 {
 178         u32 border, sync_pos, blank_width, sync_width;
 179
 180         /* keep the hsync and hblank widths constant */
 181         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 182         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 183         sync_pos = (blank_width - sync_width + 1) / 2;
 184
 185         border = (mode->hdisplay - width + 1) / 2;
 186         border += border & 1; /* make the border even */
 187
 188         mode->crtc_hdisplay = width;
 189         mode->crtc_hblank_start = width + border;
 190         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 191
 192         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 193         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 194 }
 195
 196 static void
 197 centre_vertically(struct drm_display_mode *mode,
 198                   int height)
 199 {
 200         u32 border, sync_pos, blank_width, sync_width;
 201
 202         /* keep the vsync and vblank widths constant */
 203         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 204         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 205         sync_pos = (blank_width - sync_width + 1) / 2;
 206
 207         border = (mode->vdisplay - height + 1) / 2;
 208
 209         mode->crtc_vdisplay = height;
 210         mode->crtc_vblank_start = height + border;
 211         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 212
 213         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 214         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 215 }
 216
 217 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 218 {
 219         /*
 220          * Floating point operation is not supported. So the FACTOR
 221          * is defined, which can avoid the floating point computation
 222          * when calculating the panel ratio.
 223          */
 224 #define ACCURACY 12
 225 #define FACTOR (1 << ACCURACY)
 226         u32 ratio = source * FACTOR / target;
 227         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 228 }
 229
 230 static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
 231                               u32 *pfit_control)
 232 {
 233         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 234         u32 scaled_width = adjusted_mode->hdisplay *
 235                 pipe_config->pipe_src_h;
 236         u32 scaled_height = pipe_config->pipe_src_w *
 237                 adjusted_mode->vdisplay;
 238
 239         /* 965+ is easy, it does everything in hw */
 240         if (scaled_width > scaled_height)
 241                 *pfit_control |= PFIT_ENABLE |
 242                         PFIT_SCALING_PILLAR;
 243         else if (scaled_width < scaled_height)
 244                 *pfit_control |= PFIT_ENABLE |
 245                         PFIT_SCALING_LETTER;
 246         else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
 247                 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 248 }
 249
 250 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
 251                               u32 *pfit_control, u32 *pfit_pgm_ratios,
 252                               u32 *border)
 253 {
 254         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 255         u32 scaled_width = adjusted_mode->hdisplay *
 256                 pipe_config->pipe_src_h;
 257         u32 scaled_height = pipe_config->pipe_src_w *
 258                 adjusted_mode->vdisplay;
 259         u32 bits;
 260
 261         /*
 262          * For earlier chips we have to calculate the scaling
 263          * ratio by hand and program it into the
 264          * PFIT_PGM_RATIO register
 265          */
 266         if (scaled_width > scaled_height) { /* pillar */
 267                 centre_horizontally(adjusted_mode,
 268                                     scaled_height /
 269                                     pipe_config->pipe_src_h);
 270
 271                 *border = LVDS_BORDER_ENABLE;
 272                 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
 273                         bits = panel_fitter_scaling(pipe_config->pipe_src_h,
 274                                                     adjusted_mode->vdisplay);
 275
 276                         *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 277                                              bits << PFIT_VERT_SCALE_SHIFT);
 278                         *pfit_control |= (PFIT_ENABLE |
 279                                           VERT_INTERP_BILINEAR |
 280                                           HORIZ_INTERP_BILINEAR);
 281                 }
 282         } else if (scaled_width < scaled_height) { /* letter */
 283                 centre_vertically(adjusted_mode,
 284                                   scaled_width /
 285                                   pipe_config->pipe_src_w);
 286
 287                 *border = LVDS_BORDER_ENABLE;
 288                 if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
 289                         bits = panel_fitter_scaling(pipe_config->pipe_src_w,
 290                                                     adjusted_mode->hdisplay);
 291
 292                         *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 293                                              bits << PFIT_VERT_SCALE_SHIFT);
 294                         *pfit_control |= (PFIT_ENABLE |
 295                                           VERT_INTERP_BILINEAR |
 296                                           HORIZ_INTERP_BILINEAR);
 297                 }
 298         } else {
 299                 /* Aspects match, Let hw scale both directions */
 300                 *pfit_control |= (PFIT_ENABLE |
 301                                   VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 302                                   VERT_INTERP_BILINEAR |
 303                                   HORIZ_INTERP_BILINEAR);
 304         }
 305 }
 306
 307 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
 308                               struct intel_crtc_state *pipe_config,
 309                               int fitting_mode)
 310 {
 311         struct drm_device *dev = intel_crtc->base.dev;
 312         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 313         struct drm_display_mode *adjusted_mode;
 314
 315         adjusted_mode = &pipe_config->base.adjusted_mode;
 316
 317         /* Native modes don't need fitting */
 318         if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
 319             adjusted_mode->vdisplay == pipe_config->pipe_src_h)
 320                 goto out;
 321
 322         switch (fitting_mode) {
 323         case DRM_MODE_SCALE_CENTER:
 324                 /*
 325                  * For centered modes, we have to calculate border widths &
 326                  * heights and modify the values programmed into the CRTC.
 327                  */
 328                 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
 329                 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
 330                 border = LVDS_BORDER_ENABLE;
 331                 break;
 332         case DRM_MODE_SCALE_ASPECT:
 333                 /* Scale but preserve the aspect ratio */
 334                 if (INTEL_INFO(dev)->gen >= 4)
 335                         i965_scale_aspect(pipe_config, &pfit_control);
 336                 else
 337                         i9xx_scale_aspect(pipe_config, &pfit_control,
 338                                           &pfit_pgm_ratios, &border);
 339                 break;
 340         case DRM_MODE_SCALE_FULLSCREEN:
 341                 /*
 342                  * Full scaling, even if it changes the aspect ratio.
 343                  * Fortunately this is all done for us in hw.
 344                  */
 345                 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
 346                     pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
 347                         pfit_control |= PFIT_ENABLE;
 348                         if (INTEL_INFO(dev)->gen >= 4)
 349                                 pfit_control |= PFIT_SCALING_AUTO;
 350                         else
 351                                 pfit_control |= (VERT_AUTO_SCALE |
 352                                                  VERT_INTERP_BILINEAR |
 353                                                  HORIZ_AUTO_SCALE |
 354                                                  HORIZ_INTERP_BILINEAR);
 355                 }
 356                 break;
 357         default:
 358                 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
 359                 return;
 360         }
 361
 362         /* 965+ wants fuzzy fitting */
 363         /* FIXME: handle multiple panels by failing gracefully */
 364         if (INTEL_INFO(dev)->gen >= 4)
 365                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 366                                  PFIT_FILTER_FUZZY);
 367
 368 out:
 369         if ((pfit_control & PFIT_ENABLE) == 0) {
 370                 pfit_control = 0;
 371                 pfit_pgm_ratios = 0;
 372         }
 373
 374         /* Make sure pre-965 set dither correctly for 18bpp panels. */
 375         if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
 376                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 377
 378         pipe_config->gmch_pfit.control = pfit_control;
 379         pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
 380         pipe_config->gmch_pfit.lvds_border_bits = border;
 381 }
 382
 383 enum drm_connector_status
 384 intel_panel_detect(struct drm_device *dev)
 385 {
 386         struct drm_i915_private *dev_priv = dev->dev_private;
 387
 388         /* Assume that the BIOS does not lie through the OpRegion... */
 389         if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
 390                 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
 391                         connector_status_connected :
 392                         connector_status_disconnected;
 393         }
 394
 395         switch (i915.panel_ignore_lid) {
 396         case -2:
 397                 return connector_status_connected;
 398         case -1:
 399                 return connector_status_disconnected;
 400         default:
 401                 return connector_status_unknown;
 402         }
 403 }
 404
 405 /**
 406  * scale - scale values from one range to another
 407  *
 408  * @source_val: value in range [@source_min..@source_max]
 409  *
 410  * Return @source_val in range [@source_min..@source_max] scaled to range
 411  * [@target_min..@target_max].
 412  */
 413 static uint32_t scale(uint32_t source_val,
 414                       uint32_t source_min, uint32_t source_max,
 415                       uint32_t target_min, uint32_t target_max)
 416 {
 417         uint64_t target_val;
 418
 419         WARN_ON(source_min > source_max);
 420         WARN_ON(target_min > target_max);
 421
 422         /* defensive */
 423         source_val = clamp(source_val, source_min, source_max);
 424
 425         /* avoid overflows */
 426         target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
 427                         (target_max - target_min), source_max - source_min);
 428         target_val += target_min;
 429
 430         return target_val;
 431 }
 432
 433 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
 434 static inline u32 scale_user_to_hw(struct intel_connector *connector,
 435                                    u32 user_level, u32 user_max)
 436 {
 437         struct intel_panel *panel = &connector->panel;
 438
 439         return scale(user_level, 0, user_max,
 440                      panel->backlight.min, panel->backlight.max);
 441 }
 442
 443 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
 444  * to [hw_min..hw_max]. */
 445 static inline u32 clamp_user_to_hw(struct intel_connector *connector,
 446                                    u32 user_level, u32 user_max)
 447 {
 448         struct intel_panel *panel = &connector->panel;
 449         u32 hw_level;
 450
 451         hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
 452         hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
 453
 454         return hw_level;
 455 }
 456
 457 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
 458 static inline u32 scale_hw_to_user(struct intel_connector *connector,
 459                                    u32 hw_level, u32 user_max)
 460 {
 461         struct intel_panel *panel = &connector->panel;
 462
 463         return scale(hw_level, panel->backlight.min, panel->backlight.max,
 464                      0, user_max);
 465 }
 466
 467 static u32 intel_panel_compute_brightness(struct intel_connector *connector,
 468                                           u32 val)
 469 {
 470         struct drm_device *dev = connector->base.dev;
 471         struct drm_i915_private *dev_priv = dev->dev_private;
 472         struct intel_panel *panel = &connector->panel;
 473
 474         WARN_ON(panel->backlight.max == 0);
 475
 476         if (i915.invert_brightness < 0)
 477                 return val;
 478
 479         if (i915.invert_brightness > 0 ||
 480             dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
 481                 return panel->backlight.max - val;
 482         }
 483
 484         return val;
 485 }
 486
 487 static u32 lpt_get_backlight(struct intel_connector *connector)
 488 {
 489         struct drm_device *dev = connector->base.dev;
 490         struct drm_i915_private *dev_priv = dev->dev_private;
 491
 492         return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
 493 }
 494
 495 static u32 pch_get_backlight(struct intel_connector *connector)
 496 {
 497         struct drm_device *dev = connector->base.dev;
 498         struct drm_i915_private *dev_priv = dev->dev_private;
 499
 500         return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
 501 }
 502
 503 static u32 i9xx_get_backlight(struct intel_connector *connector)
 504 {
 505         struct drm_device *dev = connector->base.dev;
 506         struct drm_i915_private *dev_priv = dev->dev_private;
 507         struct intel_panel *panel = &connector->panel;
 508         u32 val;
 509
 510         val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
 511         if (INTEL_INFO(dev)->gen < 4)
 512                 val >>= 1;
 513
 514         if (panel->backlight.combination_mode) {
 515                 u8 lbpc;
 516
 517                 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
 518                 val *= lbpc;
 519         }
 520
 521         return val;
 522 }
 523
 524 static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
 525 {
 526         struct drm_i915_private *dev_priv = dev->dev_private;
 527
 528         if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
 529                 return 0;
 530
 531         return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
 532 }
 533
 534 static u32 vlv_get_backlight(struct intel_connector *connector)
 535 {
 536         struct drm_device *dev = connector->base.dev;
 537         enum pipe pipe = intel_get_pipe_from_connector(connector);
 538
 539         return _vlv_get_backlight(dev, pipe);
 540 }
 541
 542 static u32 bxt_get_backlight(struct intel_connector *connector)
 543 {
 544         struct drm_device *dev = connector->base.dev;
 545         struct drm_i915_private *dev_priv = dev->dev_private;
 546
 547         return I915_READ(BXT_BLC_PWM_DUTY1);
 548 }
 549
 550 static u32 pwm_get_backlight(struct intel_connector *connector)
 551 {
 552         struct intel_panel *panel = &connector->panel;
 553         int duty_ns;
 554
 555         duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
 556         return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
 557 }
 558
 559 static u32 intel_panel_get_backlight(struct intel_connector *connector)
 560 {
 561         struct drm_device *dev = connector->base.dev;
 562         struct drm_i915_private *dev_priv = dev->dev_private;
 563         struct intel_panel *panel = &connector->panel;
 564         u32 val = 0;
 565
 566         mutex_lock(&dev_priv->backlight_lock);
 567
 568         if (panel->backlight.enabled) {
 569                 val = dev_priv->display.get_backlight(connector);
 570                 val = intel_panel_compute_brightness(connector, val);
 571         }
 572
 573         mutex_unlock(&dev_priv->backlight_lock);
 574
 575         DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
 576         return val;
 577 }
 578
 579 static void lpt_set_backlight(struct intel_connector *connector, u32 level)
 580 {
 581         struct drm_device *dev = connector->base.dev;
 582         struct drm_i915_private *dev_priv = dev->dev_private;
 583         u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
 584         I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
 585 }
 586
 587 static void pch_set_backlight(struct intel_connector *connector, u32 level)
 588 {
 589         struct drm_device *dev = connector->base.dev;
 590         struct drm_i915_private *dev_priv = dev->dev_private;
 591         u32 tmp;
 592
 593         tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
 594         I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
 595 }
 596
 597 static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
 598 {
 599         struct drm_device *dev = connector->base.dev;
 600         struct drm_i915_private *dev_priv = dev->dev_private;
 601         struct intel_panel *panel = &connector->panel;
 602         u32 tmp, mask;
 603
 604         WARN_ON(panel->backlight.max == 0);
 605
 606         if (panel->backlight.combination_mode) {
 607                 u8 lbpc;
 608
 609                 lbpc = level * 0xfe / panel->backlight.max + 1;
 610                 level /= lbpc;
 611                 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
 612         }
 613
 614         if (IS_GEN4(dev)) {
 615                 mask = BACKLIGHT_DUTY_CYCLE_MASK;
 616         } else {
 617                 level <<= 1;
 618                 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
 619         }
 620
 621         tmp = I915_READ(BLC_PWM_CTL) & ~mask;
 622         I915_WRITE(BLC_PWM_CTL, tmp | level);
 623 }
 624
 625 static void vlv_set_backlight(struct intel_connector *connector, u32 level)
 626 {
 627         struct drm_device *dev = connector->base.dev;
 628         struct drm_i915_private *dev_priv = dev->dev_private;
 629         enum pipe pipe = intel_get_pipe_from_connector(connector);
 630         u32 tmp;
 631
 632         if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
 633                 return;
 634
 635         tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
 636         I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
 637 }
 638
 639 static void bxt_set_backlight(struct intel_connector *connector, u32 level)
 640 {
 641         struct drm_device *dev = connector->base.dev;
 642         struct drm_i915_private *dev_priv = dev->dev_private;
 643
 644         I915_WRITE(BXT_BLC_PWM_DUTY1, level);
 645 }
 646
 647 static void pwm_set_backlight(struct intel_connector *connector, u32 level)
 648 {
 649         struct intel_panel *panel = &connector->panel;
 650         int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
 651
 652         pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
 653 }
 654
 655 static void
 656 intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
 657 {
 658         struct drm_device *dev = connector->base.dev;
 659         struct drm_i915_private *dev_priv = dev->dev_private;
 660
 661         DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
 662
 663         level = intel_panel_compute_brightness(connector, level);
 664         dev_priv->display.set_backlight(connector, level);
 665 }
 666
 667 /* set backlight brightness to level in range [0..max], scaling wrt hw min */
 668 static void intel_panel_set_backlight(struct intel_connector *connector,
 669                                       u32 user_level, u32 user_max)
 670 {
 671         struct drm_device *dev = connector->base.dev;
 672         struct drm_i915_private *dev_priv = dev->dev_private;
 673         struct intel_panel *panel = &connector->panel;
 674         u32 hw_level;
 675
 676         if (!panel->backlight.present)
 677                 return;
 678
 679         mutex_lock(&dev_priv->backlight_lock);
 680
 681         WARN_ON(panel->backlight.max == 0);
 682
 683         hw_level = scale_user_to_hw(connector, user_level, user_max);
 684         panel->backlight.level = hw_level;
 685
 686         if (panel->backlight.enabled)
 687                 intel_panel_actually_set_backlight(connector, hw_level);
 688
 689         mutex_unlock(&dev_priv->backlight_lock);
 690 }
 691
 692 /* set backlight brightness to level in range [0..max], assuming hw min is
 693  * respected.
 694  */
 695 void intel_panel_set_backlight_acpi(struct intel_connector *connector,
 696                                     u32 user_level, u32 user_max)
 697 {
 698         struct drm_device *dev = connector->base.dev;
 699         struct drm_i915_private *dev_priv = dev->dev_private;
 700         struct intel_panel *panel = &connector->panel;
 701         enum pipe pipe = intel_get_pipe_from_connector(connector);
 702         u32 hw_level;
 703
 704         /*
 705          * INVALID_PIPE may occur during driver init because
 706          * connection_mutex isn't held across the entire backlight
 707          * setup + modeset readout, and the BIOS can issue the
 708          * requests at any time.
 709          */
 710         if (!panel->backlight.present || pipe == INVALID_PIPE)
 711                 return;
 712
 713         mutex_lock(&dev_priv->backlight_lock);
 714
 715         WARN_ON(panel->backlight.max == 0);
 716
 717         hw_level = clamp_user_to_hw(connector, user_level, user_max);
 718         panel->backlight.level = hw_level;
 719
 720         if (panel->backlight.device)
 721                 panel->backlight.device->props.brightness =
 722                         scale_hw_to_user(connector,
 723                                          panel->backlight.level,
 724                                          panel->backlight.device->props.max_brightness);
 725
 726         if (panel->backlight.enabled)
 727                 intel_panel_actually_set_backlight(connector, hw_level);
 728
 729         mutex_unlock(&dev_priv->backlight_lock);
 730 }
 731
 732 static void lpt_disable_backlight(struct intel_connector *connector)
 733 {
 734         struct drm_device *dev = connector->base.dev;
 735         struct drm_i915_private *dev_priv = dev->dev_private;
 736         u32 tmp;
 737
 738         intel_panel_actually_set_backlight(connector, 0);
 739
 740         tmp = I915_READ(BLC_PWM_PCH_CTL1);
 741         I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
 742 }
 743
 744 static void pch_disable_backlight(struct intel_connector *connector)
 745 {
 746         struct drm_device *dev = connector->base.dev;
 747         struct drm_i915_private *dev_priv = dev->dev_private;
 748         u32 tmp;
 749
 750         intel_panel_actually_set_backlight(connector, 0);
 751
 752         tmp = I915_READ(BLC_PWM_CPU_CTL2);
 753         I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
 754
 755         tmp = I915_READ(BLC_PWM_PCH_CTL1);
 756         I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
 757 }
 758
 759 static void i9xx_disable_backlight(struct intel_connector *connector)
 760 {
 761         intel_panel_actually_set_backlight(connector, 0);
 762 }
 763
 764 static void i965_disable_backlight(struct intel_connector *connector)
 765 {
 766         struct drm_device *dev = connector->base.dev;
 767         struct drm_i915_private *dev_priv = dev->dev_private;
 768         u32 tmp;
 769
 770         intel_panel_actually_set_backlight(connector, 0);
 771
 772         tmp = I915_READ(BLC_PWM_CTL2);
 773         I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
 774 }
 775
 776 static void vlv_disable_backlight(struct intel_connector *connector)
 777 {
 778         struct drm_device *dev = connector->base.dev;
 779         struct drm_i915_private *dev_priv = dev->dev_private;
 780         enum pipe pipe = intel_get_pipe_from_connector(connector);
 781         u32 tmp;
 782
 783         if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
 784                 return;
 785
 786         intel_panel_actually_set_backlight(connector, 0);
 787
 788         tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
 789         I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
 790 }
 791
 792 static void bxt_disable_backlight(struct intel_connector *connector)
 793 {
 794         struct drm_device *dev = connector->base.dev;
 795         struct drm_i915_private *dev_priv = dev->dev_private;
 796         u32 tmp;
 797
 798         intel_panel_actually_set_backlight(connector, 0);
 799
 800         tmp = I915_READ(BXT_BLC_PWM_CTL1);
 801         I915_WRITE(BXT_BLC_PWM_CTL1, tmp & ~BXT_BLC_PWM_ENABLE);
 802 }
 803
 804 static void pwm_disable_backlight(struct intel_connector *connector)
 805 {
 806         struct intel_panel *panel = &connector->panel;
 807
 808         /* Disable the backlight */
 809         pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
 810         usleep_range(2000, 3000);
 811         pwm_disable(panel->backlight.pwm);
 812 }
 813
 814 void intel_panel_disable_backlight(struct intel_connector *connector)
 815 {
 816         struct drm_device *dev = connector->base.dev;
 817         struct drm_i915_private *dev_priv = dev->dev_private;
 818         struct intel_panel *panel = &connector->panel;
 819
 820         if (!panel->backlight.present)
 821                 return;
 822
 823         /*
 824          * Do not disable backlight on the vga_switcheroo path. When switching
 825          * away from i915, the other client may depend on i915 to handle the
 826          * backlight. This will leave the backlight on unnecessarily when
 827          * another client is not activated.
 828          */
 829         if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
 830                 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
 831                 return;
 832         }
 833
 834         mutex_lock(&dev_priv->backlight_lock);
 835
 836         if (panel->backlight.device)
 837                 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
 838         panel->backlight.enabled = false;
 839         dev_priv->display.disable_backlight(connector);
 840
 841         mutex_unlock(&dev_priv->backlight_lock);
 842 }
 843
 844 static void lpt_enable_backlight(struct intel_connector *connector)
 845 {
 846         struct drm_device *dev = connector->base.dev;
 847         struct drm_i915_private *dev_priv = dev->dev_private;
 848         struct intel_panel *panel = &connector->panel;
 849         u32 pch_ctl1, pch_ctl2;
 850
 851         pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
 852         if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
 853                 DRM_DEBUG_KMS("pch backlight already enabled\n");
 854                 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
 855                 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
 856         }
 857
 858         pch_ctl2 = panel->backlight.max << 16;
 859         I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
 860
 861         pch_ctl1 = 0;
 862         if (panel->backlight.active_low_pwm)
 863                 pch_ctl1 |= BLM_PCH_POLARITY;
 864
 865         /* After LPT, override is the default. */
 866         if (HAS_PCH_LPT(dev_priv))
 867                 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
 868
 869         I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
 870         POSTING_READ(BLC_PWM_PCH_CTL1);
 871         I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
 872
 873         /* This won't stick until the above enable. */
 874         intel_panel_actually_set_backlight(connector, panel->backlight.level);
 875 }
 876
 877 static void pch_enable_backlight(struct intel_connector *connector)
 878 {
 879         struct drm_device *dev = connector->base.dev;
 880         struct drm_i915_private *dev_priv = dev->dev_private;
 881         struct intel_panel *panel = &connector->panel;
 882         enum pipe pipe = intel_get_pipe_from_connector(connector);
 883         enum transcoder cpu_transcoder =
 884                 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
 885         u32 cpu_ctl2, pch_ctl1, pch_ctl2;
 886
 887         cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
 888         if (cpu_ctl2 & BLM_PWM_ENABLE) {
 889                 DRM_DEBUG_KMS("cpu backlight already enabled\n");
 890                 cpu_ctl2 &= ~BLM_PWM_ENABLE;
 891                 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
 892         }
 893
 894         pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
 895         if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
 896                 DRM_DEBUG_KMS("pch backlight already enabled\n");
 897                 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
 898                 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
 899         }
 900
 901         if (cpu_transcoder == TRANSCODER_EDP)
 902                 cpu_ctl2 = BLM_TRANSCODER_EDP;
 903         else
 904                 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
 905         I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
 906         POSTING_READ(BLC_PWM_CPU_CTL2);
 907         I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
 908
 909         /* This won't stick until the above enable. */
 910         intel_panel_actually_set_backlight(connector, panel->backlight.level);
 911
 912         pch_ctl2 = panel->backlight.max << 16;
 913         I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
 914
 915         pch_ctl1 = 0;
 916         if (panel->backlight.active_low_pwm)
 917                 pch_ctl1 |= BLM_PCH_POLARITY;
 918
 919         I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
 920         POSTING_READ(BLC_PWM_PCH_CTL1);
 921         I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
 922 }
 923
 924 static void i9xx_enable_backlight(struct intel_connector *connector)
 925 {
 926         struct drm_device *dev = connector->base.dev;
 927         struct drm_i915_private *dev_priv = dev->dev_private;
 928         struct intel_panel *panel = &connector->panel;
 929         u32 ctl, freq;
 930
 931         ctl = I915_READ(BLC_PWM_CTL);
 932         if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
 933                 DRM_DEBUG_KMS("backlight already enabled\n");
 934                 I915_WRITE(BLC_PWM_CTL, 0);
 935         }
 936
 937         freq = panel->backlight.max;
 938         if (panel->backlight.combination_mode)
 939                 freq /= 0xff;
 940
 941         ctl = freq << 17;
 942         if (panel->backlight.combination_mode)
 943                 ctl |= BLM_LEGACY_MODE;
 944         if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
 945                 ctl |= BLM_POLARITY_PNV;
 946
 947         I915_WRITE(BLC_PWM_CTL, ctl);
 948         POSTING_READ(BLC_PWM_CTL);
 949
 950         /* XXX: combine this into above write? */
 951         intel_panel_actually_set_backlight(connector, panel->backlight.level);
 952
 953         /*
 954          * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
 955          * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
 956          * that has backlight.
 957          */
 958         if (IS_GEN2(dev))
 959                 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
 960 }
 961
 962 static void i965_enable_backlight(struct intel_connector *connector)
 963 {
 964         struct drm_device *dev = connector->base.dev;
 965         struct drm_i915_private *dev_priv = dev->dev_private;
 966         struct intel_panel *panel = &connector->panel;
 967         enum pipe pipe = intel_get_pipe_from_connector(connector);
 968         u32 ctl, ctl2, freq;
 969
 970         ctl2 = I915_READ(BLC_PWM_CTL2);
 971         if (ctl2 & BLM_PWM_ENABLE) {
 972                 DRM_DEBUG_KMS("backlight already enabled\n");
 973                 ctl2 &= ~BLM_PWM_ENABLE;
 974                 I915_WRITE(BLC_PWM_CTL2, ctl2);
 975         }
 976
 977         freq = panel->backlight.max;
 978         if (panel->backlight.combination_mode)
 979                 freq /= 0xff;
 980
 981         ctl = freq << 16;
 982         I915_WRITE(BLC_PWM_CTL, ctl);
 983
 984         ctl2 = BLM_PIPE(pipe);
 985         if (panel->backlight.combination_mode)
 986                 ctl2 |= BLM_COMBINATION_MODE;
 987         if (panel->backlight.active_low_pwm)
 988                 ctl2 |= BLM_POLARITY_I965;
 989         I915_WRITE(BLC_PWM_CTL2, ctl2);
 990         POSTING_READ(BLC_PWM_CTL2);
 991         I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
 992
 993         intel_panel_actually_set_backlight(connector, panel->backlight.level);
 994 }
 995
 996 static void vlv_enable_backlight(struct intel_connector *connector)
 997 {
 998         struct drm_device *dev = connector->base.dev;
 999         struct drm_i915_private *dev_priv = dev->dev_private;
1000         struct intel_panel *panel = &connector->panel;
1001         enum pipe pipe = intel_get_pipe_from_connector(connector);
1002         u32 ctl, ctl2;
1003
1004         if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1005                 return;
1006
1007         ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1008         if (ctl2 & BLM_PWM_ENABLE) {
1009                 DRM_DEBUG_KMS("backlight already enabled\n");
1010                 ctl2 &= ~BLM_PWM_ENABLE;
1011                 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1012         }
1013
1014         ctl = panel->backlight.max << 16;
1015         I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
1016
1017         /* XXX: combine this into above write? */
1018         intel_panel_actually_set_backlight(connector, panel->backlight.level);
1019
1020         ctl2 = 0;
1021         if (panel->backlight.active_low_pwm)
1022                 ctl2 |= BLM_POLARITY_I965;
1023         I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1024         POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
1025         I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
1026 }
1027
1028 static void bxt_enable_backlight(struct intel_connector *connector)
1029 {
1030         struct drm_device *dev = connector->base.dev;
1031         struct drm_i915_private *dev_priv = dev->dev_private;
1032         struct intel_panel *panel = &connector->panel;
1033         u32 pwm_ctl;
1034
1035         pwm_ctl = I915_READ(BXT_BLC_PWM_CTL1);
1036         if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1037                 DRM_DEBUG_KMS("backlight already enabled\n");
1038                 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1039                 I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl);
1040         }
1041
1042         I915_WRITE(BXT_BLC_PWM_FREQ1, panel->backlight.max);
1043
1044         intel_panel_actually_set_backlight(connector, panel->backlight.level);
1045
1046         pwm_ctl = 0;
1047         if (panel->backlight.active_low_pwm)
1048                 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1049
1050         I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl);
1051         POSTING_READ(BXT_BLC_PWM_CTL1);
1052         I915_WRITE(BXT_BLC_PWM_CTL1, pwm_ctl | BXT_BLC_PWM_ENABLE);
1053 }
1054
1055 static void pwm_enable_backlight(struct intel_connector *connector)
1056 {
1057         struct intel_panel *panel = &connector->panel;
1058
1059         pwm_enable(panel->backlight.pwm);
1060         intel_panel_actually_set_backlight(connector, panel->backlight.level);
1061 }
1062
1063 void intel_panel_enable_backlight(struct intel_connector *connector)
1064 {
1065         struct drm_device *dev = connector->base.dev;
1066         struct drm_i915_private *dev_priv = dev->dev_private;
1067         struct intel_panel *panel = &connector->panel;
1068         enum pipe pipe = intel_get_pipe_from_connector(connector);
1069
1070         if (!panel->backlight.present)
1071                 return;
1072
1073         DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1074
1075         mutex_lock(&dev_priv->backlight_lock);
1076
1077         WARN_ON(panel->backlight.max == 0);
1078
1079         if (panel->backlight.level <= panel->backlight.min) {
1080                 panel->backlight.level = panel->backlight.max;
1081                 if (panel->backlight.device)
1082                         panel->backlight.device->props.brightness =
1083                                 scale_hw_to_user(connector,
1084                                                  panel->backlight.level,
1085                                                  panel->backlight.device->props.max_brightness);
1086         }
1087
1088         dev_priv->display.enable_backlight(connector);
1089         panel->backlight.enabled = true;
1090         if (panel->backlight.device)
1091                 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1092
1093         mutex_unlock(&dev_priv->backlight_lock);
1094 }
1095
1096 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1097 static int intel_backlight_device_update_status(struct backlight_device *bd)
1098 {
1099         struct intel_connector *connector = bl_get_data(bd);
1100         struct intel_panel *panel = &connector->panel;
1101         struct drm_device *dev = connector->base.dev;
1102
1103         drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1104         DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1105                       bd->props.brightness, bd->props.max_brightness);
1106         intel_panel_set_backlight(connector, bd->props.brightness,
1107                                   bd->props.max_brightness);
1108
1109         /*
1110          * Allow flipping bl_power as a sub-state of enabled. Sadly the
1111          * backlight class device does not make it easy to to differentiate
1112          * between callbacks for brightness and bl_power, so our backlight_power
1113          * callback needs to take this into account.
1114          */
1115         if (panel->backlight.enabled) {
1116                 if (panel->backlight_power) {
1117                         bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1118                                 bd->props.brightness != 0;
1119                         panel->backlight_power(connector, enable);
1120                 }
1121         } else {
1122                 bd->props.power = FB_BLANK_POWERDOWN;
1123         }
1124
1125         drm_modeset_unlock(&dev->mode_config.connection_mutex);
1126         return 0;
1127 }
1128
1129 static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1130 {
1131         struct intel_connector *connector = bl_get_data(bd);
1132         struct drm_device *dev = connector->base.dev;
1133         struct drm_i915_private *dev_priv = dev->dev_private;
1134         u32 hw_level;
1135         int ret;
1136
1137         intel_runtime_pm_get(dev_priv);
1138         drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1139
1140         hw_level = intel_panel_get_backlight(connector);
1141         ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1142
1143         drm_modeset_unlock(&dev->mode_config.connection_mutex);
1144         intel_runtime_pm_put(dev_priv);
1145
1146         return ret;
1147 }
1148
1149 static const struct backlight_ops intel_backlight_device_ops = {
1150         .update_status = intel_backlight_device_update_status,
1151         .get_brightness = intel_backlight_device_get_brightness,
1152 };
1153
1154 static int intel_backlight_device_register(struct intel_connector *connector)
1155 {
1156         struct intel_panel *panel = &connector->panel;
1157         struct backlight_properties props;
1158
1159         if (WARN_ON(panel->backlight.device))
1160                 return -ENODEV;
1161
1162         if (!panel->backlight.present)
1163                 return 0;
1164
1165         WARN_ON(panel->backlight.max == 0);
1166
1167         memset(&props, 0, sizeof(props));
1168         props.type = BACKLIGHT_RAW;
1169
1170         /*
1171          * Note: Everything should work even if the backlight device max
1172          * presented to the userspace is arbitrarily chosen.
1173          */
1174         props.max_brightness = panel->backlight.max;
1175         props.brightness = scale_hw_to_user(connector,
1176                                             panel->backlight.level,
1177                                             props.max_brightness);
1178
1179         if (panel->backlight.enabled)
1180                 props.power = FB_BLANK_UNBLANK;
1181         else
1182                 props.power = FB_BLANK_POWERDOWN;
1183
1184         /*
1185          * Note: using the same name independent of the connector prevents
1186          * registration of multiple backlight devices in the driver.
1187          */
1188         panel->backlight.device =
1189                 backlight_device_register("intel_backlight",
1190                                           connector->base.kdev,
1191                                           connector,
1192                                           &intel_backlight_device_ops, &props);
1193
1194         if (IS_ERR(panel->backlight.device)) {
1195                 DRM_ERROR("Failed to register backlight: %ld\n",
1196                           PTR_ERR(panel->backlight.device));
1197                 panel->backlight.device = NULL;
1198                 return -ENODEV;
1199         }
1200
1201         DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1202                       connector->base.name);
1203
1204         return 0;
1205 }
1206
1207 static void intel_backlight_device_unregister(struct intel_connector *connector)
1208 {
1209         struct intel_panel *panel = &connector->panel;
1210
1211         if (panel->backlight.device) {
1212                 backlight_device_unregister(panel->backlight.device);
1213                 panel->backlight.device = NULL;
1214         }
1215 }
1216 #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1217 static int intel_backlight_device_register(struct intel_connector *connector)
1218 {
1219         return 0;
1220 }
1221 static void intel_backlight_device_unregister(struct intel_connector *connector)
1222 {
1223 }
1224 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1225
1226 /*
1227  * SPT: This value represents the period of the PWM stream in clock periods
1228  * multiplied by 16 (default increment) or 128 (alternate increment selected in
1229  * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1230  */
1231 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1232 {
1233         struct drm_device *dev = connector->base.dev;
1234         struct drm_i915_private *dev_priv = dev->dev_private;
1235         u32 mul, clock;
1236
1237         if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
1238                 mul = 128;
1239         else
1240                 mul = 16;
1241
1242         clock = MHz(24);
1243
1244         return clock / (pwm_freq_hz * mul);
1245 }
1246
1247 /*
1248  * LPT: This value represents the period of the PWM stream in clock periods
1249  * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1250  * LPT SOUTH_CHICKEN2 register bit 5).
1251  */
1252 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1253 {
1254         struct drm_device *dev = connector->base.dev;
1255         struct drm_i915_private *dev_priv = dev->dev_private;
1256         u32 mul, clock;
1257
1258         if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
1259                 mul = 16;
1260         else
1261                 mul = 128;
1262
1263         if (dev_priv->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE)
1264                 clock = MHz(135); /* LPT:H */
1265         else
1266                 clock = MHz(24); /* LPT:LP */
1267
1268         return clock / (pwm_freq_hz * mul);
1269 }
1270
1271 /*
1272  * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1273  * display raw clocks multiplied by 128.
1274  */
1275 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1276 {
1277         struct drm_device *dev = connector->base.dev;
1278         int clock = MHz(intel_pch_rawclk(dev));
1279
1280         return clock / (pwm_freq_hz * 128);
1281 }
1282
1283 /*
1284  * Gen2: This field determines the number of time base events (display core
1285  * clock frequency/32) in total for a complete cycle of modulated backlight
1286  * control.
1287  *
1288  * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1289  * divided by 32.
1290  */
1291 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1292 {
1293         struct drm_device *dev = connector->base.dev;
1294         struct drm_i915_private *dev_priv = dev->dev_private;
1295         int clock;
1296
1297         if (IS_PINEVIEW(dev))
1298                 clock = intel_hrawclk(dev);
1299         else
1300                 clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
1301
1302         return clock / (pwm_freq_hz * 32);
1303 }
1304
1305 /*
1306  * Gen4: This value represents the period of the PWM stream in display core
1307  * clocks multiplied by 128.
1308  */
1309 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1310 {
1311         struct drm_device *dev = connector->base.dev;
1312         struct drm_i915_private *dev_priv = dev->dev_private;
1313         int clock = 1000 * dev_priv->display.get_display_clock_speed(dev);
1314
1315         return clock / (pwm_freq_hz * 128);
1316 }
1317
1318 /*
1319  * VLV: This value represents the period of the PWM stream in display core
1320  * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1321  * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1322  */
1323 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1324 {
1325         struct drm_device *dev = connector->base.dev;
1326         struct drm_i915_private *dev_priv = dev->dev_private;
1327         int clock;
1328
1329         if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1330                 if (IS_CHERRYVIEW(dev))
1331                         return KHz(19200) / (pwm_freq_hz * 16);
1332                 else
1333                         return MHz(25) / (pwm_freq_hz * 16);
1334         } else {
1335                 clock = intel_hrawclk(dev);
1336                 return MHz(clock) / (pwm_freq_hz * 128);
1337         }
1338 }
1339
1340 static u32 get_backlight_max_vbt(struct intel_connector *connector)
1341 {
1342         struct drm_device *dev = connector->base.dev;
1343         struct drm_i915_private *dev_priv = dev->dev_private;
1344         u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1345         u32 pwm;
1346
1347         if (!pwm_freq_hz) {
1348                 DRM_DEBUG_KMS("backlight frequency not specified in VBT\n");
1349                 return 0;
1350         }
1351
1352         if (!dev_priv->display.backlight_hz_to_pwm) {
1353                 DRM_DEBUG_KMS("backlight frequency setting from VBT currently not supported on this platform\n");
1354                 return 0;
1355         }
1356
1357         pwm = dev_priv->display.backlight_hz_to_pwm(connector, pwm_freq_hz);
1358         if (!pwm) {
1359                 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1360                 return 0;
1361         }
1362
1363         DRM_DEBUG_KMS("backlight frequency %u Hz from VBT\n", pwm_freq_hz);
1364
1365         return pwm;
1366 }
1367
1368 /*
1369  * Note: The setup hooks can't assume pipe is set!
1370  */
1371 static u32 get_backlight_min_vbt(struct intel_connector *connector)
1372 {
1373         struct drm_device *dev = connector->base.dev;
1374         struct drm_i915_private *dev_priv = dev->dev_private;
1375         struct intel_panel *panel = &connector->panel;
1376         int min;
1377
1378         WARN_ON(panel->backlight.max == 0);
1379
1380         /*
1381          * XXX: If the vbt value is 255, it makes min equal to max, which leads
1382          * to problems. There are such machines out there. Either our
1383          * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1384          * against this by letting the minimum be at most (arbitrarily chosen)
1385          * 25% of the max.
1386          */
1387         min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1388         if (min != dev_priv->vbt.backlight.min_brightness) {
1389                 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1390                               dev_priv->vbt.backlight.min_brightness, min);
1391         }
1392
1393         /* vbt value is a coefficient in range [0..255] */
1394         return scale(min, 0, 255, 0, panel->backlight.max);
1395 }
1396
1397 static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1398 {
1399         struct drm_device *dev = connector->base.dev;
1400         struct drm_i915_private *dev_priv = dev->dev_private;
1401         struct intel_panel *panel = &connector->panel;
1402         u32 pch_ctl1, pch_ctl2, val;
1403
1404         pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1405         panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1406
1407         pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1408         panel->backlight.max = pch_ctl2 >> 16;
1409
1410         if (!panel->backlight.max)
1411                 panel->backlight.max = get_backlight_max_vbt(connector);
1412
1413         if (!panel->backlight.max)
1414                 return -ENODEV;
1415
1416         panel->backlight.min = get_backlight_min_vbt(connector);
1417
1418         val = lpt_get_backlight(connector);
1419         panel->backlight.level = intel_panel_compute_brightness(connector, val);
1420
1421         panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1422                 panel->backlight.level != 0;
1423
1424         return 0;
1425 }
1426
1427 static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1428 {
1429         struct drm_device *dev = connector->base.dev;
1430         struct drm_i915_private *dev_priv = dev->dev_private;
1431         struct intel_panel *panel = &connector->panel;
1432         u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1433
1434         pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1435         panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1436
1437         pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1438         panel->backlight.max = pch_ctl2 >> 16;
1439
1440         if (!panel->backlight.max)
1441                 panel->backlight.max = get_backlight_max_vbt(connector);
1442
1443         if (!panel->backlight.max)
1444                 return -ENODEV;
1445
1446         panel->backlight.min = get_backlight_min_vbt(connector);
1447
1448         val = pch_get_backlight(connector);
1449         panel->backlight.level = intel_panel_compute_brightness(connector, val);
1450
1451         cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1452         panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1453                 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1454
1455         return 0;
1456 }
1457
1458 static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1459 {
1460         struct drm_device *dev = connector->base.dev;
1461         struct drm_i915_private *dev_priv = dev->dev_private;
1462         struct intel_panel *panel = &connector->panel;
1463         u32 ctl, val;
1464
1465         ctl = I915_READ(BLC_PWM_CTL);
1466
1467         if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
1468                 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1469
1470         if (IS_PINEVIEW(dev))
1471                 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1472
1473         panel->backlight.max = ctl >> 17;
1474
1475         if (!panel->backlight.max) {
1476                 panel->backlight.max = get_backlight_max_vbt(connector);
1477                 panel->backlight.max >>= 1;
1478         }
1479
1480         if (!panel->backlight.max)
1481                 return -ENODEV;
1482
1483         if (panel->backlight.combination_mode)
1484                 panel->backlight.max *= 0xff;
1485
1486         panel->backlight.min = get_backlight_min_vbt(connector);
1487
1488         val = i9xx_get_backlight(connector);
1489         panel->backlight.level = intel_panel_compute_brightness(connector, val);
1490
1491         panel->backlight.enabled = panel->backlight.level != 0;
1492
1493         return 0;
1494 }
1495
1496 static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1497 {
1498         struct drm_device *dev = connector->base.dev;
1499         struct drm_i915_private *dev_priv = dev->dev_private;
1500         struct intel_panel *panel = &connector->panel;
1501         u32 ctl, ctl2, val;
1502
1503         ctl2 = I915_READ(BLC_PWM_CTL2);
1504         panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1505         panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1506
1507         ctl = I915_READ(BLC_PWM_CTL);
1508         panel->backlight.max = ctl >> 16;
1509
1510         if (!panel->backlight.max)
1511                 panel->backlight.max = get_backlight_max_vbt(connector);
1512
1513         if (!panel->backlight.max)
1514                 return -ENODEV;
1515
1516         if (panel->backlight.combination_mode)
1517                 panel->backlight.max *= 0xff;
1518
1519         panel->backlight.min = get_backlight_min_vbt(connector);
1520
1521         val = i9xx_get_backlight(connector);
1522         panel->backlight.level = intel_panel_compute_brightness(connector, val);
1523
1524         panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1525                 panel->backlight.level != 0;
1526
1527         return 0;
1528 }
1529
1530 static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1531 {
1532         struct drm_device *dev = connector->base.dev;
1533         struct drm_i915_private *dev_priv = dev->dev_private;
1534         struct intel_panel *panel = &connector->panel;
1535         u32 ctl, ctl2, val;
1536
1537         if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1538                 return -ENODEV;
1539
1540         ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1541         panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1542
1543         ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1544         panel->backlight.max = ctl >> 16;
1545
1546         if (!panel->backlight.max)
1547                 panel->backlight.max = get_backlight_max_vbt(connector);
1548
1549         if (!panel->backlight.max)
1550                 return -ENODEV;
1551
1552         panel->backlight.min = get_backlight_min_vbt(connector);
1553
1554         val = _vlv_get_backlight(dev, pipe);
1555         panel->backlight.level = intel_panel_compute_brightness(connector, val);
1556
1557         panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1558                 panel->backlight.level != 0;
1559
1560         return 0;
1561 }
1562
1563 static int
1564 bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1565 {
1566         struct drm_device *dev = connector->base.dev;
1567         struct drm_i915_private *dev_priv = dev->dev_private;
1568         struct intel_panel *panel = &connector->panel;
1569         u32 pwm_ctl, val;
1570
1571         pwm_ctl = I915_READ(BXT_BLC_PWM_CTL1);
1572         panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1573
1574         panel->backlight.max = I915_READ(BXT_BLC_PWM_FREQ1);
1575
1576         if (!panel->backlight.max)
1577                 panel->backlight.max = get_backlight_max_vbt(connector);
1578
1579         if (!panel->backlight.max)
1580                 return -ENODEV;
1581
1582         val = bxt_get_backlight(connector);
1583         panel->backlight.level = intel_panel_compute_brightness(connector, val);
1584
1585         panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) &&
1586                 panel->backlight.level != 0;
1587
1588         return 0;
1589 }
1590
1591 static int pwm_setup_backlight(struct intel_connector *connector,
1592                                enum pipe pipe)
1593 {
1594         struct drm_device *dev = connector->base.dev;
1595         struct intel_panel *panel = &connector->panel;
1596         int retval;
1597
1598         /* Get the PWM chip for backlight control */
1599         panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1600         if (IS_ERR(panel->backlight.pwm)) {
1601                 DRM_ERROR("Failed to own the pwm chip\n");
1602                 panel->backlight.pwm = NULL;
1603                 return -ENODEV;
1604         }
1605
1606         retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1607                             CRC_PMIC_PWM_PERIOD_NS);
1608         if (retval < 0) {
1609                 DRM_ERROR("Failed to configure the pwm chip\n");
1610                 pwm_put(panel->backlight.pwm);
1611                 panel->backlight.pwm = NULL;
1612                 return retval;
1613         }
1614
1615         panel->backlight.min = 0; /* 0% */
1616         panel->backlight.max = 100; /* 100% */
1617         panel->backlight.level = DIV_ROUND_UP(
1618                                  pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1619                                  CRC_PMIC_PWM_PERIOD_NS);
1620         panel->backlight.enabled = panel->backlight.level != 0;
1621
1622         return 0;
1623 }
1624
1625 int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1626 {
1627         struct drm_device *dev = connector->dev;
1628         struct drm_i915_private *dev_priv = dev->dev_private;
1629         struct intel_connector *intel_connector = to_intel_connector(connector);
1630         struct intel_panel *panel = &intel_connector->panel;
1631         int ret;
1632
1633         if (!dev_priv->vbt.backlight.present) {
1634                 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1635                         DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1636                 } else {
1637                         DRM_DEBUG_KMS("no backlight present per VBT\n");
1638                         return 0;
1639                 }
1640         }
1641
1642         /* set level and max in panel struct */
1643         mutex_lock(&dev_priv->backlight_lock);
1644         ret = dev_priv->display.setup_backlight(intel_connector, pipe);
1645         mutex_unlock(&dev_priv->backlight_lock);
1646
1647         if (ret) {
1648                 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1649                               connector->name);
1650                 return ret;
1651         }
1652
1653         panel->backlight.present = true;
1654
1655         DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1656                       connector->name,
1657                       panel->backlight.enabled ? "enabled" : "disabled",
1658                       panel->backlight.level, panel->backlight.max);
1659
1660         return 0;
1661 }
1662
1663 void intel_panel_destroy_backlight(struct drm_connector *connector)
1664 {
1665         struct intel_connector *intel_connector = to_intel_connector(connector);
1666         struct intel_panel *panel = &intel_connector->panel;
1667
1668         /* dispose of the pwm */
1669         if (panel->backlight.pwm)
1670                 pwm_put(panel->backlight.pwm);
1671
1672         panel->backlight.present = false;
1673 }
1674
1675 /* Set up chip specific backlight functions */
1676 void intel_panel_init_backlight_funcs(struct drm_device *dev)
1677 {
1678         struct drm_i915_private *dev_priv = dev->dev_private;
1679
1680         if (IS_BROXTON(dev)) {
1681                 dev_priv->display.setup_backlight = bxt_setup_backlight;
1682                 dev_priv->display.enable_backlight = bxt_enable_backlight;
1683                 dev_priv->display.disable_backlight = bxt_disable_backlight;
1684                 dev_priv->display.set_backlight = bxt_set_backlight;
1685                 dev_priv->display.get_backlight = bxt_get_backlight;
1686         } else if (HAS_PCH_LPT(dev) || HAS_PCH_SPT(dev)) {
1687                 dev_priv->display.setup_backlight = lpt_setup_backlight;
1688                 dev_priv->display.enable_backlight = lpt_enable_backlight;
1689                 dev_priv->display.disable_backlight = lpt_disable_backlight;
1690                 dev_priv->display.set_backlight = lpt_set_backlight;
1691                 dev_priv->display.get_backlight = lpt_get_backlight;
1692                 if (HAS_PCH_LPT(dev))
1693                         dev_priv->display.backlight_hz_to_pwm = lpt_hz_to_pwm;
1694                 else
1695                         dev_priv->display.backlight_hz_to_pwm = spt_hz_to_pwm;
1696         } else if (HAS_PCH_SPLIT(dev)) {
1697                 dev_priv->display.setup_backlight = pch_setup_backlight;
1698                 dev_priv->display.enable_backlight = pch_enable_backlight;
1699                 dev_priv->display.disable_backlight = pch_disable_backlight;
1700                 dev_priv->display.set_backlight = pch_set_backlight;
1701                 dev_priv->display.get_backlight = pch_get_backlight;
1702                 dev_priv->display.backlight_hz_to_pwm = pch_hz_to_pwm;
1703         } else if (IS_VALLEYVIEW(dev)) {
1704                 if (dev_priv->vbt.has_mipi) {
1705                         dev_priv->display.setup_backlight = pwm_setup_backlight;
1706                         dev_priv->display.enable_backlight = pwm_enable_backlight;
1707                         dev_priv->display.disable_backlight = pwm_disable_backlight;
1708                         dev_priv->display.set_backlight = pwm_set_backlight;
1709                         dev_priv->display.get_backlight = pwm_get_backlight;
1710                 } else {
1711                         dev_priv->display.setup_backlight = vlv_setup_backlight;
1712                         dev_priv->display.enable_backlight = vlv_enable_backlight;
1713                         dev_priv->display.disable_backlight = vlv_disable_backlight;
1714                         dev_priv->display.set_backlight = vlv_set_backlight;
1715                         dev_priv->display.get_backlight = vlv_get_backlight;
1716                         dev_priv->display.backlight_hz_to_pwm = vlv_hz_to_pwm;
1717                 }
1718         } else if (IS_GEN4(dev)) {
1719                 dev_priv->display.setup_backlight = i965_setup_backlight;
1720                 dev_priv->display.enable_backlight = i965_enable_backlight;
1721                 dev_priv->display.disable_backlight = i965_disable_backlight;
1722                 dev_priv->display.set_backlight = i9xx_set_backlight;
1723                 dev_priv->display.get_backlight = i9xx_get_backlight;
1724                 dev_priv->display.backlight_hz_to_pwm = i965_hz_to_pwm;
1725         } else {
1726                 dev_priv->display.setup_backlight = i9xx_setup_backlight;
1727                 dev_priv->display.enable_backlight = i9xx_enable_backlight;
1728                 dev_priv->display.disable_backlight = i9xx_disable_backlight;
1729                 dev_priv->display.set_backlight = i9xx_set_backlight;
1730                 dev_priv->display.get_backlight = i9xx_get_backlight;
1731                 dev_priv->display.backlight_hz_to_pwm = i9xx_hz_to_pwm;
1732         }
1733 }
1734
1735 int intel_panel_init(struct intel_panel *panel,
1736                      struct drm_display_mode *fixed_mode,
1737                      struct drm_display_mode *downclock_mode)
1738 {
1739         panel->fixed_mode = fixed_mode;
1740         panel->downclock_mode = downclock_mode;
1741
1742         return 0;
1743 }
1744
1745 void intel_panel_fini(struct intel_panel *panel)
1746 {
1747         struct intel_connector *intel_connector =
1748                 container_of(panel, struct intel_connector, panel);
1749
1750         if (panel->fixed_mode)
1751                 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1752
1753         if (panel->downclock_mode)
1754                 drm_mode_destroy(intel_connector->base.dev,
1755                                 panel->downclock_mode);
1756 }
1757
1758 void intel_backlight_register(struct drm_device *dev)
1759 {
1760         struct intel_connector *connector;
1761
1762         list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1763                 intel_backlight_device_register(connector);
1764 }
1765
1766 void intel_backlight_unregister(struct drm_device *dev)
1767 {
1768         struct intel_connector *connector;
1769
1770         list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1771                 intel_backlight_device_unregister(connector);
1772 }