drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_atomic_helper.h>
  34 #include <drm/drm_crtc.h>
  35 #include <drm/drm_edid.h>
  36 #include "intel_drv.h"
  37 #include <drm/i915_drm.h>
  38 #include "i915_drv.h"
  39 #include "intel_sdvo_regs.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char *tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         struct i2c_adapter *i2c;
  72         u8 slave_addr;
  73
  74         struct i2c_adapter ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         uint32_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * intel_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint16_t hotplug_active;
 101
 102         /**
 103          * This is used to select the color range of RBG outputs in HDMI mode.
 104          * It is only valid when using TMDS encoding and 8 bit per color mode.
 105          */
 106         uint32_t color_range;
 107         bool color_range_auto;
 108
 109         /**
 110          * This is set if we're going to treat the device as TV-out.
 111          *
 112          * While we have these nice friendly flags for output types that ought
 113          * to decide this for us, the S-Video output on our HDMI+S-Video card
 114          * shows up as RGB1 (VGA).
 115          */
 116         bool is_tv;
 117
 118         /* On different gens SDVOB is at different places. */
 119         bool is_sdvob;
 120
 121         /* This is for current tv format name */
 122         int tv_format_index;
 123
 124         /**
 125          * This is set if we treat the device as HDMI, instead of DVI.
 126          */
 127         bool is_hdmi;
 128         bool has_hdmi_monitor;
 129         bool has_hdmi_audio;
 130         bool rgb_quant_range_selectable;
 131
 132         /**
 133          * This is set if we detect output of sdvo device as LVDS and
 134          * have a valid fixed mode to use with the panel.
 135          */
 136         bool is_lvds;
 137
 138         /**
 139          * This is sdvo fixed pannel mode pointer
 140          */
 141         struct drm_display_mode *sdvo_lvds_fixed_mode;
 142
 143         /* DDC bus used by this SDVO encoder */
 144         uint8_t ddc_bus;
 145
 146         /*
 147          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 148          */
 149         uint8_t dtd_sdvo_flags;
 150 };
 151
 152 struct intel_sdvo_connector {
 153         struct intel_connector base;
 154
 155         /* Mark the type of connector */
 156         uint16_t output_flag;
 157
 158         enum hdmi_force_audio force_audio;
 159
 160         /* This contains all current supported TV format */
 161         u8 tv_format_supported[TV_FORMAT_NUM];
 162         int   format_supported_num;
 163         struct drm_property *tv_format;
 164
 165         /* add the property for the SDVO-TV */
 166         struct drm_property *left;
 167         struct drm_property *right;
 168         struct drm_property *top;
 169         struct drm_property *bottom;
 170         struct drm_property *hpos;
 171         struct drm_property *vpos;
 172         struct drm_property *contrast;
 173         struct drm_property *saturation;
 174         struct drm_property *hue;
 175         struct drm_property *sharpness;
 176         struct drm_property *flicker_filter;
 177         struct drm_property *flicker_filter_adaptive;
 178         struct drm_property *flicker_filter_2d;
 179         struct drm_property *tv_chroma_filter;
 180         struct drm_property *tv_luma_filter;
 181         struct drm_property *dot_crawl;
 182
 183         /* add the property for the SDVO-TV/LVDS */
 184         struct drm_property *brightness;
 185
 186         /* Add variable to record current setting for the above property */
 187         u32     left_margin, right_margin, top_margin, bottom_margin;
 188
 189         /* this is to get the range of margin.*/
 190         u32     max_hscan,  max_vscan;
 191         u32     max_hpos, cur_hpos;
 192         u32     max_vpos, cur_vpos;
 193         u32     cur_brightness, max_brightness;
 194         u32     cur_contrast,   max_contrast;
 195         u32     cur_saturation, max_saturation;
 196         u32     cur_hue,        max_hue;
 197         u32     cur_sharpness,  max_sharpness;
 198         u32     cur_flicker_filter,             max_flicker_filter;
 199         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 200         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 201         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 202         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 203         u32     cur_dot_crawl,  max_dot_crawl;
 204 };
 205
 206 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 207 {
 208         return container_of(encoder, struct intel_sdvo, base);
 209 }
 210
 211 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 212 {
 213         return to_sdvo(intel_attached_encoder(connector));
 214 }
 215
 216 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 217 {
 218         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 219 }
 220
 221 static bool
 222 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 223 static bool
 224 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 225                               struct intel_sdvo_connector *intel_sdvo_connector,
 226                               int type);
 227 static bool
 228 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 229                                    struct intel_sdvo_connector *intel_sdvo_connector);
 230
 231 /**
 232  * Writes the SDVOB or SDVOC with the given value, but always writes both
 233  * SDVOB and SDVOC to work around apparent hardware issues (according to
 234  * comments in the BIOS).
 235  */
 236 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 237 {
 238         struct drm_device *dev = intel_sdvo->base.base.dev;
 239         struct drm_i915_private *dev_priv = dev->dev_private;
 240         u32 bval = val, cval = val;
 241         int i;
 242
 243         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 244                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 245                 POSTING_READ(intel_sdvo->sdvo_reg);
 246                 /*
 247                  * HW workaround, need to write this twice for issue
 248                  * that may result in first write getting masked.
 249                  */
 250                 if (HAS_PCH_IBX(dev)) {
 251                         I915_WRITE(intel_sdvo->sdvo_reg, val);
 252                         POSTING_READ(intel_sdvo->sdvo_reg);
 253                 }
 254                 return;
 255         }
 256
 257         if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
 258                 cval = I915_READ(GEN3_SDVOC);
 259         else
 260                 bval = I915_READ(GEN3_SDVOB);
 261
 262         /*
 263          * Write the registers twice for luck. Sometimes,
 264          * writing them only once doesn't appear to 'stick'.
 265          * The BIOS does this too. Yay, magic
 266          */
 267         for (i = 0; i < 2; i++)
 268         {
 269                 I915_WRITE(GEN3_SDVOB, bval);
 270                 POSTING_READ(GEN3_SDVOB);
 271                 I915_WRITE(GEN3_SDVOC, cval);
 272                 POSTING_READ(GEN3_SDVOC);
 273         }
 274 }
 275
 276 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 277 {
 278         struct i2c_msg msgs[] = {
 279                 {
 280                         .addr = intel_sdvo->slave_addr,
 281                         .flags = 0,
 282                         .len = 1,
 283                         .buf = &addr,
 284                 },
 285                 {
 286                         .addr = intel_sdvo->slave_addr,
 287                         .flags = I2C_M_RD,
 288                         .len = 1,
 289                         .buf = ch,
 290                 }
 291         };
 292         int ret;
 293
 294         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 295                 return true;
 296
 297         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 298         return false;
 299 }
 300
 301 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 302 /** Mapping of command numbers to names, for debug output */
 303 static const struct _sdvo_cmd_name {
 304         u8 cmd;
 305         const char *name;
 306 } sdvo_cmd_names[] = {
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 350
 351         /* Add the op code for SDVO enhancements */
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 396
 397         /* HDMI op code */
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 409         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 410         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 411         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 412         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 413         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 414         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 415         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 416         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 417         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 418 };
 419
 420 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 421
 422 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 423                                    const void *args, int args_len)
 424 {
 425         int i, pos = 0;
 426 #define BUF_LEN 256
 427         char buffer[BUF_LEN];
 428
 429 #define BUF_PRINT(args...) \
 430         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 431
 432
 433         for (i = 0; i < args_len; i++) {
 434                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 435         }
 436         for (; i < 8; i++) {
 437                 BUF_PRINT("   ");
 438         }
 439         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 440                 if (cmd == sdvo_cmd_names[i].cmd) {
 441                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 442                         break;
 443                 }
 444         }
 445         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 446                 BUF_PRINT("(%02X)", cmd);
 447         }
 448         BUG_ON(pos >= BUF_LEN - 1);
 449 #undef BUF_PRINT
 450 #undef BUF_LEN
 451
 452         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 453 }
 454
 455 static const char *cmd_status_names[] = {
 456         "Power on",
 457         "Success",
 458         "Not supported",
 459         "Invalid arg",
 460         "Pending",
 461         "Target not specified",
 462         "Scaling not supported"
 463 };
 464
 465 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 466                                  const void *args, int args_len)
 467 {
 468         u8 *buf, status;
 469         struct i2c_msg *msgs;
 470         int i, ret = true;
 471
 472         /* Would be simpler to allocate both in one go ? */
 473         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 474         if (!buf)
 475                 return false;
 476
 477         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 478         if (!msgs) {
 479                 kfree(buf);
 480                 return false;
 481         }
 482
 483         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 484
 485         for (i = 0; i < args_len; i++) {
 486                 msgs[i].addr = intel_sdvo->slave_addr;
 487                 msgs[i].flags = 0;
 488                 msgs[i].len = 2;
 489                 msgs[i].buf = buf + 2 *i;
 490                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 491                 buf[2*i + 1] = ((u8*)args)[i];
 492         }
 493         msgs[i].addr = intel_sdvo->slave_addr;
 494         msgs[i].flags = 0;
 495         msgs[i].len = 2;
 496         msgs[i].buf = buf + 2*i;
 497         buf[2*i + 0] = SDVO_I2C_OPCODE;
 498         buf[2*i + 1] = cmd;
 499
 500         /* the following two are to read the response */
 501         status = SDVO_I2C_CMD_STATUS;
 502         msgs[i+1].addr = intel_sdvo->slave_addr;
 503         msgs[i+1].flags = 0;
 504         msgs[i+1].len = 1;
 505         msgs[i+1].buf = &status;
 506
 507         msgs[i+2].addr = intel_sdvo->slave_addr;
 508         msgs[i+2].flags = I2C_M_RD;
 509         msgs[i+2].len = 1;
 510         msgs[i+2].buf = &status;
 511
 512         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 513         if (ret < 0) {
 514                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 515                 ret = false;
 516                 goto out;
 517         }
 518         if (ret != i+3) {
 519                 /* failure in I2C transfer */
 520                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 521                 ret = false;
 522         }
 523
 524 out:
 525         kfree(msgs);
 526         kfree(buf);
 527         return ret;
 528 }
 529
 530 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 531                                      void *response, int response_len)
 532 {
 533         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 534         u8 status;
 535         int i, pos = 0;
 536 #define BUF_LEN 256
 537         char buffer[BUF_LEN];
 538
 539
 540         /*
 541          * The documentation states that all commands will be
 542          * processed within 15µs, and that we need only poll
 543          * the status byte a maximum of 3 times in order for the
 544          * command to be complete.
 545          *
 546          * Check 5 times in case the hardware failed to read the docs.
 547          *
 548          * Also beware that the first response by many devices is to
 549          * reply PENDING and stall for time. TVs are notorious for
 550          * requiring longer than specified to complete their replies.
 551          * Originally (in the DDX long ago), the delay was only ever 15ms
 552          * with an additional delay of 30ms applied for TVs added later after
 553          * many experiments. To accommodate both sets of delays, we do a
 554          * sequence of slow checks if the device is falling behind and fails
 555          * to reply within 5*15µs.
 556          */
 557         if (!intel_sdvo_read_byte(intel_sdvo,
 558                                   SDVO_I2C_CMD_STATUS,
 559                                   &status))
 560                 goto log_fail;
 561
 562         while ((status == SDVO_CMD_STATUS_PENDING ||
 563                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 564                 if (retry < 10)
 565                         msleep(15);
 566                 else
 567                         udelay(15);
 568
 569                 if (!intel_sdvo_read_byte(intel_sdvo,
 570                                           SDVO_I2C_CMD_STATUS,
 571                                           &status))
 572                         goto log_fail;
 573         }
 574
 575 #define BUF_PRINT(args...) \
 576         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 577
 578         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 579                 BUF_PRINT("(%s)", cmd_status_names[status]);
 580         else
 581                 BUF_PRINT("(??? %d)", status);
 582
 583         if (status != SDVO_CMD_STATUS_SUCCESS)
 584                 goto log_fail;
 585
 586         /* Read the command response */
 587         for (i = 0; i < response_len; i++) {
 588                 if (!intel_sdvo_read_byte(intel_sdvo,
 589                                           SDVO_I2C_RETURN_0 + i,
 590                                           &((u8 *)response)[i]))
 591                         goto log_fail;
 592                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 593         }
 594         BUG_ON(pos >= BUF_LEN - 1);
 595 #undef BUF_PRINT
 596 #undef BUF_LEN
 597
 598         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 599         return true;
 600
 601 log_fail:
 602         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 603         return false;
 604 }
 605
 606 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 607 {
 608         if (mode->clock >= 100000)
 609                 return 1;
 610         else if (mode->clock >= 50000)
 611                 return 2;
 612         else
 613                 return 4;
 614 }
 615
 616 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 617                                               u8 ddc_bus)
 618 {
 619         /* This must be the immediately preceding write before the i2c xfer */
 620         return intel_sdvo_write_cmd(intel_sdvo,
 621                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 622                                     &ddc_bus, 1);
 623 }
 624
 625 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 626 {
 627         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 628                 return false;
 629
 630         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 631 }
 632
 633 static bool
 634 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 635 {
 636         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 637                 return false;
 638
 639         return intel_sdvo_read_response(intel_sdvo, value, len);
 640 }
 641
 642 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 643 {
 644         struct intel_sdvo_set_target_input_args targets = {0};
 645         return intel_sdvo_set_value(intel_sdvo,
 646                                     SDVO_CMD_SET_TARGET_INPUT,
 647                                     &targets, sizeof(targets));
 648 }
 649
 650 /**
 651  * Return whether each input is trained.
 652  *
 653  * This function is making an assumption about the layout of the response,
 654  * which should be checked against the docs.
 655  */
 656 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 657 {
 658         struct intel_sdvo_get_trained_inputs_response response;
 659
 660         BUILD_BUG_ON(sizeof(response) != 1);
 661         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 662                                   &response, sizeof(response)))
 663                 return false;
 664
 665         *input_1 = response.input0_trained;
 666         *input_2 = response.input1_trained;
 667         return true;
 668 }
 669
 670 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 671                                           u16 outputs)
 672 {
 673         return intel_sdvo_set_value(intel_sdvo,
 674                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 675                                     &outputs, sizeof(outputs));
 676 }
 677
 678 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 679                                           u16 *outputs)
 680 {
 681         return intel_sdvo_get_value(intel_sdvo,
 682                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 683                                     outputs, sizeof(*outputs));
 684 }
 685
 686 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 687                                                int mode)
 688 {
 689         u8 state = SDVO_ENCODER_STATE_ON;
 690
 691         switch (mode) {
 692         case DRM_MODE_DPMS_ON:
 693                 state = SDVO_ENCODER_STATE_ON;
 694                 break;
 695         case DRM_MODE_DPMS_STANDBY:
 696                 state = SDVO_ENCODER_STATE_STANDBY;
 697                 break;
 698         case DRM_MODE_DPMS_SUSPEND:
 699                 state = SDVO_ENCODER_STATE_SUSPEND;
 700                 break;
 701         case DRM_MODE_DPMS_OFF:
 702                 state = SDVO_ENCODER_STATE_OFF;
 703                 break;
 704         }
 705
 706         return intel_sdvo_set_value(intel_sdvo,
 707                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 708 }
 709
 710 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 711                                                    int *clock_min,
 712                                                    int *clock_max)
 713 {
 714         struct intel_sdvo_pixel_clock_range clocks;
 715
 716         BUILD_BUG_ON(sizeof(clocks) != 4);
 717         if (!intel_sdvo_get_value(intel_sdvo,
 718                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 719                                   &clocks, sizeof(clocks)))
 720                 return false;
 721
 722         /* Convert the values from units of 10 kHz to kHz. */
 723         *clock_min = clocks.min * 10;
 724         *clock_max = clocks.max * 10;
 725         return true;
 726 }
 727
 728 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 729                                          u16 outputs)
 730 {
 731         return intel_sdvo_set_value(intel_sdvo,
 732                                     SDVO_CMD_SET_TARGET_OUTPUT,
 733                                     &outputs, sizeof(outputs));
 734 }
 735
 736 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 737                                   struct intel_sdvo_dtd *dtd)
 738 {
 739         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 740                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 741 }
 742
 743 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 744                                   struct intel_sdvo_dtd *dtd)
 745 {
 746         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 747                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 748 }
 749
 750 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 751                                          struct intel_sdvo_dtd *dtd)
 752 {
 753         return intel_sdvo_set_timing(intel_sdvo,
 754                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 755 }
 756
 757 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 758                                          struct intel_sdvo_dtd *dtd)
 759 {
 760         return intel_sdvo_set_timing(intel_sdvo,
 761                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 762 }
 763
 764 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 765                                         struct intel_sdvo_dtd *dtd)
 766 {
 767         return intel_sdvo_get_timing(intel_sdvo,
 768                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 769 }
 770
 771 static bool
 772 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 773                                          uint16_t clock,
 774                                          uint16_t width,
 775                                          uint16_t height)
 776 {
 777         struct intel_sdvo_preferred_input_timing_args args;
 778
 779         memset(&args, 0, sizeof(args));
 780         args.clock = clock;
 781         args.width = width;
 782         args.height = height;
 783         args.interlace = 0;
 784
 785         if (intel_sdvo->is_lvds &&
 786            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 787             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 788                 args.scaled = 1;
 789
 790         return intel_sdvo_set_value(intel_sdvo,
 791                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 792                                     &args, sizeof(args));
 793 }
 794
 795 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 796                                                   struct intel_sdvo_dtd *dtd)
 797 {
 798         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 799         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 800         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 801                                     &dtd->part1, sizeof(dtd->part1)) &&
 802                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 803                                      &dtd->part2, sizeof(dtd->part2));
 804 }
 805
 806 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 807 {
 808         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 809 }
 810
 811 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 812                                          const struct drm_display_mode *mode)
 813 {
 814         uint16_t width, height;
 815         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 816         uint16_t h_sync_offset, v_sync_offset;
 817         int mode_clock;
 818
 819         memset(dtd, 0, sizeof(*dtd));
 820
 821         width = mode->hdisplay;
 822         height = mode->vdisplay;
 823
 824         /* do some mode translations */
 825         h_blank_len = mode->htotal - mode->hdisplay;
 826         h_sync_len = mode->hsync_end - mode->hsync_start;
 827
 828         v_blank_len = mode->vtotal - mode->vdisplay;
 829         v_sync_len = mode->vsync_end - mode->vsync_start;
 830
 831         h_sync_offset = mode->hsync_start - mode->hdisplay;
 832         v_sync_offset = mode->vsync_start - mode->vdisplay;
 833
 834         mode_clock = mode->clock;
 835         mode_clock /= 10;
 836         dtd->part1.clock = mode_clock;
 837
 838         dtd->part1.h_active = width & 0xff;
 839         dtd->part1.h_blank = h_blank_len & 0xff;
 840         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 841                 ((h_blank_len >> 8) & 0xf);
 842         dtd->part1.v_active = height & 0xff;
 843         dtd->part1.v_blank = v_blank_len & 0xff;
 844         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 845                 ((v_blank_len >> 8) & 0xf);
 846
 847         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 848         dtd->part2.h_sync_width = h_sync_len & 0xff;
 849         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 850                 (v_sync_len & 0xf);
 851         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 852                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 853                 ((v_sync_len & 0x30) >> 4);
 854
 855         dtd->part2.dtd_flags = 0x18;
 856         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 857                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 858         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 859                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 860         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 861                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 862
 863         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 864 }
 865
 866 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 867                                          const struct intel_sdvo_dtd *dtd)
 868 {
 869         struct drm_display_mode mode = {};
 870
 871         mode.hdisplay = dtd->part1.h_active;
 872         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 873         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 874         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 875         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 876         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 877         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 878         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 879
 880         mode.vdisplay = dtd->part1.v_active;
 881         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 882         mode.vsync_start = mode.vdisplay;
 883         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 884         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 885         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 886         mode.vsync_end = mode.vsync_start +
 887                 (dtd->part2.v_sync_off_width & 0xf);
 888         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 889         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 890         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 891
 892         mode.clock = dtd->part1.clock * 10;
 893
 894         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 895                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 896         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 897                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 898         else
 899                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 900         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 901                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 902         else
 903                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 904
 905         drm_mode_set_crtcinfo(&mode, 0);
 906
 907         drm_mode_copy(pmode, &mode);
 908 }
 909
 910 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 911 {
 912         struct intel_sdvo_encode encode;
 913
 914         BUILD_BUG_ON(sizeof(encode) != 2);
 915         return intel_sdvo_get_value(intel_sdvo,
 916                                   SDVO_CMD_GET_SUPP_ENCODE,
 917                                   &encode, sizeof(encode));
 918 }
 919
 920 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 921                                   uint8_t mode)
 922 {
 923         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 924 }
 925
 926 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 927                                        uint8_t mode)
 928 {
 929         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 930 }
 931
 932 #if 0
 933 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 934 {
 935         int i, j;
 936         uint8_t set_buf_index[2];
 937         uint8_t av_split;
 938         uint8_t buf_size;
 939         uint8_t buf[48];
 940         uint8_t *pos;
 941
 942         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 943
 944         for (i = 0; i <= av_split; i++) {
 945                 set_buf_index[0] = i; set_buf_index[1] = 0;
 946                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 947                                      set_buf_index, 2);
 948                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 949                 intel_sdvo_read_response(encoder, &buf_size, 1);
 950
 951                 pos = buf;
 952                 for (j = 0; j <= buf_size; j += 8) {
 953                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 954                                              NULL, 0);
 955                         intel_sdvo_read_response(encoder, pos, 8);
 956                         pos += 8;
 957                 }
 958         }
 959 }
 960 #endif
 961
 962 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 963                                        unsigned if_index, uint8_t tx_rate,
 964                                        const uint8_t *data, unsigned length)
 965 {
 966         uint8_t set_buf_index[2] = { if_index, 0 };
 967         uint8_t hbuf_size, tmp[8];
 968         int i;
 969
 970         if (!intel_sdvo_set_value(intel_sdvo,
 971                                   SDVO_CMD_SET_HBUF_INDEX,
 972                                   set_buf_index, 2))
 973                 return false;
 974
 975         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 976                                   &hbuf_size, 1))
 977                 return false;
 978
 979         /* Buffer size is 0 based, hooray! */
 980         hbuf_size++;
 981
 982         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 983                       if_index, length, hbuf_size);
 984
 985         for (i = 0; i < hbuf_size; i += 8) {
 986                 memset(tmp, 0, 8);
 987                 if (i < length)
 988                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 989
 990                 if (!intel_sdvo_set_value(intel_sdvo,
 991                                           SDVO_CMD_SET_HBUF_DATA,
 992                                           tmp, 8))
 993                         return false;
 994         }
 995
 996         return intel_sdvo_set_value(intel_sdvo,
 997                                     SDVO_CMD_SET_HBUF_TXRATE,
 998                                     &tx_rate, 1);
 999 }
1000
1001 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1002                                          const struct drm_display_mode *adjusted_mode)
1003 {
1004         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1005         struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1006         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1007         union hdmi_infoframe frame;
1008         int ret;
1009         ssize_t len;
1010
1011         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1012                                                        adjusted_mode);
1013         if (ret < 0) {
1014                 DRM_ERROR("couldn't fill AVI infoframe\n");
1015                 return false;
1016         }
1017
1018         if (intel_sdvo->rgb_quant_range_selectable) {
1019                 if (intel_crtc->config->limited_color_range)
1020                         frame.avi.quantization_range =
1021                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1022                 else
1023                         frame.avi.quantization_range =
1024                                 HDMI_QUANTIZATION_RANGE_FULL;
1025         }
1026
1027         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1028         if (len < 0)
1029                 return false;
1030
1031         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1032                                           SDVO_HBUF_TX_VSYNC,
1033                                           sdvo_data, sizeof(sdvo_data));
1034 }
1035
1036 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
1037 {
1038         struct intel_sdvo_tv_format format;
1039         uint32_t format_map;
1040
1041         format_map = 1 << intel_sdvo->tv_format_index;
1042         memset(&format, 0, sizeof(format));
1043         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1044
1045         BUILD_BUG_ON(sizeof(format) != 6);
1046         return intel_sdvo_set_value(intel_sdvo,
1047                                     SDVO_CMD_SET_TV_FORMAT,
1048                                     &format, sizeof(format));
1049 }
1050
1051 static bool
1052 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1053                                         const struct drm_display_mode *mode)
1054 {
1055         struct intel_sdvo_dtd output_dtd;
1056
1057         if (!intel_sdvo_set_target_output(intel_sdvo,
1058                                           intel_sdvo->attached_output))
1059                 return false;
1060
1061         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1062         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1063                 return false;
1064
1065         return true;
1066 }
1067
1068 /* Asks the sdvo controller for the preferred input mode given the output mode.
1069  * Unfortunately we have to set up the full output mode to do that. */
1070 static bool
1071 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1072                                     const struct drm_display_mode *mode,
1073                                     struct drm_display_mode *adjusted_mode)
1074 {
1075         struct intel_sdvo_dtd input_dtd;
1076
1077         /* Reset the input timing to the screen. Assume always input 0. */
1078         if (!intel_sdvo_set_target_input(intel_sdvo))
1079                 return false;
1080
1081         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1082                                                       mode->clock / 10,
1083                                                       mode->hdisplay,
1084                                                       mode->vdisplay))
1085                 return false;
1086
1087         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1088                                                    &input_dtd))
1089                 return false;
1090
1091         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1092         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1093
1094         return true;
1095 }
1096
1097 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1098 {
1099         unsigned dotclock = pipe_config->port_clock;
1100         struct dpll *clock = &pipe_config->dpll;
1101
1102         /* SDVO TV has fixed PLL values depend on its clock range,
1103            this mirrors vbios setting. */
1104         if (dotclock >= 100000 && dotclock < 140500) {
1105                 clock->p1 = 2;
1106                 clock->p2 = 10;
1107                 clock->n = 3;
1108                 clock->m1 = 16;
1109                 clock->m2 = 8;
1110         } else if (dotclock >= 140500 && dotclock <= 200000) {
1111                 clock->p1 = 1;
1112                 clock->p2 = 10;
1113                 clock->n = 6;
1114                 clock->m1 = 12;
1115                 clock->m2 = 8;
1116         } else {
1117                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1118         }
1119
1120         pipe_config->clock_set = true;
1121 }
1122
1123 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1124                                       struct intel_crtc_state *pipe_config)
1125 {
1126         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1127         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1128         struct drm_display_mode *mode = &pipe_config->base.mode;
1129
1130         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1131         pipe_config->pipe_bpp = 8*3;
1132
1133         if (HAS_PCH_SPLIT(encoder->base.dev))
1134                 pipe_config->has_pch_encoder = true;
1135
1136         /* We need to construct preferred input timings based on our
1137          * output timings.  To do that, we have to set the output
1138          * timings, even though this isn't really the right place in
1139          * the sequence to do it. Oh well.
1140          */
1141         if (intel_sdvo->is_tv) {
1142                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1143                         return false;
1144
1145                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1146                                                            mode,
1147                                                            adjusted_mode);
1148                 pipe_config->sdvo_tv_clock = true;
1149         } else if (intel_sdvo->is_lvds) {
1150                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1151                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1152                         return false;
1153
1154                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1155                                                            mode,
1156                                                            adjusted_mode);
1157         }
1158
1159         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1160          * SDVO device will factor out the multiplier during mode_set.
1161          */
1162         pipe_config->pixel_multiplier =
1163                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1164
1165         pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1166
1167         if (intel_sdvo->color_range_auto) {
1168                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1169                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1170                  * bit per color mode. */
1171                 if (pipe_config->has_hdmi_sink &&
1172                     drm_match_cea_mode(adjusted_mode) > 1)
1173                         pipe_config->limited_color_range = true;
1174         } else {
1175                 if (pipe_config->has_hdmi_sink &&
1176                     intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235)
1177                         pipe_config->limited_color_range = true;
1178         }
1179
1180         /* Clock computation needs to happen after pixel multiplier. */
1181         if (intel_sdvo->is_tv)
1182                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1183
1184         return true;
1185 }
1186
1187 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder)
1188 {
1189         struct drm_device *dev = intel_encoder->base.dev;
1190         struct drm_i915_private *dev_priv = dev->dev_private;
1191         struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc);
1192         struct drm_display_mode *adjusted_mode =
1193                 &crtc->config->base.adjusted_mode;
1194         struct drm_display_mode *mode = &crtc->config->base.mode;
1195         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1196         u32 sdvox;
1197         struct intel_sdvo_in_out_map in_out;
1198         struct intel_sdvo_dtd input_dtd, output_dtd;
1199         int rate;
1200
1201         if (!mode)
1202                 return;
1203
1204         /* First, set the input mapping for the first input to our controlled
1205          * output. This is only correct if we're a single-input device, in
1206          * which case the first input is the output from the appropriate SDVO
1207          * channel on the motherboard.  In a two-input device, the first input
1208          * will be SDVOB and the second SDVOC.
1209          */
1210         in_out.in0 = intel_sdvo->attached_output;
1211         in_out.in1 = 0;
1212
1213         intel_sdvo_set_value(intel_sdvo,
1214                              SDVO_CMD_SET_IN_OUT_MAP,
1215                              &in_out, sizeof(in_out));
1216
1217         /* Set the output timings to the screen */
1218         if (!intel_sdvo_set_target_output(intel_sdvo,
1219                                           intel_sdvo->attached_output))
1220                 return;
1221
1222         /* lvds has a special fixed output timing. */
1223         if (intel_sdvo->is_lvds)
1224                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1225                                              intel_sdvo->sdvo_lvds_fixed_mode);
1226         else
1227                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1228         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1229                 DRM_INFO("Setting output timings on %s failed\n",
1230                          SDVO_NAME(intel_sdvo));
1231
1232         /* Set the input timing to the screen. Assume always input 0. */
1233         if (!intel_sdvo_set_target_input(intel_sdvo))
1234                 return;
1235
1236         if (crtc->config->has_hdmi_sink) {
1237                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1238                 intel_sdvo_set_colorimetry(intel_sdvo,
1239                                            SDVO_COLORIMETRY_RGB256);
1240                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1241         } else
1242                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1243
1244         if (intel_sdvo->is_tv &&
1245             !intel_sdvo_set_tv_format(intel_sdvo))
1246                 return;
1247
1248         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1249
1250         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1251                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1252         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1253                 DRM_INFO("Setting input timings on %s failed\n",
1254                          SDVO_NAME(intel_sdvo));
1255
1256         switch (crtc->config->pixel_multiplier) {
1257         default:
1258                 WARN(1, "unknown pixel multiplier specified\n");
1259         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1260         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1261         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1262         }
1263         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1264                 return;
1265
1266         /* Set the SDVO control regs. */
1267         if (INTEL_INFO(dev)->gen >= 4) {
1268                 /* The real mode polarity is set by the SDVO commands, using
1269                  * struct intel_sdvo_dtd. */
1270                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1271                 if (!HAS_PCH_SPLIT(dev) && crtc->config->limited_color_range)
1272                         sdvox |= HDMI_COLOR_RANGE_16_235;
1273                 if (INTEL_INFO(dev)->gen < 5)
1274                         sdvox |= SDVO_BORDER_ENABLE;
1275         } else {
1276                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1277                 switch (intel_sdvo->sdvo_reg) {
1278                 case GEN3_SDVOB:
1279                         sdvox &= SDVOB_PRESERVE_MASK;
1280                         break;
1281                 case GEN3_SDVOC:
1282                         sdvox &= SDVOC_PRESERVE_MASK;
1283                         break;
1284                 }
1285                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1286         }
1287
1288         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1289                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1290         else
1291                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1292
1293         if (intel_sdvo->has_hdmi_audio)
1294                 sdvox |= SDVO_AUDIO_ENABLE;
1295
1296         if (INTEL_INFO(dev)->gen >= 4) {
1297                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1298         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1299                 /* done in crtc_mode_set as it lives inside the dpll register */
1300         } else {
1301                 sdvox |= (crtc->config->pixel_multiplier - 1)
1302                         << SDVO_PORT_MULTIPLY_SHIFT;
1303         }
1304
1305         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1306             INTEL_INFO(dev)->gen < 5)
1307                 sdvox |= SDVO_STALL_SELECT;
1308         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1309 }
1310
1311 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1312 {
1313         struct intel_sdvo_connector *intel_sdvo_connector =
1314                 to_intel_sdvo_connector(&connector->base);
1315         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1316         u16 active_outputs = 0;
1317
1318         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1319
1320         if (active_outputs & intel_sdvo_connector->output_flag)
1321                 return true;
1322         else
1323                 return false;
1324 }
1325
1326 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1327                                     enum pipe *pipe)
1328 {
1329         struct drm_device *dev = encoder->base.dev;
1330         struct drm_i915_private *dev_priv = dev->dev_private;
1331         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1332         u16 active_outputs = 0;
1333         u32 tmp;
1334
1335         tmp = I915_READ(intel_sdvo->sdvo_reg);
1336         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1337
1338         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1339                 return false;
1340
1341         if (HAS_PCH_CPT(dev))
1342                 *pipe = PORT_TO_PIPE_CPT(tmp);
1343         else
1344                 *pipe = PORT_TO_PIPE(tmp);
1345
1346         return true;
1347 }
1348
1349 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1350                                   struct intel_crtc_state *pipe_config)
1351 {
1352         struct drm_device *dev = encoder->base.dev;
1353         struct drm_i915_private *dev_priv = dev->dev_private;
1354         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1355         struct intel_sdvo_dtd dtd;
1356         int encoder_pixel_multiplier = 0;
1357         int dotclock;
1358         u32 flags = 0, sdvox;
1359         u8 val;
1360         bool ret;
1361
1362         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1363
1364         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1365         if (!ret) {
1366                 /* Some sdvo encoders are not spec compliant and don't
1367                  * implement the mandatory get_timings function. */
1368                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1369                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1370         } else {
1371                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1372                         flags |= DRM_MODE_FLAG_PHSYNC;
1373                 else
1374                         flags |= DRM_MODE_FLAG_NHSYNC;
1375
1376                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1377                         flags |= DRM_MODE_FLAG_PVSYNC;
1378                 else
1379                         flags |= DRM_MODE_FLAG_NVSYNC;
1380         }
1381
1382         pipe_config->base.adjusted_mode.flags |= flags;
1383
1384         /*
1385          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1386          * the sdvo port register, on all other platforms it is part of the dpll
1387          * state. Since the general pipe state readout happens before the
1388          * encoder->get_config we so already have a valid pixel multplier on all
1389          * other platfroms.
1390          */
1391         if (IS_I915G(dev) || IS_I915GM(dev)) {
1392                 pipe_config->pixel_multiplier =
1393                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1394                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1395         }
1396
1397         dotclock = pipe_config->port_clock;
1398         if (pipe_config->pixel_multiplier)
1399                 dotclock /= pipe_config->pixel_multiplier;
1400
1401         if (HAS_PCH_SPLIT(dev))
1402                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
1403
1404         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1405
1406         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1407         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1408                                  &val, 1)) {
1409                 switch (val) {
1410                 case SDVO_CLOCK_RATE_MULT_1X:
1411                         encoder_pixel_multiplier = 1;
1412                         break;
1413                 case SDVO_CLOCK_RATE_MULT_2X:
1414                         encoder_pixel_multiplier = 2;
1415                         break;
1416                 case SDVO_CLOCK_RATE_MULT_4X:
1417                         encoder_pixel_multiplier = 4;
1418                         break;
1419                 }
1420         }
1421
1422         if (sdvox & HDMI_COLOR_RANGE_16_235)
1423                 pipe_config->limited_color_range = true;
1424
1425         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1426                                  &val, 1)) {
1427                 if (val == SDVO_ENCODE_HDMI)
1428                         pipe_config->has_hdmi_sink = true;
1429         }
1430
1431         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1432              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1433              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1434 }
1435
1436 static void intel_disable_sdvo(struct intel_encoder *encoder)
1437 {
1438         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1439         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1440         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
1441         u32 temp;
1442
1443         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1444         if (0)
1445                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1446                                                    DRM_MODE_DPMS_OFF);
1447
1448         temp = I915_READ(intel_sdvo->sdvo_reg);
1449
1450         temp &= ~SDVO_ENABLE;
1451         intel_sdvo_write_sdvox(intel_sdvo, temp);
1452
1453         /*
1454          * HW workaround for IBX, we need to move the port
1455          * to transcoder A after disabling it to allow the
1456          * matching DP port to be enabled on transcoder A.
1457          */
1458         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1459                 temp &= ~SDVO_PIPE_B_SELECT;
1460                 temp |= SDVO_ENABLE;
1461                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1462
1463                 temp &= ~SDVO_ENABLE;
1464                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1465         }
1466 }
1467
1468 static void pch_disable_sdvo(struct intel_encoder *encoder)
1469 {
1470 }
1471
1472 static void pch_post_disable_sdvo(struct intel_encoder *encoder)
1473 {
1474         intel_disable_sdvo(encoder);
1475 }
1476
1477 static void intel_enable_sdvo(struct intel_encoder *encoder)
1478 {
1479         struct drm_device *dev = encoder->base.dev;
1480         struct drm_i915_private *dev_priv = dev->dev_private;
1481         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1482         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1483         u32 temp;
1484         bool input1, input2;
1485         int i;
1486         bool success;
1487
1488         temp = I915_READ(intel_sdvo->sdvo_reg);
1489         temp |= SDVO_ENABLE;
1490         intel_sdvo_write_sdvox(intel_sdvo, temp);
1491
1492         for (i = 0; i < 2; i++)
1493                 intel_wait_for_vblank(dev, intel_crtc->pipe);
1494
1495         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1496         /* Warn if the device reported failure to sync.
1497          * A lot of SDVO devices fail to notify of sync, but it's
1498          * a given it the status is a success, we succeeded.
1499          */
1500         if (success && !input1) {
1501                 DRM_DEBUG_KMS("First %s output reported failure to "
1502                                 "sync\n", SDVO_NAME(intel_sdvo));
1503         }
1504
1505         if (0)
1506                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1507                                                    DRM_MODE_DPMS_ON);
1508         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1509 }
1510
1511 static enum drm_mode_status
1512 intel_sdvo_mode_valid(struct drm_connector *connector,
1513                       struct drm_display_mode *mode)
1514 {
1515         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1516
1517         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1518                 return MODE_NO_DBLESCAN;
1519
1520         if (intel_sdvo->pixel_clock_min > mode->clock)
1521                 return MODE_CLOCK_LOW;
1522
1523         if (intel_sdvo->pixel_clock_max < mode->clock)
1524                 return MODE_CLOCK_HIGH;
1525
1526         if (intel_sdvo->is_lvds) {
1527                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1528                         return MODE_PANEL;
1529
1530                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1531                         return MODE_PANEL;
1532         }
1533
1534         return MODE_OK;
1535 }
1536
1537 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1538 {
1539         BUILD_BUG_ON(sizeof(*caps) != 8);
1540         if (!intel_sdvo_get_value(intel_sdvo,
1541                                   SDVO_CMD_GET_DEVICE_CAPS,
1542                                   caps, sizeof(*caps)))
1543                 return false;
1544
1545         DRM_DEBUG_KMS("SDVO capabilities:\n"
1546                       "  vendor_id: %d\n"
1547                       "  device_id: %d\n"
1548                       "  device_rev_id: %d\n"
1549                       "  sdvo_version_major: %d\n"
1550                       "  sdvo_version_minor: %d\n"
1551                       "  sdvo_inputs_mask: %d\n"
1552                       "  smooth_scaling: %d\n"
1553                       "  sharp_scaling: %d\n"
1554                       "  up_scaling: %d\n"
1555                       "  down_scaling: %d\n"
1556                       "  stall_support: %d\n"
1557                       "  output_flags: %d\n",
1558                       caps->vendor_id,
1559                       caps->device_id,
1560                       caps->device_rev_id,
1561                       caps->sdvo_version_major,
1562                       caps->sdvo_version_minor,
1563                       caps->sdvo_inputs_mask,
1564                       caps->smooth_scaling,
1565                       caps->sharp_scaling,
1566                       caps->up_scaling,
1567                       caps->down_scaling,
1568                       caps->stall_support,
1569                       caps->output_flags);
1570
1571         return true;
1572 }
1573
1574 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1575 {
1576         struct drm_device *dev = intel_sdvo->base.base.dev;
1577         uint16_t hotplug;
1578
1579         if (!I915_HAS_HOTPLUG(dev))
1580                 return 0;
1581
1582         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1583          * on the line. */
1584         if (IS_I945G(dev) || IS_I945GM(dev))
1585                 return 0;
1586
1587         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1588                                         &hotplug, sizeof(hotplug)))
1589                 return 0;
1590
1591         return hotplug;
1592 }
1593
1594 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1595 {
1596         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1597
1598         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1599                         &intel_sdvo->hotplug_active, 2);
1600 }
1601
1602 static bool
1603 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1604 {
1605         /* Is there more than one type of output? */
1606         return hweight16(intel_sdvo->caps.output_flags) > 1;
1607 }
1608
1609 static struct edid *
1610 intel_sdvo_get_edid(struct drm_connector *connector)
1611 {
1612         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1613         return drm_get_edid(connector, &sdvo->ddc);
1614 }
1615
1616 /* Mac mini hack -- use the same DDC as the analog connector */
1617 static struct edid *
1618 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1619 {
1620         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1621
1622         return drm_get_edid(connector,
1623                             intel_gmbus_get_adapter(dev_priv,
1624                                                     dev_priv->vbt.crt_ddc_pin));
1625 }
1626
1627 static enum drm_connector_status
1628 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1629 {
1630         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1631         enum drm_connector_status status;
1632         struct edid *edid;
1633
1634         edid = intel_sdvo_get_edid(connector);
1635
1636         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1637                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1638
1639                 /*
1640                  * Don't use the 1 as the argument of DDC bus switch to get
1641                  * the EDID. It is used for SDVO SPD ROM.
1642                  */
1643                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1644                         intel_sdvo->ddc_bus = ddc;
1645                         edid = intel_sdvo_get_edid(connector);
1646                         if (edid)
1647                                 break;
1648                 }
1649                 /*
1650                  * If we found the EDID on the other bus,
1651                  * assume that is the correct DDC bus.
1652                  */
1653                 if (edid == NULL)
1654                         intel_sdvo->ddc_bus = saved_ddc;
1655         }
1656
1657         /*
1658          * When there is no edid and no monitor is connected with VGA
1659          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1660          */
1661         if (edid == NULL)
1662                 edid = intel_sdvo_get_analog_edid(connector);
1663
1664         status = connector_status_unknown;
1665         if (edid != NULL) {
1666                 /* DDC bus is shared, match EDID to connector type */
1667                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1668                         status = connector_status_connected;
1669                         if (intel_sdvo->is_hdmi) {
1670                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1671                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1672                                 intel_sdvo->rgb_quant_range_selectable =
1673                                         drm_rgb_quant_range_selectable(edid);
1674                         }
1675                 } else
1676                         status = connector_status_disconnected;
1677                 kfree(edid);
1678         }
1679
1680         if (status == connector_status_connected) {
1681                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1682                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1683                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1684         }
1685
1686         return status;
1687 }
1688
1689 static bool
1690 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1691                                   struct edid *edid)
1692 {
1693         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1694         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1695
1696         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1697                       connector_is_digital, monitor_is_digital);
1698         return connector_is_digital == monitor_is_digital;
1699 }
1700
1701 static enum drm_connector_status
1702 intel_sdvo_detect(struct drm_connector *connector, bool force)
1703 {
1704         uint16_t response;
1705         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1706         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1707         enum drm_connector_status ret;
1708
1709         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1710                       connector->base.id, connector->name);
1711
1712         if (!intel_sdvo_get_value(intel_sdvo,
1713                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1714                                   &response, 2))
1715                 return connector_status_unknown;
1716
1717         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1718                       response & 0xff, response >> 8,
1719                       intel_sdvo_connector->output_flag);
1720
1721         if (response == 0)
1722                 return connector_status_disconnected;
1723
1724         intel_sdvo->attached_output = response;
1725
1726         intel_sdvo->has_hdmi_monitor = false;
1727         intel_sdvo->has_hdmi_audio = false;
1728         intel_sdvo->rgb_quant_range_selectable = false;
1729
1730         if ((intel_sdvo_connector->output_flag & response) == 0)
1731                 ret = connector_status_disconnected;
1732         else if (IS_TMDS(intel_sdvo_connector))
1733                 ret = intel_sdvo_tmds_sink_detect(connector);
1734         else {
1735                 struct edid *edid;
1736
1737                 /* if we have an edid check it matches the connection */
1738                 edid = intel_sdvo_get_edid(connector);
1739                 if (edid == NULL)
1740                         edid = intel_sdvo_get_analog_edid(connector);
1741                 if (edid != NULL) {
1742                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1743                                                               edid))
1744                                 ret = connector_status_connected;
1745                         else
1746                                 ret = connector_status_disconnected;
1747
1748                         kfree(edid);
1749                 } else
1750                         ret = connector_status_connected;
1751         }
1752
1753         /* May update encoder flag for like clock for SDVO TV, etc.*/
1754         if (ret == connector_status_connected) {
1755                 intel_sdvo->is_tv = false;
1756                 intel_sdvo->is_lvds = false;
1757
1758                 if (response & SDVO_TV_MASK)
1759                         intel_sdvo->is_tv = true;
1760                 if (response & SDVO_LVDS_MASK)
1761                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1762         }
1763
1764         return ret;
1765 }
1766
1767 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1768 {
1769         struct edid *edid;
1770
1771         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1772                       connector->base.id, connector->name);
1773
1774         /* set the bus switch and get the modes */
1775         edid = intel_sdvo_get_edid(connector);
1776
1777         /*
1778          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1779          * link between analog and digital outputs. So, if the regular SDVO
1780          * DDC fails, check to see if the analog output is disconnected, in
1781          * which case we'll look there for the digital DDC data.
1782          */
1783         if (edid == NULL)
1784                 edid = intel_sdvo_get_analog_edid(connector);
1785
1786         if (edid != NULL) {
1787                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1788                                                       edid)) {
1789                         drm_mode_connector_update_edid_property(connector, edid);
1790                         drm_add_edid_modes(connector, edid);
1791                 }
1792
1793                 kfree(edid);
1794         }
1795 }
1796
1797 /*
1798  * Set of SDVO TV modes.
1799  * Note!  This is in reply order (see loop in get_tv_modes).
1800  * XXX: all 60Hz refresh?
1801  */
1802 static const struct drm_display_mode sdvo_tv_modes[] = {
1803         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1804                    416, 0, 200, 201, 232, 233, 0,
1805                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1806         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1807                    416, 0, 240, 241, 272, 273, 0,
1808                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1809         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1810                    496, 0, 300, 301, 332, 333, 0,
1811                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1812         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1813                    736, 0, 350, 351, 382, 383, 0,
1814                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1815         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1816                    736, 0, 400, 401, 432, 433, 0,
1817                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1818         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1819                    736, 0, 480, 481, 512, 513, 0,
1820                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1821         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1822                    800, 0, 480, 481, 512, 513, 0,
1823                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1824         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1825                    800, 0, 576, 577, 608, 609, 0,
1826                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1827         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1828                    816, 0, 350, 351, 382, 383, 0,
1829                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1830         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1831                    816, 0, 400, 401, 432, 433, 0,
1832                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1833         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1834                    816, 0, 480, 481, 512, 513, 0,
1835                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1836         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1837                    816, 0, 540, 541, 572, 573, 0,
1838                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1839         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1840                    816, 0, 576, 577, 608, 609, 0,
1841                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1842         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1843                    864, 0, 576, 577, 608, 609, 0,
1844                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1845         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1846                    896, 0, 600, 601, 632, 633, 0,
1847                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1848         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1849                    928, 0, 624, 625, 656, 657, 0,
1850                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1851         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1852                    1016, 0, 766, 767, 798, 799, 0,
1853                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1854         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1855                    1120, 0, 768, 769, 800, 801, 0,
1856                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1857         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1858                    1376, 0, 1024, 1025, 1056, 1057, 0,
1859                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1860 };
1861
1862 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1863 {
1864         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1865         struct intel_sdvo_sdtv_resolution_request tv_res;
1866         uint32_t reply = 0, format_map = 0;
1867         int i;
1868
1869         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1870                       connector->base.id, connector->name);
1871
1872         /* Read the list of supported input resolutions for the selected TV
1873          * format.
1874          */
1875         format_map = 1 << intel_sdvo->tv_format_index;
1876         memcpy(&tv_res, &format_map,
1877                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1878
1879         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1880                 return;
1881
1882         BUILD_BUG_ON(sizeof(tv_res) != 3);
1883         if (!intel_sdvo_write_cmd(intel_sdvo,
1884                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1885                                   &tv_res, sizeof(tv_res)))
1886                 return;
1887         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1888                 return;
1889
1890         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1891                 if (reply & (1 << i)) {
1892                         struct drm_display_mode *nmode;
1893                         nmode = drm_mode_duplicate(connector->dev,
1894                                                    &sdvo_tv_modes[i]);
1895                         if (nmode)
1896                                 drm_mode_probed_add(connector, nmode);
1897                 }
1898 }
1899
1900 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1901 {
1902         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1903         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1904         struct drm_display_mode *newmode;
1905
1906         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1907                       connector->base.id, connector->name);
1908
1909         /*
1910          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1911          * SDVO->LVDS transcoders can't cope with the EDID mode.
1912          */
1913         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1914                 newmode = drm_mode_duplicate(connector->dev,
1915                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
1916                 if (newmode != NULL) {
1917                         /* Guarantee the mode is preferred */
1918                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1919                                          DRM_MODE_TYPE_DRIVER);
1920                         drm_mode_probed_add(connector, newmode);
1921                 }
1922         }
1923
1924         /*
1925          * Attempt to get the mode list from DDC.
1926          * Assume that the preferred modes are
1927          * arranged in priority order.
1928          */
1929         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
1930
1931         list_for_each_entry(newmode, &connector->probed_modes, head) {
1932                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1933                         intel_sdvo->sdvo_lvds_fixed_mode =
1934                                 drm_mode_duplicate(connector->dev, newmode);
1935
1936                         intel_sdvo->is_lvds = true;
1937                         break;
1938                 }
1939         }
1940 }
1941
1942 static int intel_sdvo_get_modes(struct drm_connector *connector)
1943 {
1944         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1945
1946         if (IS_TV(intel_sdvo_connector))
1947                 intel_sdvo_get_tv_modes(connector);
1948         else if (IS_LVDS(intel_sdvo_connector))
1949                 intel_sdvo_get_lvds_modes(connector);
1950         else
1951                 intel_sdvo_get_ddc_modes(connector);
1952
1953         return !list_empty(&connector->probed_modes);
1954 }
1955
1956 static void intel_sdvo_destroy(struct drm_connector *connector)
1957 {
1958         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1959
1960         drm_connector_cleanup(connector);
1961         kfree(intel_sdvo_connector);
1962 }
1963
1964 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1965 {
1966         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1967         struct edid *edid;
1968         bool has_audio = false;
1969
1970         if (!intel_sdvo->is_hdmi)
1971                 return false;
1972
1973         edid = intel_sdvo_get_edid(connector);
1974         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1975                 has_audio = drm_detect_monitor_audio(edid);
1976         kfree(edid);
1977
1978         return has_audio;
1979 }
1980
1981 static int
1982 intel_sdvo_set_property(struct drm_connector *connector,
1983                         struct drm_property *property,
1984                         uint64_t val)
1985 {
1986         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1987         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1988         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1989         uint16_t temp_value;
1990         uint8_t cmd;
1991         int ret;
1992
1993         ret = drm_object_property_set_value(&connector->base, property, val);
1994         if (ret)
1995                 return ret;
1996
1997         if (property == dev_priv->force_audio_property) {
1998                 int i = val;
1999                 bool has_audio;
2000
2001                 if (i == intel_sdvo_connector->force_audio)
2002                         return 0;
2003
2004                 intel_sdvo_connector->force_audio = i;
2005
2006                 if (i == HDMI_AUDIO_AUTO)
2007                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
2008                 else
2009                         has_audio = (i == HDMI_AUDIO_ON);
2010
2011                 if (has_audio == intel_sdvo->has_hdmi_audio)
2012                         return 0;
2013
2014                 intel_sdvo->has_hdmi_audio = has_audio;
2015                 goto done;
2016         }
2017
2018         if (property == dev_priv->broadcast_rgb_property) {
2019                 bool old_auto = intel_sdvo->color_range_auto;
2020                 uint32_t old_range = intel_sdvo->color_range;
2021
2022                 switch (val) {
2023                 case INTEL_BROADCAST_RGB_AUTO:
2024                         intel_sdvo->color_range_auto = true;
2025                         break;
2026                 case INTEL_BROADCAST_RGB_FULL:
2027                         intel_sdvo->color_range_auto = false;
2028                         intel_sdvo->color_range = 0;
2029                         break;
2030                 case INTEL_BROADCAST_RGB_LIMITED:
2031                         intel_sdvo->color_range_auto = false;
2032                         /* FIXME: this bit is only valid when using TMDS
2033                          * encoding and 8 bit per color mode. */
2034                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
2035                         break;
2036                 default:
2037                         return -EINVAL;
2038                 }
2039
2040                 if (old_auto == intel_sdvo->color_range_auto &&
2041                     old_range == intel_sdvo->color_range)
2042                         return 0;
2043
2044                 goto done;
2045         }
2046
2047 #define CHECK_PROPERTY(name, NAME) \
2048         if (intel_sdvo_connector->name == property) { \
2049                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2050                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2051                 cmd = SDVO_CMD_SET_##NAME; \
2052                 intel_sdvo_connector->cur_##name = temp_value; \
2053                 goto set_value; \
2054         }
2055
2056         if (property == intel_sdvo_connector->tv_format) {
2057                 if (val >= TV_FORMAT_NUM)
2058                         return -EINVAL;
2059
2060                 if (intel_sdvo->tv_format_index ==
2061                     intel_sdvo_connector->tv_format_supported[val])
2062                         return 0;
2063
2064                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
2065                 goto done;
2066         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
2067                 temp_value = val;
2068                 if (intel_sdvo_connector->left == property) {
2069                         drm_object_property_set_value(&connector->base,
2070                                                          intel_sdvo_connector->right, val);
2071                         if (intel_sdvo_connector->left_margin == temp_value)
2072                                 return 0;
2073
2074                         intel_sdvo_connector->left_margin = temp_value;
2075                         intel_sdvo_connector->right_margin = temp_value;
2076                         temp_value = intel_sdvo_connector->max_hscan -
2077                                 intel_sdvo_connector->left_margin;
2078                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2079                         goto set_value;
2080                 } else if (intel_sdvo_connector->right == property) {
2081                         drm_object_property_set_value(&connector->base,
2082                                                          intel_sdvo_connector->left, val);
2083                         if (intel_sdvo_connector->right_margin == temp_value)
2084                                 return 0;
2085
2086                         intel_sdvo_connector->left_margin = temp_value;
2087                         intel_sdvo_connector->right_margin = temp_value;
2088                         temp_value = intel_sdvo_connector->max_hscan -
2089                                 intel_sdvo_connector->left_margin;
2090                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2091                         goto set_value;
2092                 } else if (intel_sdvo_connector->top == property) {
2093                         drm_object_property_set_value(&connector->base,
2094                                                          intel_sdvo_connector->bottom, val);
2095                         if (intel_sdvo_connector->top_margin == temp_value)
2096                                 return 0;
2097
2098                         intel_sdvo_connector->top_margin = temp_value;
2099                         intel_sdvo_connector->bottom_margin = temp_value;
2100                         temp_value = intel_sdvo_connector->max_vscan -
2101                                 intel_sdvo_connector->top_margin;
2102                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2103                         goto set_value;
2104                 } else if (intel_sdvo_connector->bottom == property) {
2105                         drm_object_property_set_value(&connector->base,
2106                                                          intel_sdvo_connector->top, val);
2107                         if (intel_sdvo_connector->bottom_margin == temp_value)
2108                                 return 0;
2109
2110                         intel_sdvo_connector->top_margin = temp_value;
2111                         intel_sdvo_connector->bottom_margin = temp_value;
2112                         temp_value = intel_sdvo_connector->max_vscan -
2113                                 intel_sdvo_connector->top_margin;
2114                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2115                         goto set_value;
2116                 }
2117                 CHECK_PROPERTY(hpos, HPOS)
2118                 CHECK_PROPERTY(vpos, VPOS)
2119                 CHECK_PROPERTY(saturation, SATURATION)
2120                 CHECK_PROPERTY(contrast, CONTRAST)
2121                 CHECK_PROPERTY(hue, HUE)
2122                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2123                 CHECK_PROPERTY(sharpness, SHARPNESS)
2124                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2125                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2126                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2127                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2128                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2129                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2130         }
2131
2132         return -EINVAL; /* unknown property */
2133
2134 set_value:
2135         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2136                 return -EIO;
2137
2138
2139 done:
2140         if (intel_sdvo->base.base.crtc)
2141                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2142
2143         return 0;
2144 #undef CHECK_PROPERTY
2145 }
2146
2147 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2148         .dpms = drm_atomic_helper_connector_dpms,
2149         .detect = intel_sdvo_detect,
2150         .fill_modes = drm_helper_probe_single_connector_modes,
2151         .set_property = intel_sdvo_set_property,
2152         .atomic_get_property = intel_connector_atomic_get_property,
2153         .destroy = intel_sdvo_destroy,
2154         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2155         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
2156 };
2157
2158 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2159         .get_modes = intel_sdvo_get_modes,
2160         .mode_valid = intel_sdvo_mode_valid,
2161         .best_encoder = intel_best_encoder,
2162 };
2163
2164 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2165 {
2166         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2167
2168         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2169                 drm_mode_destroy(encoder->dev,
2170                                  intel_sdvo->sdvo_lvds_fixed_mode);
2171
2172         i2c_del_adapter(&intel_sdvo->ddc);
2173         intel_encoder_destroy(encoder);
2174 }
2175
2176 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2177         .destroy = intel_sdvo_enc_destroy,
2178 };
2179
2180 static void
2181 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2182 {
2183         uint16_t mask = 0;
2184         unsigned int num_bits;
2185
2186         /* Make a mask of outputs less than or equal to our own priority in the
2187          * list.
2188          */
2189         switch (sdvo->controlled_output) {
2190         case SDVO_OUTPUT_LVDS1:
2191                 mask |= SDVO_OUTPUT_LVDS1;
2192         case SDVO_OUTPUT_LVDS0:
2193                 mask |= SDVO_OUTPUT_LVDS0;
2194         case SDVO_OUTPUT_TMDS1:
2195                 mask |= SDVO_OUTPUT_TMDS1;
2196         case SDVO_OUTPUT_TMDS0:
2197                 mask |= SDVO_OUTPUT_TMDS0;
2198         case SDVO_OUTPUT_RGB1:
2199                 mask |= SDVO_OUTPUT_RGB1;
2200         case SDVO_OUTPUT_RGB0:
2201                 mask |= SDVO_OUTPUT_RGB0;
2202                 break;
2203         }
2204
2205         /* Count bits to find what number we are in the priority list. */
2206         mask &= sdvo->caps.output_flags;
2207         num_bits = hweight16(mask);
2208         /* If more than 3 outputs, default to DDC bus 3 for now. */
2209         if (num_bits > 3)
2210                 num_bits = 3;
2211
2212         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2213         sdvo->ddc_bus = 1 << num_bits;
2214 }
2215
2216 /**
2217  * Choose the appropriate DDC bus for control bus switch command for this
2218  * SDVO output based on the controlled output.
2219  *
2220  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2221  * outputs, then LVDS outputs.
2222  */
2223 static void
2224 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2225                           struct intel_sdvo *sdvo, u32 reg)
2226 {
2227         struct sdvo_device_mapping *mapping;
2228
2229         if (sdvo->is_sdvob)
2230                 mapping = &(dev_priv->sdvo_mappings[0]);
2231         else
2232                 mapping = &(dev_priv->sdvo_mappings[1]);
2233
2234         if (mapping->initialized)
2235                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2236         else
2237                 intel_sdvo_guess_ddc_bus(sdvo);
2238 }
2239
2240 static void
2241 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2242                           struct intel_sdvo *sdvo, u32 reg)
2243 {
2244         struct sdvo_device_mapping *mapping;
2245         u8 pin;
2246
2247         if (sdvo->is_sdvob)
2248                 mapping = &dev_priv->sdvo_mappings[0];
2249         else
2250                 mapping = &dev_priv->sdvo_mappings[1];
2251
2252         if (mapping->initialized &&
2253             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2254                 pin = mapping->i2c_pin;
2255         else
2256                 pin = GMBUS_PIN_DPB;
2257
2258         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2259
2260         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2261          * our code totally fails once we start using gmbus. Hence fall back to
2262          * bit banging for now. */
2263         intel_gmbus_force_bit(sdvo->i2c, true);
2264 }
2265
2266 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2267 static void
2268 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2269 {
2270         intel_gmbus_force_bit(sdvo->i2c, false);
2271 }
2272
2273 static bool
2274 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2275 {
2276         return intel_sdvo_check_supp_encode(intel_sdvo);
2277 }
2278
2279 static u8
2280 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2281 {
2282         struct drm_i915_private *dev_priv = dev->dev_private;
2283         struct sdvo_device_mapping *my_mapping, *other_mapping;
2284
2285         if (sdvo->is_sdvob) {
2286                 my_mapping = &dev_priv->sdvo_mappings[0];
2287                 other_mapping = &dev_priv->sdvo_mappings[1];
2288         } else {
2289                 my_mapping = &dev_priv->sdvo_mappings[1];
2290                 other_mapping = &dev_priv->sdvo_mappings[0];
2291         }
2292
2293         /* If the BIOS described our SDVO device, take advantage of it. */
2294         if (my_mapping->slave_addr)
2295                 return my_mapping->slave_addr;
2296
2297         /* If the BIOS only described a different SDVO device, use the
2298          * address that it isn't using.
2299          */
2300         if (other_mapping->slave_addr) {
2301                 if (other_mapping->slave_addr == 0x70)
2302                         return 0x72;
2303                 else
2304                         return 0x70;
2305         }
2306
2307         /* No SDVO device info is found for another DVO port,
2308          * so use mapping assumption we had before BIOS parsing.
2309          */
2310         if (sdvo->is_sdvob)
2311                 return 0x70;
2312         else
2313                 return 0x72;
2314 }
2315
2316 static void
2317 intel_sdvo_connector_unregister(struct intel_connector *intel_connector)
2318 {
2319         struct drm_connector *drm_connector;
2320         struct intel_sdvo *sdvo_encoder;
2321
2322         drm_connector = &intel_connector->base;
2323         sdvo_encoder = intel_attached_sdvo(&intel_connector->base);
2324
2325         sysfs_remove_link(&drm_connector->kdev->kobj,
2326                           sdvo_encoder->ddc.dev.kobj.name);
2327         intel_connector_unregister(intel_connector);
2328 }
2329
2330 static int
2331 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2332                           struct intel_sdvo *encoder)
2333 {
2334         struct drm_connector *drm_connector;
2335         int ret;
2336
2337         drm_connector = &connector->base.base;
2338         ret = drm_connector_init(encoder->base.base.dev,
2339                            drm_connector,
2340                            &intel_sdvo_connector_funcs,
2341                            connector->base.base.connector_type);
2342         if (ret < 0)
2343                 return ret;
2344
2345         drm_connector_helper_add(drm_connector,
2346                                  &intel_sdvo_connector_helper_funcs);
2347
2348         connector->base.base.interlace_allowed = 1;
2349         connector->base.base.doublescan_allowed = 0;
2350         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2351         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2352         connector->base.unregister = intel_sdvo_connector_unregister;
2353
2354         intel_connector_attach_encoder(&connector->base, &encoder->base);
2355         ret = drm_connector_register(drm_connector);
2356         if (ret < 0)
2357                 goto err1;
2358
2359         ret = sysfs_create_link(&drm_connector->kdev->kobj,
2360                                 &encoder->ddc.dev.kobj,
2361                                 encoder->ddc.dev.kobj.name);
2362         if (ret < 0)
2363                 goto err2;
2364
2365         return 0;
2366
2367 err2:
2368         drm_connector_unregister(drm_connector);
2369 err1:
2370         drm_connector_cleanup(drm_connector);
2371
2372         return ret;
2373 }
2374
2375 static void
2376 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2377                                struct intel_sdvo_connector *connector)
2378 {
2379         struct drm_device *dev = connector->base.base.dev;
2380
2381         intel_attach_force_audio_property(&connector->base.base);
2382         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2383                 intel_attach_broadcast_rgb_property(&connector->base.base);
2384                 intel_sdvo->color_range_auto = true;
2385         }
2386 }
2387
2388 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2389 {
2390         struct intel_sdvo_connector *sdvo_connector;
2391
2392         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2393         if (!sdvo_connector)
2394                 return NULL;
2395
2396         if (intel_connector_init(&sdvo_connector->base) < 0) {
2397                 kfree(sdvo_connector);
2398                 return NULL;
2399         }
2400
2401         return sdvo_connector;
2402 }
2403
2404 static bool
2405 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2406 {
2407         struct drm_encoder *encoder = &intel_sdvo->base.base;
2408         struct drm_connector *connector;
2409         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2410         struct intel_connector *intel_connector;
2411         struct intel_sdvo_connector *intel_sdvo_connector;
2412
2413         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2414
2415         intel_sdvo_connector = intel_sdvo_connector_alloc();
2416         if (!intel_sdvo_connector)
2417                 return false;
2418
2419         if (device == 0) {
2420                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2421                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2422         } else if (device == 1) {
2423                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2424                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2425         }
2426
2427         intel_connector = &intel_sdvo_connector->base;
2428         connector = &intel_connector->base;
2429         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2430                 intel_sdvo_connector->output_flag) {
2431                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2432                 /* Some SDVO devices have one-shot hotplug interrupts.
2433                  * Ensure that they get re-enabled when an interrupt happens.
2434                  */
2435                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2436                 intel_sdvo_enable_hotplug(intel_encoder);
2437         } else {
2438                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2439         }
2440         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2441         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2442
2443         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2444                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2445                 intel_sdvo->is_hdmi = true;
2446         }
2447
2448         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2449                 kfree(intel_sdvo_connector);
2450                 return false;
2451         }
2452
2453         if (intel_sdvo->is_hdmi)
2454                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2455
2456         return true;
2457 }
2458
2459 static bool
2460 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2461 {
2462         struct drm_encoder *encoder = &intel_sdvo->base.base;
2463         struct drm_connector *connector;
2464         struct intel_connector *intel_connector;
2465         struct intel_sdvo_connector *intel_sdvo_connector;
2466
2467         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2468
2469         intel_sdvo_connector = intel_sdvo_connector_alloc();
2470         if (!intel_sdvo_connector)
2471                 return false;
2472
2473         intel_connector = &intel_sdvo_connector->base;
2474         connector = &intel_connector->base;
2475         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2476         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2477
2478         intel_sdvo->controlled_output |= type;
2479         intel_sdvo_connector->output_flag = type;
2480
2481         intel_sdvo->is_tv = true;
2482
2483         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2484                 kfree(intel_sdvo_connector);
2485                 return false;
2486         }
2487
2488         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2489                 goto err;
2490
2491         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2492                 goto err;
2493
2494         return true;
2495
2496 err:
2497         drm_connector_unregister(connector);
2498         intel_sdvo_destroy(connector);
2499         return false;
2500 }
2501
2502 static bool
2503 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2504 {
2505         struct drm_encoder *encoder = &intel_sdvo->base.base;
2506         struct drm_connector *connector;
2507         struct intel_connector *intel_connector;
2508         struct intel_sdvo_connector *intel_sdvo_connector;
2509
2510         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2511
2512         intel_sdvo_connector = intel_sdvo_connector_alloc();
2513         if (!intel_sdvo_connector)
2514                 return false;
2515
2516         intel_connector = &intel_sdvo_connector->base;
2517         connector = &intel_connector->base;
2518         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2519         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2520         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2521
2522         if (device == 0) {
2523                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2524                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2525         } else if (device == 1) {
2526                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2527                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2528         }
2529
2530         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2531                 kfree(intel_sdvo_connector);
2532                 return false;
2533         }
2534
2535         return true;
2536 }
2537
2538 static bool
2539 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2540 {
2541         struct drm_encoder *encoder = &intel_sdvo->base.base;
2542         struct drm_connector *connector;
2543         struct intel_connector *intel_connector;
2544         struct intel_sdvo_connector *intel_sdvo_connector;
2545
2546         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2547
2548         intel_sdvo_connector = intel_sdvo_connector_alloc();
2549         if (!intel_sdvo_connector)
2550                 return false;
2551
2552         intel_connector = &intel_sdvo_connector->base;
2553         connector = &intel_connector->base;
2554         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2555         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2556
2557         if (device == 0) {
2558                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2559                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2560         } else if (device == 1) {
2561                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2562                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2563         }
2564
2565         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2566                 kfree(intel_sdvo_connector);
2567                 return false;
2568         }
2569
2570         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2571                 goto err;
2572
2573         return true;
2574
2575 err:
2576         drm_connector_unregister(connector);
2577         intel_sdvo_destroy(connector);
2578         return false;
2579 }
2580
2581 static bool
2582 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2583 {
2584         intel_sdvo->is_tv = false;
2585         intel_sdvo->is_lvds = false;
2586
2587         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2588
2589         if (flags & SDVO_OUTPUT_TMDS0)
2590                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2591                         return false;
2592
2593         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2594                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2595                         return false;
2596
2597         /* TV has no XXX1 function block */
2598         if (flags & SDVO_OUTPUT_SVID0)
2599                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2600                         return false;
2601
2602         if (flags & SDVO_OUTPUT_CVBS0)
2603                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2604                         return false;
2605
2606         if (flags & SDVO_OUTPUT_YPRPB0)
2607                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2608                         return false;
2609
2610         if (flags & SDVO_OUTPUT_RGB0)
2611                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2612                         return false;
2613
2614         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2615                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2616                         return false;
2617
2618         if (flags & SDVO_OUTPUT_LVDS0)
2619                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2620                         return false;
2621
2622         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2623                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2624                         return false;
2625
2626         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2627                 unsigned char bytes[2];
2628
2629                 intel_sdvo->controlled_output = 0;
2630                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2631                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2632                               SDVO_NAME(intel_sdvo),
2633                               bytes[0], bytes[1]);
2634                 return false;
2635         }
2636         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2637
2638         return true;
2639 }
2640
2641 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2642 {
2643         struct drm_device *dev = intel_sdvo->base.base.dev;
2644         struct drm_connector *connector, *tmp;
2645
2646         list_for_each_entry_safe(connector, tmp,
2647                                  &dev->mode_config.connector_list, head) {
2648                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2649                         drm_connector_unregister(connector);
2650                         intel_sdvo_destroy(connector);
2651                 }
2652         }
2653 }
2654
2655 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2656                                           struct intel_sdvo_connector *intel_sdvo_connector,
2657                                           int type)
2658 {
2659         struct drm_device *dev = intel_sdvo->base.base.dev;
2660         struct intel_sdvo_tv_format format;
2661         uint32_t format_map, i;
2662
2663         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2664                 return false;
2665
2666         BUILD_BUG_ON(sizeof(format) != 6);
2667         if (!intel_sdvo_get_value(intel_sdvo,
2668                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2669                                   &format, sizeof(format)))
2670                 return false;
2671
2672         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2673
2674         if (format_map == 0)
2675                 return false;
2676
2677         intel_sdvo_connector->format_supported_num = 0;
2678         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2679                 if (format_map & (1 << i))
2680                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2681
2682
2683         intel_sdvo_connector->tv_format =
2684                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2685                                             "mode", intel_sdvo_connector->format_supported_num);
2686         if (!intel_sdvo_connector->tv_format)
2687                 return false;
2688
2689         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2690                 drm_property_add_enum(
2691                                 intel_sdvo_connector->tv_format, i,
2692                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2693
2694         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2695         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2696                                       intel_sdvo_connector->tv_format, 0);
2697         return true;
2698
2699 }
2700
2701 #define ENHANCEMENT(name, NAME) do { \
2702         if (enhancements.name) { \
2703                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2704                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2705                         return false; \
2706                 intel_sdvo_connector->max_##name = data_value[0]; \
2707                 intel_sdvo_connector->cur_##name = response; \
2708                 intel_sdvo_connector->name = \
2709                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2710                 if (!intel_sdvo_connector->name) return false; \
2711                 drm_object_attach_property(&connector->base, \
2712                                               intel_sdvo_connector->name, \
2713                                               intel_sdvo_connector->cur_##name); \
2714                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2715                               data_value[0], data_value[1], response); \
2716         } \
2717 } while (0)
2718
2719 static bool
2720 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2721                                       struct intel_sdvo_connector *intel_sdvo_connector,
2722                                       struct intel_sdvo_enhancements_reply enhancements)
2723 {
2724         struct drm_device *dev = intel_sdvo->base.base.dev;
2725         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2726         uint16_t response, data_value[2];
2727
2728         /* when horizontal overscan is supported, Add the left/right  property */
2729         if (enhancements.overscan_h) {
2730                 if (!intel_sdvo_get_value(intel_sdvo,
2731                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2732                                           &data_value, 4))
2733                         return false;
2734
2735                 if (!intel_sdvo_get_value(intel_sdvo,
2736                                           SDVO_CMD_GET_OVERSCAN_H,
2737                                           &response, 2))
2738                         return false;
2739
2740                 intel_sdvo_connector->max_hscan = data_value[0];
2741                 intel_sdvo_connector->left_margin = data_value[0] - response;
2742                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2743                 intel_sdvo_connector->left =
2744                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2745                 if (!intel_sdvo_connector->left)
2746                         return false;
2747
2748                 drm_object_attach_property(&connector->base,
2749                                               intel_sdvo_connector->left,
2750                                               intel_sdvo_connector->left_margin);
2751
2752                 intel_sdvo_connector->right =
2753                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2754                 if (!intel_sdvo_connector->right)
2755                         return false;
2756
2757                 drm_object_attach_property(&connector->base,
2758                                               intel_sdvo_connector->right,
2759                                               intel_sdvo_connector->right_margin);
2760                 DRM_DEBUG_KMS("h_overscan: max %d, "
2761                               "default %d, current %d\n",
2762                               data_value[0], data_value[1], response);
2763         }
2764
2765         if (enhancements.overscan_v) {
2766                 if (!intel_sdvo_get_value(intel_sdvo,
2767                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2768                                           &data_value, 4))
2769                         return false;
2770
2771                 if (!intel_sdvo_get_value(intel_sdvo,
2772                                           SDVO_CMD_GET_OVERSCAN_V,
2773                                           &response, 2))
2774                         return false;
2775
2776                 intel_sdvo_connector->max_vscan = data_value[0];
2777                 intel_sdvo_connector->top_margin = data_value[0] - response;
2778                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2779                 intel_sdvo_connector->top =
2780                         drm_property_create_range(dev, 0,
2781                                             "top_margin", 0, data_value[0]);
2782                 if (!intel_sdvo_connector->top)
2783                         return false;
2784
2785                 drm_object_attach_property(&connector->base,
2786                                               intel_sdvo_connector->top,
2787                                               intel_sdvo_connector->top_margin);
2788
2789                 intel_sdvo_connector->bottom =
2790                         drm_property_create_range(dev, 0,
2791                                             "bottom_margin", 0, data_value[0]);
2792                 if (!intel_sdvo_connector->bottom)
2793                         return false;
2794
2795                 drm_object_attach_property(&connector->base,
2796                                               intel_sdvo_connector->bottom,
2797                                               intel_sdvo_connector->bottom_margin);
2798                 DRM_DEBUG_KMS("v_overscan: max %d, "
2799                               "default %d, current %d\n",
2800                               data_value[0], data_value[1], response);
2801         }
2802
2803         ENHANCEMENT(hpos, HPOS);
2804         ENHANCEMENT(vpos, VPOS);
2805         ENHANCEMENT(saturation, SATURATION);
2806         ENHANCEMENT(contrast, CONTRAST);
2807         ENHANCEMENT(hue, HUE);
2808         ENHANCEMENT(sharpness, SHARPNESS);
2809         ENHANCEMENT(brightness, BRIGHTNESS);
2810         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2811         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2812         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2813         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2814         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2815
2816         if (enhancements.dot_crawl) {
2817                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2818                         return false;
2819
2820                 intel_sdvo_connector->max_dot_crawl = 1;
2821                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2822                 intel_sdvo_connector->dot_crawl =
2823                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2824                 if (!intel_sdvo_connector->dot_crawl)
2825                         return false;
2826
2827                 drm_object_attach_property(&connector->base,
2828                                               intel_sdvo_connector->dot_crawl,
2829                                               intel_sdvo_connector->cur_dot_crawl);
2830                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2831         }
2832
2833         return true;
2834 }
2835
2836 static bool
2837 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2838                                         struct intel_sdvo_connector *intel_sdvo_connector,
2839                                         struct intel_sdvo_enhancements_reply enhancements)
2840 {
2841         struct drm_device *dev = intel_sdvo->base.base.dev;
2842         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2843         uint16_t response, data_value[2];
2844
2845         ENHANCEMENT(brightness, BRIGHTNESS);
2846
2847         return true;
2848 }
2849 #undef ENHANCEMENT
2850
2851 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2852                                                struct intel_sdvo_connector *intel_sdvo_connector)
2853 {
2854         union {
2855                 struct intel_sdvo_enhancements_reply reply;
2856                 uint16_t response;
2857         } enhancements;
2858
2859         BUILD_BUG_ON(sizeof(enhancements) != 2);
2860
2861         enhancements.response = 0;
2862         intel_sdvo_get_value(intel_sdvo,
2863                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2864                              &enhancements, sizeof(enhancements));
2865         if (enhancements.response == 0) {
2866                 DRM_DEBUG_KMS("No enhancement is supported\n");
2867                 return true;
2868         }
2869
2870         if (IS_TV(intel_sdvo_connector))
2871                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2872         else if (IS_LVDS(intel_sdvo_connector))
2873                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2874         else
2875                 return true;
2876 }
2877
2878 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2879                                      struct i2c_msg *msgs,
2880                                      int num)
2881 {
2882         struct intel_sdvo *sdvo = adapter->algo_data;
2883
2884         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2885                 return -EIO;
2886
2887         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2888 }
2889
2890 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2891 {
2892         struct intel_sdvo *sdvo = adapter->algo_data;
2893         return sdvo->i2c->algo->functionality(sdvo->i2c);
2894 }
2895
2896 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2897         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2898         .functionality  = intel_sdvo_ddc_proxy_func
2899 };
2900
2901 static bool
2902 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2903                           struct drm_device *dev)
2904 {
2905         sdvo->ddc.owner = THIS_MODULE;
2906         sdvo->ddc.class = I2C_CLASS_DDC;
2907         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2908         sdvo->ddc.dev.parent = &dev->pdev->dev;
2909         sdvo->ddc.algo_data = sdvo;
2910         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2911
2912         return i2c_add_adapter(&sdvo->ddc) == 0;
2913 }
2914
2915 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2916 {
2917         struct drm_i915_private *dev_priv = dev->dev_private;
2918         struct intel_encoder *intel_encoder;
2919         struct intel_sdvo *intel_sdvo;
2920         int i;
2921         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
2922         if (!intel_sdvo)
2923                 return false;
2924
2925         intel_sdvo->sdvo_reg = sdvo_reg;
2926         intel_sdvo->is_sdvob = is_sdvob;
2927         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2928         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2929         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2930                 goto err_i2c_bus;
2931
2932         /* encoder type will be decided later */
2933         intel_encoder = &intel_sdvo->base;
2934         intel_encoder->type = INTEL_OUTPUT_SDVO;
2935         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2936
2937         /* Read the regs to test if we can talk to the device */
2938         for (i = 0; i < 0x40; i++) {
2939                 u8 byte;
2940
2941                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2942                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2943                                       SDVO_NAME(intel_sdvo));
2944                         goto err;
2945                 }
2946         }
2947
2948         intel_encoder->compute_config = intel_sdvo_compute_config;
2949         if (HAS_PCH_SPLIT(dev)) {
2950                 intel_encoder->disable = pch_disable_sdvo;
2951                 intel_encoder->post_disable = pch_post_disable_sdvo;
2952         } else {
2953                 intel_encoder->disable = intel_disable_sdvo;
2954         }
2955         intel_encoder->pre_enable = intel_sdvo_pre_enable;
2956         intel_encoder->enable = intel_enable_sdvo;
2957         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2958         intel_encoder->get_config = intel_sdvo_get_config;
2959
2960         /* In default case sdvo lvds is false */
2961         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2962                 goto err;
2963
2964         if (intel_sdvo_output_setup(intel_sdvo,
2965                                     intel_sdvo->caps.output_flags) != true) {
2966                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2967                               SDVO_NAME(intel_sdvo));
2968                 /* Output_setup can leave behind connectors! */
2969                 goto err_output;
2970         }
2971
2972         /* Only enable the hotplug irq if we need it, to work around noisy
2973          * hotplug lines.
2974          */
2975         if (intel_sdvo->hotplug_active) {
2976                 intel_encoder->hpd_pin =
2977                         intel_sdvo->is_sdvob ?  HPD_SDVO_B : HPD_SDVO_C;
2978         }
2979
2980         /*
2981          * Cloning SDVO with anything is often impossible, since the SDVO
2982          * encoder can request a special input timing mode. And even if that's
2983          * not the case we have evidence that cloning a plain unscaled mode with
2984          * VGA doesn't really work. Furthermore the cloning flags are way too
2985          * simplistic anyway to express such constraints, so just give up on
2986          * cloning for SDVO encoders.
2987          */
2988         intel_sdvo->base.cloneable = 0;
2989
2990         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2991
2992         /* Set the input timing to the screen. Assume always input 0. */
2993         if (!intel_sdvo_set_target_input(intel_sdvo))
2994                 goto err_output;
2995
2996         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2997                                                     &intel_sdvo->pixel_clock_min,
2998                                                     &intel_sdvo->pixel_clock_max))
2999                 goto err_output;
3000
3001         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3002                         "clock range %dMHz - %dMHz, "
3003                         "input 1: %c, input 2: %c, "
3004                         "output 1: %c, output 2: %c\n",
3005                         SDVO_NAME(intel_sdvo),
3006                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3007                         intel_sdvo->caps.device_rev_id,
3008                         intel_sdvo->pixel_clock_min / 1000,
3009                         intel_sdvo->pixel_clock_max / 1000,
3010                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3011                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3012                         /* check currently supported outputs */
3013                         intel_sdvo->caps.output_flags &
3014                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3015                         intel_sdvo->caps.output_flags &
3016                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3017         return true;
3018
3019 err_output:
3020         intel_sdvo_output_cleanup(intel_sdvo);
3021
3022 err:
3023         drm_encoder_cleanup(&intel_encoder->base);
3024         i2c_del_adapter(&intel_sdvo->ddc);
3025 err_i2c_bus:
3026         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3027         kfree(intel_sdvo);
3028
3029         return false;
3030 }