drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_atomic_helper.h>
  34 #include <drm/drm_crtc.h>
  35 #include <drm/drm_edid.h>
  36 #include "intel_drv.h"
  37 #include <drm/i915_drm.h>
  38 #include "i915_drv.h"
  39 #include "intel_sdvo_regs.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char * const tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         struct i2c_adapter *i2c;
  72         u8 slave_addr;
  73
  74         struct i2c_adapter ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         uint32_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * intel_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint16_t hotplug_active;
 101
 102         /**
 103          * This is used to select the color range of RBG outputs in HDMI mode.
 104          * It is only valid when using TMDS encoding and 8 bit per color mode.
 105          */
 106         uint32_t color_range;
 107         bool color_range_auto;
 108
 109         /**
 110          * HDMI user specified aspect ratio
 111          */
 112         enum hdmi_picture_aspect aspect_ratio;
 113
 114         /**
 115          * This is set if we're going to treat the device as TV-out.
 116          *
 117          * While we have these nice friendly flags for output types that ought
 118          * to decide this for us, the S-Video output on our HDMI+S-Video card
 119          * shows up as RGB1 (VGA).
 120          */
 121         bool is_tv;
 122
 123         /* On different gens SDVOB is at different places. */
 124         bool is_sdvob;
 125
 126         /* This is for current tv format name */
 127         int tv_format_index;
 128
 129         /**
 130          * This is set if we treat the device as HDMI, instead of DVI.
 131          */
 132         bool is_hdmi;
 133         bool has_hdmi_monitor;
 134         bool has_hdmi_audio;
 135         bool rgb_quant_range_selectable;
 136
 137         /**
 138          * This is set if we detect output of sdvo device as LVDS and
 139          * have a valid fixed mode to use with the panel.
 140          */
 141         bool is_lvds;
 142
 143         /**
 144          * This is sdvo fixed pannel mode pointer
 145          */
 146         struct drm_display_mode *sdvo_lvds_fixed_mode;
 147
 148         /* DDC bus used by this SDVO encoder */
 149         uint8_t ddc_bus;
 150
 151         /*
 152          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 153          */
 154         uint8_t dtd_sdvo_flags;
 155 };
 156
 157 struct intel_sdvo_connector {
 158         struct intel_connector base;
 159
 160         /* Mark the type of connector */
 161         uint16_t output_flag;
 162
 163         enum hdmi_force_audio force_audio;
 164
 165         /* This contains all current supported TV format */
 166         u8 tv_format_supported[TV_FORMAT_NUM];
 167         int   format_supported_num;
 168         struct drm_property *tv_format;
 169
 170         /* add the property for the SDVO-TV */
 171         struct drm_property *left;
 172         struct drm_property *right;
 173         struct drm_property *top;
 174         struct drm_property *bottom;
 175         struct drm_property *hpos;
 176         struct drm_property *vpos;
 177         struct drm_property *contrast;
 178         struct drm_property *saturation;
 179         struct drm_property *hue;
 180         struct drm_property *sharpness;
 181         struct drm_property *flicker_filter;
 182         struct drm_property *flicker_filter_adaptive;
 183         struct drm_property *flicker_filter_2d;
 184         struct drm_property *tv_chroma_filter;
 185         struct drm_property *tv_luma_filter;
 186         struct drm_property *dot_crawl;
 187
 188         /* add the property for the SDVO-TV/LVDS */
 189         struct drm_property *brightness;
 190
 191         /* Add variable to record current setting for the above property */
 192         u32     left_margin, right_margin, top_margin, bottom_margin;
 193
 194         /* this is to get the range of margin.*/
 195         u32     max_hscan,  max_vscan;
 196         u32     max_hpos, cur_hpos;
 197         u32     max_vpos, cur_vpos;
 198         u32     cur_brightness, max_brightness;
 199         u32     cur_contrast,   max_contrast;
 200         u32     cur_saturation, max_saturation;
 201         u32     cur_hue,        max_hue;
 202         u32     cur_sharpness,  max_sharpness;
 203         u32     cur_flicker_filter,             max_flicker_filter;
 204         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 205         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 206         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 207         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 208         u32     cur_dot_crawl,  max_dot_crawl;
 209 };
 210
 211 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 212 {
 213         return container_of(encoder, struct intel_sdvo, base);
 214 }
 215
 216 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 217 {
 218         return to_sdvo(intel_attached_encoder(connector));
 219 }
 220
 221 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 222 {
 223         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 224 }
 225
 226 static bool
 227 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 228 static bool
 229 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 230                               struct intel_sdvo_connector *intel_sdvo_connector,
 231                               int type);
 232 static bool
 233 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 234                                    struct intel_sdvo_connector *intel_sdvo_connector);
 235
 236 /**
 237  * Writes the SDVOB or SDVOC with the given value, but always writes both
 238  * SDVOB and SDVOC to work around apparent hardware issues (according to
 239  * comments in the BIOS).
 240  */
 241 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 242 {
 243         struct drm_device *dev = intel_sdvo->base.base.dev;
 244         struct drm_i915_private *dev_priv = dev->dev_private;
 245         u32 bval = val, cval = val;
 246         int i;
 247
 248         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 249                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 250                 POSTING_READ(intel_sdvo->sdvo_reg);
 251                 /*
 252                  * HW workaround, need to write this twice for issue
 253                  * that may result in first write getting masked.
 254                  */
 255                 if (HAS_PCH_IBX(dev)) {
 256                         I915_WRITE(intel_sdvo->sdvo_reg, val);
 257                         POSTING_READ(intel_sdvo->sdvo_reg);
 258                 }
 259                 return;
 260         }
 261
 262         if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
 263                 cval = I915_READ(GEN3_SDVOC);
 264         else
 265                 bval = I915_READ(GEN3_SDVOB);
 266
 267         /*
 268          * Write the registers twice for luck. Sometimes,
 269          * writing them only once doesn't appear to 'stick'.
 270          * The BIOS does this too. Yay, magic
 271          */
 272         for (i = 0; i < 2; i++)
 273         {
 274                 I915_WRITE(GEN3_SDVOB, bval);
 275                 POSTING_READ(GEN3_SDVOB);
 276                 I915_WRITE(GEN3_SDVOC, cval);
 277                 POSTING_READ(GEN3_SDVOC);
 278         }
 279 }
 280
 281 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 282 {
 283         struct i2c_msg msgs[] = {
 284                 {
 285                         .addr = intel_sdvo->slave_addr,
 286                         .flags = 0,
 287                         .len = 1,
 288                         .buf = &addr,
 289                 },
 290                 {
 291                         .addr = intel_sdvo->slave_addr,
 292                         .flags = I2C_M_RD,
 293                         .len = 1,
 294                         .buf = ch,
 295                 }
 296         };
 297         int ret;
 298
 299         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 300                 return true;
 301
 302         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 303         return false;
 304 }
 305
 306 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 307 /** Mapping of command numbers to names, for debug output */
 308 static const struct _sdvo_cmd_name {
 309         u8 cmd;
 310         const char *name;
 311 } sdvo_cmd_names[] = {
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 355
 356         /* Add the op code for SDVO enhancements */
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 401
 402         /* HDMI op code */
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 409         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 410         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 411         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 412         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 413         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 414         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 415         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 416         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 417         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 418         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 419         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 420         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 421         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 422         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 423 };
 424
 425 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 426
 427 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 428                                    const void *args, int args_len)
 429 {
 430         int i, pos = 0;
 431 #define BUF_LEN 256
 432         char buffer[BUF_LEN];
 433
 434 #define BUF_PRINT(args...) \
 435         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 436
 437
 438         for (i = 0; i < args_len; i++) {
 439                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 440         }
 441         for (; i < 8; i++) {
 442                 BUF_PRINT("   ");
 443         }
 444         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 445                 if (cmd == sdvo_cmd_names[i].cmd) {
 446                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 447                         break;
 448                 }
 449         }
 450         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 451                 BUF_PRINT("(%02X)", cmd);
 452         }
 453         BUG_ON(pos >= BUF_LEN - 1);
 454 #undef BUF_PRINT
 455 #undef BUF_LEN
 456
 457         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 458 }
 459
 460 static const char * const cmd_status_names[] = {
 461         "Power on",
 462         "Success",
 463         "Not supported",
 464         "Invalid arg",
 465         "Pending",
 466         "Target not specified",
 467         "Scaling not supported"
 468 };
 469
 470 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 471                                  const void *args, int args_len)
 472 {
 473         u8 *buf, status;
 474         struct i2c_msg *msgs;
 475         int i, ret = true;
 476
 477         /* Would be simpler to allocate both in one go ? */
 478         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 479         if (!buf)
 480                 return false;
 481
 482         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 483         if (!msgs) {
 484                 kfree(buf);
 485                 return false;
 486         }
 487
 488         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 489
 490         for (i = 0; i < args_len; i++) {
 491                 msgs[i].addr = intel_sdvo->slave_addr;
 492                 msgs[i].flags = 0;
 493                 msgs[i].len = 2;
 494                 msgs[i].buf = buf + 2 *i;
 495                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 496                 buf[2*i + 1] = ((u8*)args)[i];
 497         }
 498         msgs[i].addr = intel_sdvo->slave_addr;
 499         msgs[i].flags = 0;
 500         msgs[i].len = 2;
 501         msgs[i].buf = buf + 2*i;
 502         buf[2*i + 0] = SDVO_I2C_OPCODE;
 503         buf[2*i + 1] = cmd;
 504
 505         /* the following two are to read the response */
 506         status = SDVO_I2C_CMD_STATUS;
 507         msgs[i+1].addr = intel_sdvo->slave_addr;
 508         msgs[i+1].flags = 0;
 509         msgs[i+1].len = 1;
 510         msgs[i+1].buf = &status;
 511
 512         msgs[i+2].addr = intel_sdvo->slave_addr;
 513         msgs[i+2].flags = I2C_M_RD;
 514         msgs[i+2].len = 1;
 515         msgs[i+2].buf = &status;
 516
 517         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 518         if (ret < 0) {
 519                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 520                 ret = false;
 521                 goto out;
 522         }
 523         if (ret != i+3) {
 524                 /* failure in I2C transfer */
 525                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 526                 ret = false;
 527         }
 528
 529 out:
 530         kfree(msgs);
 531         kfree(buf);
 532         return ret;
 533 }
 534
 535 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 536                                      void *response, int response_len)
 537 {
 538         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 539         u8 status;
 540         int i, pos = 0;
 541 #define BUF_LEN 256
 542         char buffer[BUF_LEN];
 543
 544
 545         /*
 546          * The documentation states that all commands will be
 547          * processed within 15µs, and that we need only poll
 548          * the status byte a maximum of 3 times in order for the
 549          * command to be complete.
 550          *
 551          * Check 5 times in case the hardware failed to read the docs.
 552          *
 553          * Also beware that the first response by many devices is to
 554          * reply PENDING and stall for time. TVs are notorious for
 555          * requiring longer than specified to complete their replies.
 556          * Originally (in the DDX long ago), the delay was only ever 15ms
 557          * with an additional delay of 30ms applied for TVs added later after
 558          * many experiments. To accommodate both sets of delays, we do a
 559          * sequence of slow checks if the device is falling behind and fails
 560          * to reply within 5*15µs.
 561          */
 562         if (!intel_sdvo_read_byte(intel_sdvo,
 563                                   SDVO_I2C_CMD_STATUS,
 564                                   &status))
 565                 goto log_fail;
 566
 567         while ((status == SDVO_CMD_STATUS_PENDING ||
 568                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 569                 if (retry < 10)
 570                         msleep(15);
 571                 else
 572                         udelay(15);
 573
 574                 if (!intel_sdvo_read_byte(intel_sdvo,
 575                                           SDVO_I2C_CMD_STATUS,
 576                                           &status))
 577                         goto log_fail;
 578         }
 579
 580 #define BUF_PRINT(args...) \
 581         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 582
 583         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 584                 BUF_PRINT("(%s)", cmd_status_names[status]);
 585         else
 586                 BUF_PRINT("(??? %d)", status);
 587
 588         if (status != SDVO_CMD_STATUS_SUCCESS)
 589                 goto log_fail;
 590
 591         /* Read the command response */
 592         for (i = 0; i < response_len; i++) {
 593                 if (!intel_sdvo_read_byte(intel_sdvo,
 594                                           SDVO_I2C_RETURN_0 + i,
 595                                           &((u8 *)response)[i]))
 596                         goto log_fail;
 597                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 598         }
 599         BUG_ON(pos >= BUF_LEN - 1);
 600 #undef BUF_PRINT
 601 #undef BUF_LEN
 602
 603         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 604         return true;
 605
 606 log_fail:
 607         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 608         return false;
 609 }
 610
 611 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 612 {
 613         if (adjusted_mode->crtc_clock >= 100000)
 614                 return 1;
 615         else if (adjusted_mode->crtc_clock >= 50000)
 616                 return 2;
 617         else
 618                 return 4;
 619 }
 620
 621 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 622                                               u8 ddc_bus)
 623 {
 624         /* This must be the immediately preceding write before the i2c xfer */
 625         return intel_sdvo_write_cmd(intel_sdvo,
 626                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 627                                     &ddc_bus, 1);
 628 }
 629
 630 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 631 {
 632         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 633                 return false;
 634
 635         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 636 }
 637
 638 static bool
 639 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 640 {
 641         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 642                 return false;
 643
 644         return intel_sdvo_read_response(intel_sdvo, value, len);
 645 }
 646
 647 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 648 {
 649         struct intel_sdvo_set_target_input_args targets = {0};
 650         return intel_sdvo_set_value(intel_sdvo,
 651                                     SDVO_CMD_SET_TARGET_INPUT,
 652                                     &targets, sizeof(targets));
 653 }
 654
 655 /**
 656  * Return whether each input is trained.
 657  *
 658  * This function is making an assumption about the layout of the response,
 659  * which should be checked against the docs.
 660  */
 661 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 662 {
 663         struct intel_sdvo_get_trained_inputs_response response;
 664
 665         BUILD_BUG_ON(sizeof(response) != 1);
 666         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 667                                   &response, sizeof(response)))
 668                 return false;
 669
 670         *input_1 = response.input0_trained;
 671         *input_2 = response.input1_trained;
 672         return true;
 673 }
 674
 675 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 676                                           u16 outputs)
 677 {
 678         return intel_sdvo_set_value(intel_sdvo,
 679                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 680                                     &outputs, sizeof(outputs));
 681 }
 682
 683 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 684                                           u16 *outputs)
 685 {
 686         return intel_sdvo_get_value(intel_sdvo,
 687                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 688                                     outputs, sizeof(*outputs));
 689 }
 690
 691 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 692                                                int mode)
 693 {
 694         u8 state = SDVO_ENCODER_STATE_ON;
 695
 696         switch (mode) {
 697         case DRM_MODE_DPMS_ON:
 698                 state = SDVO_ENCODER_STATE_ON;
 699                 break;
 700         case DRM_MODE_DPMS_STANDBY:
 701                 state = SDVO_ENCODER_STATE_STANDBY;
 702                 break;
 703         case DRM_MODE_DPMS_SUSPEND:
 704                 state = SDVO_ENCODER_STATE_SUSPEND;
 705                 break;
 706         case DRM_MODE_DPMS_OFF:
 707                 state = SDVO_ENCODER_STATE_OFF;
 708                 break;
 709         }
 710
 711         return intel_sdvo_set_value(intel_sdvo,
 712                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 713 }
 714
 715 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 716                                                    int *clock_min,
 717                                                    int *clock_max)
 718 {
 719         struct intel_sdvo_pixel_clock_range clocks;
 720
 721         BUILD_BUG_ON(sizeof(clocks) != 4);
 722         if (!intel_sdvo_get_value(intel_sdvo,
 723                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 724                                   &clocks, sizeof(clocks)))
 725                 return false;
 726
 727         /* Convert the values from units of 10 kHz to kHz. */
 728         *clock_min = clocks.min * 10;
 729         *clock_max = clocks.max * 10;
 730         return true;
 731 }
 732
 733 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 734                                          u16 outputs)
 735 {
 736         return intel_sdvo_set_value(intel_sdvo,
 737                                     SDVO_CMD_SET_TARGET_OUTPUT,
 738                                     &outputs, sizeof(outputs));
 739 }
 740
 741 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 742                                   struct intel_sdvo_dtd *dtd)
 743 {
 744         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 745                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 746 }
 747
 748 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 749                                   struct intel_sdvo_dtd *dtd)
 750 {
 751         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 752                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 753 }
 754
 755 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 756                                          struct intel_sdvo_dtd *dtd)
 757 {
 758         return intel_sdvo_set_timing(intel_sdvo,
 759                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 760 }
 761
 762 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 763                                          struct intel_sdvo_dtd *dtd)
 764 {
 765         return intel_sdvo_set_timing(intel_sdvo,
 766                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 767 }
 768
 769 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 770                                         struct intel_sdvo_dtd *dtd)
 771 {
 772         return intel_sdvo_get_timing(intel_sdvo,
 773                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 774 }
 775
 776 static bool
 777 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 778                                          uint16_t clock,
 779                                          uint16_t width,
 780                                          uint16_t height)
 781 {
 782         struct intel_sdvo_preferred_input_timing_args args;
 783
 784         memset(&args, 0, sizeof(args));
 785         args.clock = clock;
 786         args.width = width;
 787         args.height = height;
 788         args.interlace = 0;
 789
 790         if (intel_sdvo->is_lvds &&
 791            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 792             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 793                 args.scaled = 1;
 794
 795         return intel_sdvo_set_value(intel_sdvo,
 796                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 797                                     &args, sizeof(args));
 798 }
 799
 800 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 801                                                   struct intel_sdvo_dtd *dtd)
 802 {
 803         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 804         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 805         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 806                                     &dtd->part1, sizeof(dtd->part1)) &&
 807                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 808                                      &dtd->part2, sizeof(dtd->part2));
 809 }
 810
 811 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 812 {
 813         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 814 }
 815
 816 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 817                                          const struct drm_display_mode *mode)
 818 {
 819         uint16_t width, height;
 820         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 821         uint16_t h_sync_offset, v_sync_offset;
 822         int mode_clock;
 823
 824         memset(dtd, 0, sizeof(*dtd));
 825
 826         width = mode->hdisplay;
 827         height = mode->vdisplay;
 828
 829         /* do some mode translations */
 830         h_blank_len = mode->htotal - mode->hdisplay;
 831         h_sync_len = mode->hsync_end - mode->hsync_start;
 832
 833         v_blank_len = mode->vtotal - mode->vdisplay;
 834         v_sync_len = mode->vsync_end - mode->vsync_start;
 835
 836         h_sync_offset = mode->hsync_start - mode->hdisplay;
 837         v_sync_offset = mode->vsync_start - mode->vdisplay;
 838
 839         mode_clock = mode->clock;
 840         mode_clock /= 10;
 841         dtd->part1.clock = mode_clock;
 842
 843         dtd->part1.h_active = width & 0xff;
 844         dtd->part1.h_blank = h_blank_len & 0xff;
 845         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 846                 ((h_blank_len >> 8) & 0xf);
 847         dtd->part1.v_active = height & 0xff;
 848         dtd->part1.v_blank = v_blank_len & 0xff;
 849         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 850                 ((v_blank_len >> 8) & 0xf);
 851
 852         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 853         dtd->part2.h_sync_width = h_sync_len & 0xff;
 854         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 855                 (v_sync_len & 0xf);
 856         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 857                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 858                 ((v_sync_len & 0x30) >> 4);
 859
 860         dtd->part2.dtd_flags = 0x18;
 861         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 862                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 863         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 864                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 865         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 866                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 867
 868         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 869 }
 870
 871 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 872                                          const struct intel_sdvo_dtd *dtd)
 873 {
 874         struct drm_display_mode mode = {};
 875
 876         mode.hdisplay = dtd->part1.h_active;
 877         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 878         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 879         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 880         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 881         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 882         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 883         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 884
 885         mode.vdisplay = dtd->part1.v_active;
 886         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 887         mode.vsync_start = mode.vdisplay;
 888         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 889         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 890         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 891         mode.vsync_end = mode.vsync_start +
 892                 (dtd->part2.v_sync_off_width & 0xf);
 893         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 894         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 895         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 896
 897         mode.clock = dtd->part1.clock * 10;
 898
 899         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 900                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 901         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 902                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 903         else
 904                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 905         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 906                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 907         else
 908                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 909
 910         drm_mode_set_crtcinfo(&mode, 0);
 911
 912         drm_mode_copy(pmode, &mode);
 913 }
 914
 915 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 916 {
 917         struct intel_sdvo_encode encode;
 918
 919         BUILD_BUG_ON(sizeof(encode) != 2);
 920         return intel_sdvo_get_value(intel_sdvo,
 921                                   SDVO_CMD_GET_SUPP_ENCODE,
 922                                   &encode, sizeof(encode));
 923 }
 924
 925 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 926                                   uint8_t mode)
 927 {
 928         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 929 }
 930
 931 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 932                                        uint8_t mode)
 933 {
 934         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 935 }
 936
 937 #if 0
 938 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 939 {
 940         int i, j;
 941         uint8_t set_buf_index[2];
 942         uint8_t av_split;
 943         uint8_t buf_size;
 944         uint8_t buf[48];
 945         uint8_t *pos;
 946
 947         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 948
 949         for (i = 0; i <= av_split; i++) {
 950                 set_buf_index[0] = i; set_buf_index[1] = 0;
 951                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 952                                      set_buf_index, 2);
 953                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 954                 intel_sdvo_read_response(encoder, &buf_size, 1);
 955
 956                 pos = buf;
 957                 for (j = 0; j <= buf_size; j += 8) {
 958                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 959                                              NULL, 0);
 960                         intel_sdvo_read_response(encoder, pos, 8);
 961                         pos += 8;
 962                 }
 963         }
 964 }
 965 #endif
 966
 967 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 968                                        unsigned if_index, uint8_t tx_rate,
 969                                        const uint8_t *data, unsigned length)
 970 {
 971         uint8_t set_buf_index[2] = { if_index, 0 };
 972         uint8_t hbuf_size, tmp[8];
 973         int i;
 974
 975         if (!intel_sdvo_set_value(intel_sdvo,
 976                                   SDVO_CMD_SET_HBUF_INDEX,
 977                                   set_buf_index, 2))
 978                 return false;
 979
 980         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 981                                   &hbuf_size, 1))
 982                 return false;
 983
 984         /* Buffer size is 0 based, hooray! */
 985         hbuf_size++;
 986
 987         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 988                       if_index, length, hbuf_size);
 989
 990         for (i = 0; i < hbuf_size; i += 8) {
 991                 memset(tmp, 0, 8);
 992                 if (i < length)
 993                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 994
 995                 if (!intel_sdvo_set_value(intel_sdvo,
 996                                           SDVO_CMD_SET_HBUF_DATA,
 997                                           tmp, 8))
 998                         return false;
 999         }
1000
1001         return intel_sdvo_set_value(intel_sdvo,
1002                                     SDVO_CMD_SET_HBUF_TXRATE,
1003                                     &tx_rate, 1);
1004 }
1005
1006 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1007                                          const struct drm_display_mode *adjusted_mode)
1008 {
1009         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1010         struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1011         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1012         union hdmi_infoframe frame;
1013         int ret;
1014         ssize_t len;
1015
1016         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
1017                                                        adjusted_mode,
1018                                                        false);
1019         if (ret < 0) {
1020                 DRM_ERROR("couldn't fill AVI infoframe\n");
1021                 return false;
1022         }
1023
1024         if (intel_sdvo->rgb_quant_range_selectable) {
1025                 if (intel_crtc->config->limited_color_range)
1026                         frame.avi.quantization_range =
1027                                 HDMI_QUANTIZATION_RANGE_LIMITED;
1028                 else
1029                         frame.avi.quantization_range =
1030                                 HDMI_QUANTIZATION_RANGE_FULL;
1031         }
1032
1033         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1034         if (len < 0)
1035                 return false;
1036
1037         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1038                                           SDVO_HBUF_TX_VSYNC,
1039                                           sdvo_data, sizeof(sdvo_data));
1040 }
1041
1042 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
1043 {
1044         struct intel_sdvo_tv_format format;
1045         uint32_t format_map;
1046
1047         format_map = 1 << intel_sdvo->tv_format_index;
1048         memset(&format, 0, sizeof(format));
1049         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1050
1051         BUILD_BUG_ON(sizeof(format) != 6);
1052         return intel_sdvo_set_value(intel_sdvo,
1053                                     SDVO_CMD_SET_TV_FORMAT,
1054                                     &format, sizeof(format));
1055 }
1056
1057 static bool
1058 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1059                                         const struct drm_display_mode *mode)
1060 {
1061         struct intel_sdvo_dtd output_dtd;
1062
1063         if (!intel_sdvo_set_target_output(intel_sdvo,
1064                                           intel_sdvo->attached_output))
1065                 return false;
1066
1067         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1068         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1069                 return false;
1070
1071         return true;
1072 }
1073
1074 /* Asks the sdvo controller for the preferred input mode given the output mode.
1075  * Unfortunately we have to set up the full output mode to do that. */
1076 static bool
1077 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1078                                     const struct drm_display_mode *mode,
1079                                     struct drm_display_mode *adjusted_mode)
1080 {
1081         struct intel_sdvo_dtd input_dtd;
1082
1083         /* Reset the input timing to the screen. Assume always input 0. */
1084         if (!intel_sdvo_set_target_input(intel_sdvo))
1085                 return false;
1086
1087         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1088                                                       mode->clock / 10,
1089                                                       mode->hdisplay,
1090                                                       mode->vdisplay))
1091                 return false;
1092
1093         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1094                                                    &input_dtd))
1095                 return false;
1096
1097         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1098         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1099
1100         return true;
1101 }
1102
1103 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1104 {
1105         unsigned dotclock = pipe_config->port_clock;
1106         struct dpll *clock = &pipe_config->dpll;
1107
1108         /* SDVO TV has fixed PLL values depend on its clock range,
1109            this mirrors vbios setting. */
1110         if (dotclock >= 100000 && dotclock < 140500) {
1111                 clock->p1 = 2;
1112                 clock->p2 = 10;
1113                 clock->n = 3;
1114                 clock->m1 = 16;
1115                 clock->m2 = 8;
1116         } else if (dotclock >= 140500 && dotclock <= 200000) {
1117                 clock->p1 = 1;
1118                 clock->p2 = 10;
1119                 clock->n = 6;
1120                 clock->m1 = 12;
1121                 clock->m2 = 8;
1122         } else {
1123                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1124         }
1125
1126         pipe_config->clock_set = true;
1127 }
1128
1129 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1130                                       struct intel_crtc_state *pipe_config)
1131 {
1132         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1133         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1134         struct drm_display_mode *mode = &pipe_config->base.mode;
1135
1136         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1137         pipe_config->pipe_bpp = 8*3;
1138
1139         if (HAS_PCH_SPLIT(encoder->base.dev))
1140                 pipe_config->has_pch_encoder = true;
1141
1142         /* We need to construct preferred input timings based on our
1143          * output timings.  To do that, we have to set the output
1144          * timings, even though this isn't really the right place in
1145          * the sequence to do it. Oh well.
1146          */
1147         if (intel_sdvo->is_tv) {
1148                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1149                         return false;
1150
1151                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1152                                                            mode,
1153                                                            adjusted_mode);
1154                 pipe_config->sdvo_tv_clock = true;
1155         } else if (intel_sdvo->is_lvds) {
1156                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1157                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1158                         return false;
1159
1160                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1161                                                            mode,
1162                                                            adjusted_mode);
1163         }
1164
1165         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1166          * SDVO device will factor out the multiplier during mode_set.
1167          */
1168         pipe_config->pixel_multiplier =
1169                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1170
1171         pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1172
1173         if (intel_sdvo->color_range_auto) {
1174                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1175                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1176                  * bit per color mode. */
1177                 if (pipe_config->has_hdmi_sink &&
1178                     drm_match_cea_mode(adjusted_mode) > 1)
1179                         pipe_config->limited_color_range = true;
1180         } else {
1181                 if (pipe_config->has_hdmi_sink &&
1182                     intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235)
1183                         pipe_config->limited_color_range = true;
1184         }
1185
1186         /* Clock computation needs to happen after pixel multiplier. */
1187         if (intel_sdvo->is_tv)
1188                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1189
1190         /* Set user selected PAR to incoming mode's member */
1191         if (intel_sdvo->is_hdmi)
1192                 adjusted_mode->picture_aspect_ratio = intel_sdvo->aspect_ratio;
1193
1194         return true;
1195 }
1196
1197 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder)
1198 {
1199         struct drm_device *dev = intel_encoder->base.dev;
1200         struct drm_i915_private *dev_priv = dev->dev_private;
1201         struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc);
1202         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
1203         struct drm_display_mode *mode = &crtc->config->base.mode;
1204         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1205         u32 sdvox;
1206         struct intel_sdvo_in_out_map in_out;
1207         struct intel_sdvo_dtd input_dtd, output_dtd;
1208         int rate;
1209
1210         if (!mode)
1211                 return;
1212
1213         /* First, set the input mapping for the first input to our controlled
1214          * output. This is only correct if we're a single-input device, in
1215          * which case the first input is the output from the appropriate SDVO
1216          * channel on the motherboard.  In a two-input device, the first input
1217          * will be SDVOB and the second SDVOC.
1218          */
1219         in_out.in0 = intel_sdvo->attached_output;
1220         in_out.in1 = 0;
1221
1222         intel_sdvo_set_value(intel_sdvo,
1223                              SDVO_CMD_SET_IN_OUT_MAP,
1224                              &in_out, sizeof(in_out));
1225
1226         /* Set the output timings to the screen */
1227         if (!intel_sdvo_set_target_output(intel_sdvo,
1228                                           intel_sdvo->attached_output))
1229                 return;
1230
1231         /* lvds has a special fixed output timing. */
1232         if (intel_sdvo->is_lvds)
1233                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1234                                              intel_sdvo->sdvo_lvds_fixed_mode);
1235         else
1236                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1237         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1238                 DRM_INFO("Setting output timings on %s failed\n",
1239                          SDVO_NAME(intel_sdvo));
1240
1241         /* Set the input timing to the screen. Assume always input 0. */
1242         if (!intel_sdvo_set_target_input(intel_sdvo))
1243                 return;
1244
1245         if (crtc->config->has_hdmi_sink) {
1246                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1247                 intel_sdvo_set_colorimetry(intel_sdvo,
1248                                            SDVO_COLORIMETRY_RGB256);
1249                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1250         } else
1251                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1252
1253         if (intel_sdvo->is_tv &&
1254             !intel_sdvo_set_tv_format(intel_sdvo))
1255                 return;
1256
1257         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1258
1259         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1260                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1261         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1262                 DRM_INFO("Setting input timings on %s failed\n",
1263                          SDVO_NAME(intel_sdvo));
1264
1265         switch (crtc->config->pixel_multiplier) {
1266         default:
1267                 WARN(1, "unknown pixel multiplier specified\n");
1268         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1269         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1270         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1271         }
1272         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1273                 return;
1274
1275         /* Set the SDVO control regs. */
1276         if (INTEL_INFO(dev)->gen >= 4) {
1277                 /* The real mode polarity is set by the SDVO commands, using
1278                  * struct intel_sdvo_dtd. */
1279                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1280                 if (!HAS_PCH_SPLIT(dev) && crtc->config->limited_color_range)
1281                         sdvox |= HDMI_COLOR_RANGE_16_235;
1282                 if (INTEL_INFO(dev)->gen < 5)
1283                         sdvox |= SDVO_BORDER_ENABLE;
1284         } else {
1285                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1286                 switch (intel_sdvo->sdvo_reg) {
1287                 case GEN3_SDVOB:
1288                         sdvox &= SDVOB_PRESERVE_MASK;
1289                         break;
1290                 case GEN3_SDVOC:
1291                         sdvox &= SDVOC_PRESERVE_MASK;
1292                         break;
1293                 }
1294                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1295         }
1296
1297         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1298                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1299         else
1300                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1301
1302         if (intel_sdvo->has_hdmi_audio)
1303                 sdvox |= SDVO_AUDIO_ENABLE;
1304
1305         if (INTEL_INFO(dev)->gen >= 4) {
1306                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1307         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1308                 /* done in crtc_mode_set as it lives inside the dpll register */
1309         } else {
1310                 sdvox |= (crtc->config->pixel_multiplier - 1)
1311                         << SDVO_PORT_MULTIPLY_SHIFT;
1312         }
1313
1314         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1315             INTEL_INFO(dev)->gen < 5)
1316                 sdvox |= SDVO_STALL_SELECT;
1317         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1318 }
1319
1320 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1321 {
1322         struct intel_sdvo_connector *intel_sdvo_connector =
1323                 to_intel_sdvo_connector(&connector->base);
1324         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1325         u16 active_outputs = 0;
1326
1327         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1328
1329         if (active_outputs & intel_sdvo_connector->output_flag)
1330                 return true;
1331         else
1332                 return false;
1333 }
1334
1335 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1336                                     enum pipe *pipe)
1337 {
1338         struct drm_device *dev = encoder->base.dev;
1339         struct drm_i915_private *dev_priv = dev->dev_private;
1340         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1341         u16 active_outputs = 0;
1342         u32 tmp;
1343
1344         tmp = I915_READ(intel_sdvo->sdvo_reg);
1345         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1346
1347         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1348                 return false;
1349
1350         if (HAS_PCH_CPT(dev))
1351                 *pipe = PORT_TO_PIPE_CPT(tmp);
1352         else
1353                 *pipe = PORT_TO_PIPE(tmp);
1354
1355         return true;
1356 }
1357
1358 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1359                                   struct intel_crtc_state *pipe_config)
1360 {
1361         struct drm_device *dev = encoder->base.dev;
1362         struct drm_i915_private *dev_priv = dev->dev_private;
1363         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1364         struct intel_sdvo_dtd dtd;
1365         int encoder_pixel_multiplier = 0;
1366         int dotclock;
1367         u32 flags = 0, sdvox;
1368         u8 val;
1369         bool ret;
1370
1371         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1372
1373         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1374         if (!ret) {
1375                 /* Some sdvo encoders are not spec compliant and don't
1376                  * implement the mandatory get_timings function. */
1377                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1378                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1379         } else {
1380                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1381                         flags |= DRM_MODE_FLAG_PHSYNC;
1382                 else
1383                         flags |= DRM_MODE_FLAG_NHSYNC;
1384
1385                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1386                         flags |= DRM_MODE_FLAG_PVSYNC;
1387                 else
1388                         flags |= DRM_MODE_FLAG_NVSYNC;
1389         }
1390
1391         pipe_config->base.adjusted_mode.flags |= flags;
1392
1393         /*
1394          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1395          * the sdvo port register, on all other platforms it is part of the dpll
1396          * state. Since the general pipe state readout happens before the
1397          * encoder->get_config we so already have a valid pixel multplier on all
1398          * other platfroms.
1399          */
1400         if (IS_I915G(dev) || IS_I915GM(dev)) {
1401                 pipe_config->pixel_multiplier =
1402                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1403                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1404         }
1405
1406         dotclock = pipe_config->port_clock;
1407         if (pipe_config->pixel_multiplier)
1408                 dotclock /= pipe_config->pixel_multiplier;
1409
1410         if (HAS_PCH_SPLIT(dev))
1411                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
1412
1413         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1414
1415         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1416         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1417                                  &val, 1)) {
1418                 switch (val) {
1419                 case SDVO_CLOCK_RATE_MULT_1X:
1420                         encoder_pixel_multiplier = 1;
1421                         break;
1422                 case SDVO_CLOCK_RATE_MULT_2X:
1423                         encoder_pixel_multiplier = 2;
1424                         break;
1425                 case SDVO_CLOCK_RATE_MULT_4X:
1426                         encoder_pixel_multiplier = 4;
1427                         break;
1428                 }
1429         }
1430
1431         if (sdvox & HDMI_COLOR_RANGE_16_235)
1432                 pipe_config->limited_color_range = true;
1433
1434         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1435                                  &val, 1)) {
1436                 if (val == SDVO_ENCODE_HDMI)
1437                         pipe_config->has_hdmi_sink = true;
1438         }
1439
1440         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1441              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1442              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1443 }
1444
1445 static void intel_disable_sdvo(struct intel_encoder *encoder)
1446 {
1447         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1448         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1449         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
1450         u32 temp;
1451
1452         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1453         if (0)
1454                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1455                                                    DRM_MODE_DPMS_OFF);
1456
1457         temp = I915_READ(intel_sdvo->sdvo_reg);
1458
1459         temp &= ~SDVO_ENABLE;
1460         intel_sdvo_write_sdvox(intel_sdvo, temp);
1461
1462         /*
1463          * HW workaround for IBX, we need to move the port
1464          * to transcoder A after disabling it to allow the
1465          * matching DP port to be enabled on transcoder A.
1466          */
1467         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1468                 temp &= ~SDVO_PIPE_B_SELECT;
1469                 temp |= SDVO_ENABLE;
1470                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1471
1472                 temp &= ~SDVO_ENABLE;
1473                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1474         }
1475 }
1476
1477 static void pch_disable_sdvo(struct intel_encoder *encoder)
1478 {
1479 }
1480
1481 static void pch_post_disable_sdvo(struct intel_encoder *encoder)
1482 {
1483         intel_disable_sdvo(encoder);
1484 }
1485
1486 static void intel_enable_sdvo(struct intel_encoder *encoder)
1487 {
1488         struct drm_device *dev = encoder->base.dev;
1489         struct drm_i915_private *dev_priv = dev->dev_private;
1490         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1491         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1492         u32 temp;
1493         bool input1, input2;
1494         int i;
1495         bool success;
1496
1497         temp = I915_READ(intel_sdvo->sdvo_reg);
1498         temp |= SDVO_ENABLE;
1499         intel_sdvo_write_sdvox(intel_sdvo, temp);
1500
1501         for (i = 0; i < 2; i++)
1502                 intel_wait_for_vblank(dev, intel_crtc->pipe);
1503
1504         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1505         /* Warn if the device reported failure to sync.
1506          * A lot of SDVO devices fail to notify of sync, but it's
1507          * a given it the status is a success, we succeeded.
1508          */
1509         if (success && !input1) {
1510                 DRM_DEBUG_KMS("First %s output reported failure to "
1511                                 "sync\n", SDVO_NAME(intel_sdvo));
1512         }
1513
1514         if (0)
1515                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1516                                                    DRM_MODE_DPMS_ON);
1517         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1518 }
1519
1520 static enum drm_mode_status
1521 intel_sdvo_mode_valid(struct drm_connector *connector,
1522                       struct drm_display_mode *mode)
1523 {
1524         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1525
1526         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1527                 return MODE_NO_DBLESCAN;
1528
1529         if (intel_sdvo->pixel_clock_min > mode->clock)
1530                 return MODE_CLOCK_LOW;
1531
1532         if (intel_sdvo->pixel_clock_max < mode->clock)
1533                 return MODE_CLOCK_HIGH;
1534
1535         if (intel_sdvo->is_lvds) {
1536                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1537                         return MODE_PANEL;
1538
1539                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1540                         return MODE_PANEL;
1541         }
1542
1543         return MODE_OK;
1544 }
1545
1546 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1547 {
1548         BUILD_BUG_ON(sizeof(*caps) != 8);
1549         if (!intel_sdvo_get_value(intel_sdvo,
1550                                   SDVO_CMD_GET_DEVICE_CAPS,
1551                                   caps, sizeof(*caps)))
1552                 return false;
1553
1554         DRM_DEBUG_KMS("SDVO capabilities:\n"
1555                       "  vendor_id: %d\n"
1556                       "  device_id: %d\n"
1557                       "  device_rev_id: %d\n"
1558                       "  sdvo_version_major: %d\n"
1559                       "  sdvo_version_minor: %d\n"
1560                       "  sdvo_inputs_mask: %d\n"
1561                       "  smooth_scaling: %d\n"
1562                       "  sharp_scaling: %d\n"
1563                       "  up_scaling: %d\n"
1564                       "  down_scaling: %d\n"
1565                       "  stall_support: %d\n"
1566                       "  output_flags: %d\n",
1567                       caps->vendor_id,
1568                       caps->device_id,
1569                       caps->device_rev_id,
1570                       caps->sdvo_version_major,
1571                       caps->sdvo_version_minor,
1572                       caps->sdvo_inputs_mask,
1573                       caps->smooth_scaling,
1574                       caps->sharp_scaling,
1575                       caps->up_scaling,
1576                       caps->down_scaling,
1577                       caps->stall_support,
1578                       caps->output_flags);
1579
1580         return true;
1581 }
1582
1583 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1584 {
1585         struct drm_device *dev = intel_sdvo->base.base.dev;
1586         uint16_t hotplug;
1587
1588         if (!I915_HAS_HOTPLUG(dev))
1589                 return 0;
1590
1591         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1592          * on the line. */
1593         if (IS_I945G(dev) || IS_I945GM(dev))
1594                 return 0;
1595
1596         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1597                                         &hotplug, sizeof(hotplug)))
1598                 return 0;
1599
1600         return hotplug;
1601 }
1602
1603 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1604 {
1605         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1606
1607         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1608                         &intel_sdvo->hotplug_active, 2);
1609 }
1610
1611 static bool
1612 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1613 {
1614         /* Is there more than one type of output? */
1615         return hweight16(intel_sdvo->caps.output_flags) > 1;
1616 }
1617
1618 static struct edid *
1619 intel_sdvo_get_edid(struct drm_connector *connector)
1620 {
1621         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1622         return drm_get_edid(connector, &sdvo->ddc);
1623 }
1624
1625 /* Mac mini hack -- use the same DDC as the analog connector */
1626 static struct edid *
1627 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1628 {
1629         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1630
1631         return drm_get_edid(connector,
1632                             intel_gmbus_get_adapter(dev_priv,
1633                                                     dev_priv->vbt.crt_ddc_pin));
1634 }
1635
1636 static enum drm_connector_status
1637 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1638 {
1639         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1640         enum drm_connector_status status;
1641         struct edid *edid;
1642
1643         edid = intel_sdvo_get_edid(connector);
1644
1645         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1646                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1647
1648                 /*
1649                  * Don't use the 1 as the argument of DDC bus switch to get
1650                  * the EDID. It is used for SDVO SPD ROM.
1651                  */
1652                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1653                         intel_sdvo->ddc_bus = ddc;
1654                         edid = intel_sdvo_get_edid(connector);
1655                         if (edid)
1656                                 break;
1657                 }
1658                 /*
1659                  * If we found the EDID on the other bus,
1660                  * assume that is the correct DDC bus.
1661                  */
1662                 if (edid == NULL)
1663                         intel_sdvo->ddc_bus = saved_ddc;
1664         }
1665
1666         /*
1667          * When there is no edid and no monitor is connected with VGA
1668          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1669          */
1670         if (edid == NULL)
1671                 edid = intel_sdvo_get_analog_edid(connector);
1672
1673         status = connector_status_unknown;
1674         if (edid != NULL) {
1675                 /* DDC bus is shared, match EDID to connector type */
1676                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1677                         status = connector_status_connected;
1678                         if (intel_sdvo->is_hdmi) {
1679                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1680                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1681                                 intel_sdvo->rgb_quant_range_selectable =
1682                                         drm_rgb_quant_range_selectable(edid);
1683                         }
1684                 } else
1685                         status = connector_status_disconnected;
1686                 kfree(edid);
1687         }
1688
1689         if (status == connector_status_connected) {
1690                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1691                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1692                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1693         }
1694
1695         return status;
1696 }
1697
1698 static bool
1699 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1700                                   struct edid *edid)
1701 {
1702         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1703         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1704
1705         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1706                       connector_is_digital, monitor_is_digital);
1707         return connector_is_digital == monitor_is_digital;
1708 }
1709
1710 static enum drm_connector_status
1711 intel_sdvo_detect(struct drm_connector *connector, bool force)
1712 {
1713         uint16_t response;
1714         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1715         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1716         enum drm_connector_status ret;
1717
1718         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1719                       connector->base.id, connector->name);
1720
1721         if (!intel_sdvo_get_value(intel_sdvo,
1722                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1723                                   &response, 2))
1724                 return connector_status_unknown;
1725
1726         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1727                       response & 0xff, response >> 8,
1728                       intel_sdvo_connector->output_flag);
1729
1730         if (response == 0)
1731                 return connector_status_disconnected;
1732
1733         intel_sdvo->attached_output = response;
1734
1735         intel_sdvo->has_hdmi_monitor = false;
1736         intel_sdvo->has_hdmi_audio = false;
1737         intel_sdvo->rgb_quant_range_selectable = false;
1738
1739         if ((intel_sdvo_connector->output_flag & response) == 0)
1740                 ret = connector_status_disconnected;
1741         else if (IS_TMDS(intel_sdvo_connector))
1742                 ret = intel_sdvo_tmds_sink_detect(connector);
1743         else {
1744                 struct edid *edid;
1745
1746                 /* if we have an edid check it matches the connection */
1747                 edid = intel_sdvo_get_edid(connector);
1748                 if (edid == NULL)
1749                         edid = intel_sdvo_get_analog_edid(connector);
1750                 if (edid != NULL) {
1751                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1752                                                               edid))
1753                                 ret = connector_status_connected;
1754                         else
1755                                 ret = connector_status_disconnected;
1756
1757                         kfree(edid);
1758                 } else
1759                         ret = connector_status_connected;
1760         }
1761
1762         /* May update encoder flag for like clock for SDVO TV, etc.*/
1763         if (ret == connector_status_connected) {
1764                 intel_sdvo->is_tv = false;
1765                 intel_sdvo->is_lvds = false;
1766
1767                 if (response & SDVO_TV_MASK)
1768                         intel_sdvo->is_tv = true;
1769                 if (response & SDVO_LVDS_MASK)
1770                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1771         }
1772
1773         return ret;
1774 }
1775
1776 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1777 {
1778         struct edid *edid;
1779
1780         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1781                       connector->base.id, connector->name);
1782
1783         /* set the bus switch and get the modes */
1784         edid = intel_sdvo_get_edid(connector);
1785
1786         /*
1787          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1788          * link between analog and digital outputs. So, if the regular SDVO
1789          * DDC fails, check to see if the analog output is disconnected, in
1790          * which case we'll look there for the digital DDC data.
1791          */
1792         if (edid == NULL)
1793                 edid = intel_sdvo_get_analog_edid(connector);
1794
1795         if (edid != NULL) {
1796                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1797                                                       edid)) {
1798                         drm_mode_connector_update_edid_property(connector, edid);
1799                         drm_add_edid_modes(connector, edid);
1800                 }
1801
1802                 kfree(edid);
1803         }
1804 }
1805
1806 /*
1807  * Set of SDVO TV modes.
1808  * Note!  This is in reply order (see loop in get_tv_modes).
1809  * XXX: all 60Hz refresh?
1810  */
1811 static const struct drm_display_mode sdvo_tv_modes[] = {
1812         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1813                    416, 0, 200, 201, 232, 233, 0,
1814                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1815         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1816                    416, 0, 240, 241, 272, 273, 0,
1817                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1818         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1819                    496, 0, 300, 301, 332, 333, 0,
1820                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1821         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1822                    736, 0, 350, 351, 382, 383, 0,
1823                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1824         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1825                    736, 0, 400, 401, 432, 433, 0,
1826                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1827         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1828                    736, 0, 480, 481, 512, 513, 0,
1829                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1830         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1831                    800, 0, 480, 481, 512, 513, 0,
1832                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1833         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1834                    800, 0, 576, 577, 608, 609, 0,
1835                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1836         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1837                    816, 0, 350, 351, 382, 383, 0,
1838                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1839         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1840                    816, 0, 400, 401, 432, 433, 0,
1841                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1842         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1843                    816, 0, 480, 481, 512, 513, 0,
1844                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1845         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1846                    816, 0, 540, 541, 572, 573, 0,
1847                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1848         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1849                    816, 0, 576, 577, 608, 609, 0,
1850                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1851         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1852                    864, 0, 576, 577, 608, 609, 0,
1853                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1854         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1855                    896, 0, 600, 601, 632, 633, 0,
1856                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1857         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1858                    928, 0, 624, 625, 656, 657, 0,
1859                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1860         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1861                    1016, 0, 766, 767, 798, 799, 0,
1862                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1863         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1864                    1120, 0, 768, 769, 800, 801, 0,
1865                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1866         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1867                    1376, 0, 1024, 1025, 1056, 1057, 0,
1868                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1869 };
1870
1871 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1872 {
1873         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1874         struct intel_sdvo_sdtv_resolution_request tv_res;
1875         uint32_t reply = 0, format_map = 0;
1876         int i;
1877
1878         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1879                       connector->base.id, connector->name);
1880
1881         /* Read the list of supported input resolutions for the selected TV
1882          * format.
1883          */
1884         format_map = 1 << intel_sdvo->tv_format_index;
1885         memcpy(&tv_res, &format_map,
1886                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1887
1888         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1889                 return;
1890
1891         BUILD_BUG_ON(sizeof(tv_res) != 3);
1892         if (!intel_sdvo_write_cmd(intel_sdvo,
1893                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1894                                   &tv_res, sizeof(tv_res)))
1895                 return;
1896         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1897                 return;
1898
1899         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1900                 if (reply & (1 << i)) {
1901                         struct drm_display_mode *nmode;
1902                         nmode = drm_mode_duplicate(connector->dev,
1903                                                    &sdvo_tv_modes[i]);
1904                         if (nmode)
1905                                 drm_mode_probed_add(connector, nmode);
1906                 }
1907 }
1908
1909 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1910 {
1911         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1912         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1913         struct drm_display_mode *newmode;
1914
1915         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1916                       connector->base.id, connector->name);
1917
1918         /*
1919          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1920          * SDVO->LVDS transcoders can't cope with the EDID mode.
1921          */
1922         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1923                 newmode = drm_mode_duplicate(connector->dev,
1924                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
1925                 if (newmode != NULL) {
1926                         /* Guarantee the mode is preferred */
1927                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1928                                          DRM_MODE_TYPE_DRIVER);
1929                         drm_mode_probed_add(connector, newmode);
1930                 }
1931         }
1932
1933         /*
1934          * Attempt to get the mode list from DDC.
1935          * Assume that the preferred modes are
1936          * arranged in priority order.
1937          */
1938         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
1939
1940         list_for_each_entry(newmode, &connector->probed_modes, head) {
1941                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1942                         intel_sdvo->sdvo_lvds_fixed_mode =
1943                                 drm_mode_duplicate(connector->dev, newmode);
1944
1945                         intel_sdvo->is_lvds = true;
1946                         break;
1947                 }
1948         }
1949 }
1950
1951 static int intel_sdvo_get_modes(struct drm_connector *connector)
1952 {
1953         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1954
1955         if (IS_TV(intel_sdvo_connector))
1956                 intel_sdvo_get_tv_modes(connector);
1957         else if (IS_LVDS(intel_sdvo_connector))
1958                 intel_sdvo_get_lvds_modes(connector);
1959         else
1960                 intel_sdvo_get_ddc_modes(connector);
1961
1962         return !list_empty(&connector->probed_modes);
1963 }
1964
1965 static void intel_sdvo_destroy(struct drm_connector *connector)
1966 {
1967         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1968
1969         drm_connector_cleanup(connector);
1970         kfree(intel_sdvo_connector);
1971 }
1972
1973 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1974 {
1975         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1976         struct edid *edid;
1977         bool has_audio = false;
1978
1979         if (!intel_sdvo->is_hdmi)
1980                 return false;
1981
1982         edid = intel_sdvo_get_edid(connector);
1983         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1984                 has_audio = drm_detect_monitor_audio(edid);
1985         kfree(edid);
1986
1987         return has_audio;
1988 }
1989
1990 static int
1991 intel_sdvo_set_property(struct drm_connector *connector,
1992                         struct drm_property *property,
1993                         uint64_t val)
1994 {
1995         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1996         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1997         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1998         uint16_t temp_value;
1999         uint8_t cmd;
2000         int ret;
2001
2002         ret = drm_object_property_set_value(&connector->base, property, val);
2003         if (ret)
2004                 return ret;
2005
2006         if (property == dev_priv->force_audio_property) {
2007                 int i = val;
2008                 bool has_audio;
2009
2010                 if (i == intel_sdvo_connector->force_audio)
2011                         return 0;
2012
2013                 intel_sdvo_connector->force_audio = i;
2014
2015                 if (i == HDMI_AUDIO_AUTO)
2016                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
2017                 else
2018                         has_audio = (i == HDMI_AUDIO_ON);
2019
2020                 if (has_audio == intel_sdvo->has_hdmi_audio)
2021                         return 0;
2022
2023                 intel_sdvo->has_hdmi_audio = has_audio;
2024                 goto done;
2025         }
2026
2027         if (property == dev_priv->broadcast_rgb_property) {
2028                 bool old_auto = intel_sdvo->color_range_auto;
2029                 uint32_t old_range = intel_sdvo->color_range;
2030
2031                 switch (val) {
2032                 case INTEL_BROADCAST_RGB_AUTO:
2033                         intel_sdvo->color_range_auto = true;
2034                         break;
2035                 case INTEL_BROADCAST_RGB_FULL:
2036                         intel_sdvo->color_range_auto = false;
2037                         intel_sdvo->color_range = 0;
2038                         break;
2039                 case INTEL_BROADCAST_RGB_LIMITED:
2040                         intel_sdvo->color_range_auto = false;
2041                         /* FIXME: this bit is only valid when using TMDS
2042                          * encoding and 8 bit per color mode. */
2043                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
2044                         break;
2045                 default:
2046                         return -EINVAL;
2047                 }
2048
2049                 if (old_auto == intel_sdvo->color_range_auto &&
2050                     old_range == intel_sdvo->color_range)
2051                         return 0;
2052
2053                 goto done;
2054         }
2055
2056         if (property == connector->dev->mode_config.aspect_ratio_property) {
2057                 switch (val) {
2058                 case DRM_MODE_PICTURE_ASPECT_NONE:
2059                         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2060                         break;
2061                 case DRM_MODE_PICTURE_ASPECT_4_3:
2062                         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_4_3;
2063                         break;
2064                 case DRM_MODE_PICTURE_ASPECT_16_9:
2065                         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_16_9;
2066                         break;
2067                 default:
2068                         return -EINVAL;
2069                 }
2070                 goto done;
2071         }
2072
2073 #define CHECK_PROPERTY(name, NAME) \
2074         if (intel_sdvo_connector->name == property) { \
2075                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2076                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2077                 cmd = SDVO_CMD_SET_##NAME; \
2078                 intel_sdvo_connector->cur_##name = temp_value; \
2079                 goto set_value; \
2080         }
2081
2082         if (property == intel_sdvo_connector->tv_format) {
2083                 if (val >= TV_FORMAT_NUM)
2084                         return -EINVAL;
2085
2086                 if (intel_sdvo->tv_format_index ==
2087                     intel_sdvo_connector->tv_format_supported[val])
2088                         return 0;
2089
2090                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
2091                 goto done;
2092         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
2093                 temp_value = val;
2094                 if (intel_sdvo_connector->left == property) {
2095                         drm_object_property_set_value(&connector->base,
2096                                                          intel_sdvo_connector->right, val);
2097                         if (intel_sdvo_connector->left_margin == temp_value)
2098                                 return 0;
2099
2100                         intel_sdvo_connector->left_margin = temp_value;
2101                         intel_sdvo_connector->right_margin = temp_value;
2102                         temp_value = intel_sdvo_connector->max_hscan -
2103                                 intel_sdvo_connector->left_margin;
2104                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2105                         goto set_value;
2106                 } else if (intel_sdvo_connector->right == property) {
2107                         drm_object_property_set_value(&connector->base,
2108                                                          intel_sdvo_connector->left, val);
2109                         if (intel_sdvo_connector->right_margin == temp_value)
2110                                 return 0;
2111
2112                         intel_sdvo_connector->left_margin = temp_value;
2113                         intel_sdvo_connector->right_margin = temp_value;
2114                         temp_value = intel_sdvo_connector->max_hscan -
2115                                 intel_sdvo_connector->left_margin;
2116                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2117                         goto set_value;
2118                 } else if (intel_sdvo_connector->top == property) {
2119                         drm_object_property_set_value(&connector->base,
2120                                                          intel_sdvo_connector->bottom, val);
2121                         if (intel_sdvo_connector->top_margin == temp_value)
2122                                 return 0;
2123
2124                         intel_sdvo_connector->top_margin = temp_value;
2125                         intel_sdvo_connector->bottom_margin = temp_value;
2126                         temp_value = intel_sdvo_connector->max_vscan -
2127                                 intel_sdvo_connector->top_margin;
2128                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2129                         goto set_value;
2130                 } else if (intel_sdvo_connector->bottom == property) {
2131                         drm_object_property_set_value(&connector->base,
2132                                                          intel_sdvo_connector->top, val);
2133                         if (intel_sdvo_connector->bottom_margin == temp_value)
2134                                 return 0;
2135
2136                         intel_sdvo_connector->top_margin = temp_value;
2137                         intel_sdvo_connector->bottom_margin = temp_value;
2138                         temp_value = intel_sdvo_connector->max_vscan -
2139                                 intel_sdvo_connector->top_margin;
2140                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2141                         goto set_value;
2142                 }
2143                 CHECK_PROPERTY(hpos, HPOS)
2144                 CHECK_PROPERTY(vpos, VPOS)
2145                 CHECK_PROPERTY(saturation, SATURATION)
2146                 CHECK_PROPERTY(contrast, CONTRAST)
2147                 CHECK_PROPERTY(hue, HUE)
2148                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2149                 CHECK_PROPERTY(sharpness, SHARPNESS)
2150                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2151                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2152                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2153                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2154                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2155                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2156         }
2157
2158         return -EINVAL; /* unknown property */
2159
2160 set_value:
2161         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2162                 return -EIO;
2163
2164
2165 done:
2166         if (intel_sdvo->base.base.crtc)
2167                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2168
2169         return 0;
2170 #undef CHECK_PROPERTY
2171 }
2172
2173 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2174         .dpms = drm_atomic_helper_connector_dpms,
2175         .detect = intel_sdvo_detect,
2176         .fill_modes = drm_helper_probe_single_connector_modes,
2177         .set_property = intel_sdvo_set_property,
2178         .atomic_get_property = intel_connector_atomic_get_property,
2179         .destroy = intel_sdvo_destroy,
2180         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2181         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
2182 };
2183
2184 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2185         .get_modes = intel_sdvo_get_modes,
2186         .mode_valid = intel_sdvo_mode_valid,
2187         .best_encoder = intel_best_encoder,
2188 };
2189
2190 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2191 {
2192         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2193
2194         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2195                 drm_mode_destroy(encoder->dev,
2196                                  intel_sdvo->sdvo_lvds_fixed_mode);
2197
2198         i2c_del_adapter(&intel_sdvo->ddc);
2199         intel_encoder_destroy(encoder);
2200 }
2201
2202 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2203         .destroy = intel_sdvo_enc_destroy,
2204 };
2205
2206 static void
2207 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2208 {
2209         uint16_t mask = 0;
2210         unsigned int num_bits;
2211
2212         /* Make a mask of outputs less than or equal to our own priority in the
2213          * list.
2214          */
2215         switch (sdvo->controlled_output) {
2216         case SDVO_OUTPUT_LVDS1:
2217                 mask |= SDVO_OUTPUT_LVDS1;
2218         case SDVO_OUTPUT_LVDS0:
2219                 mask |= SDVO_OUTPUT_LVDS0;
2220         case SDVO_OUTPUT_TMDS1:
2221                 mask |= SDVO_OUTPUT_TMDS1;
2222         case SDVO_OUTPUT_TMDS0:
2223                 mask |= SDVO_OUTPUT_TMDS0;
2224         case SDVO_OUTPUT_RGB1:
2225                 mask |= SDVO_OUTPUT_RGB1;
2226         case SDVO_OUTPUT_RGB0:
2227                 mask |= SDVO_OUTPUT_RGB0;
2228                 break;
2229         }
2230
2231         /* Count bits to find what number we are in the priority list. */
2232         mask &= sdvo->caps.output_flags;
2233         num_bits = hweight16(mask);
2234         /* If more than 3 outputs, default to DDC bus 3 for now. */
2235         if (num_bits > 3)
2236                 num_bits = 3;
2237
2238         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2239         sdvo->ddc_bus = 1 << num_bits;
2240 }
2241
2242 /**
2243  * Choose the appropriate DDC bus for control bus switch command for this
2244  * SDVO output based on the controlled output.
2245  *
2246  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2247  * outputs, then LVDS outputs.
2248  */
2249 static void
2250 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2251                           struct intel_sdvo *sdvo)
2252 {
2253         struct sdvo_device_mapping *mapping;
2254
2255         if (sdvo->is_sdvob)
2256                 mapping = &(dev_priv->sdvo_mappings[0]);
2257         else
2258                 mapping = &(dev_priv->sdvo_mappings[1]);
2259
2260         if (mapping->initialized)
2261                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2262         else
2263                 intel_sdvo_guess_ddc_bus(sdvo);
2264 }
2265
2266 static void
2267 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2268                           struct intel_sdvo *sdvo)
2269 {
2270         struct sdvo_device_mapping *mapping;
2271         u8 pin;
2272
2273         if (sdvo->is_sdvob)
2274                 mapping = &dev_priv->sdvo_mappings[0];
2275         else
2276                 mapping = &dev_priv->sdvo_mappings[1];
2277
2278         if (mapping->initialized &&
2279             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2280                 pin = mapping->i2c_pin;
2281         else
2282                 pin = GMBUS_PIN_DPB;
2283
2284         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2285
2286         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2287          * our code totally fails once we start using gmbus. Hence fall back to
2288          * bit banging for now. */
2289         intel_gmbus_force_bit(sdvo->i2c, true);
2290 }
2291
2292 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2293 static void
2294 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2295 {
2296         intel_gmbus_force_bit(sdvo->i2c, false);
2297 }
2298
2299 static bool
2300 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2301 {
2302         return intel_sdvo_check_supp_encode(intel_sdvo);
2303 }
2304
2305 static u8
2306 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2307 {
2308         struct drm_i915_private *dev_priv = dev->dev_private;
2309         struct sdvo_device_mapping *my_mapping, *other_mapping;
2310
2311         if (sdvo->is_sdvob) {
2312                 my_mapping = &dev_priv->sdvo_mappings[0];
2313                 other_mapping = &dev_priv->sdvo_mappings[1];
2314         } else {
2315                 my_mapping = &dev_priv->sdvo_mappings[1];
2316                 other_mapping = &dev_priv->sdvo_mappings[0];
2317         }
2318
2319         /* If the BIOS described our SDVO device, take advantage of it. */
2320         if (my_mapping->slave_addr)
2321                 return my_mapping->slave_addr;
2322
2323         /* If the BIOS only described a different SDVO device, use the
2324          * address that it isn't using.
2325          */
2326         if (other_mapping->slave_addr) {
2327                 if (other_mapping->slave_addr == 0x70)
2328                         return 0x72;
2329                 else
2330                         return 0x70;
2331         }
2332
2333         /* No SDVO device info is found for another DVO port,
2334          * so use mapping assumption we had before BIOS parsing.
2335          */
2336         if (sdvo->is_sdvob)
2337                 return 0x70;
2338         else
2339                 return 0x72;
2340 }
2341
2342 static void
2343 intel_sdvo_connector_unregister(struct intel_connector *intel_connector)
2344 {
2345         struct drm_connector *drm_connector;
2346         struct intel_sdvo *sdvo_encoder;
2347
2348         drm_connector = &intel_connector->base;
2349         sdvo_encoder = intel_attached_sdvo(&intel_connector->base);
2350
2351         sysfs_remove_link(&drm_connector->kdev->kobj,
2352                           sdvo_encoder->ddc.dev.kobj.name);
2353         intel_connector_unregister(intel_connector);
2354 }
2355
2356 static int
2357 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2358                           struct intel_sdvo *encoder)
2359 {
2360         struct drm_connector *drm_connector;
2361         int ret;
2362
2363         drm_connector = &connector->base.base;
2364         ret = drm_connector_init(encoder->base.base.dev,
2365                            drm_connector,
2366                            &intel_sdvo_connector_funcs,
2367                            connector->base.base.connector_type);
2368         if (ret < 0)
2369                 return ret;
2370
2371         drm_connector_helper_add(drm_connector,
2372                                  &intel_sdvo_connector_helper_funcs);
2373
2374         connector->base.base.interlace_allowed = 1;
2375         connector->base.base.doublescan_allowed = 0;
2376         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2377         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2378         connector->base.unregister = intel_sdvo_connector_unregister;
2379
2380         intel_connector_attach_encoder(&connector->base, &encoder->base);
2381         ret = drm_connector_register(drm_connector);
2382         if (ret < 0)
2383                 goto err1;
2384
2385         ret = sysfs_create_link(&drm_connector->kdev->kobj,
2386                                 &encoder->ddc.dev.kobj,
2387                                 encoder->ddc.dev.kobj.name);
2388         if (ret < 0)
2389                 goto err2;
2390
2391         return 0;
2392
2393 err2:
2394         drm_connector_unregister(drm_connector);
2395 err1:
2396         drm_connector_cleanup(drm_connector);
2397
2398         return ret;
2399 }
2400
2401 static void
2402 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2403                                struct intel_sdvo_connector *connector)
2404 {
2405         struct drm_device *dev = connector->base.base.dev;
2406
2407         intel_attach_force_audio_property(&connector->base.base);
2408         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2409                 intel_attach_broadcast_rgb_property(&connector->base.base);
2410                 intel_sdvo->color_range_auto = true;
2411         }
2412         intel_attach_aspect_ratio_property(&connector->base.base);
2413         intel_sdvo->aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2414 }
2415
2416 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2417 {
2418         struct intel_sdvo_connector *sdvo_connector;
2419
2420         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2421         if (!sdvo_connector)
2422                 return NULL;
2423
2424         if (intel_connector_init(&sdvo_connector->base) < 0) {
2425                 kfree(sdvo_connector);
2426                 return NULL;
2427         }
2428
2429         return sdvo_connector;
2430 }
2431
2432 static bool
2433 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2434 {
2435         struct drm_encoder *encoder = &intel_sdvo->base.base;
2436         struct drm_connector *connector;
2437         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2438         struct intel_connector *intel_connector;
2439         struct intel_sdvo_connector *intel_sdvo_connector;
2440
2441         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2442
2443         intel_sdvo_connector = intel_sdvo_connector_alloc();
2444         if (!intel_sdvo_connector)
2445                 return false;
2446
2447         if (device == 0) {
2448                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2449                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2450         } else if (device == 1) {
2451                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2452                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2453         }
2454
2455         intel_connector = &intel_sdvo_connector->base;
2456         connector = &intel_connector->base;
2457         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2458                 intel_sdvo_connector->output_flag) {
2459                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2460                 /* Some SDVO devices have one-shot hotplug interrupts.
2461                  * Ensure that they get re-enabled when an interrupt happens.
2462                  */
2463                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2464                 intel_sdvo_enable_hotplug(intel_encoder);
2465         } else {
2466                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2467         }
2468         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2469         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2470
2471         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2472                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2473                 intel_sdvo->is_hdmi = true;
2474         }
2475
2476         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2477                 kfree(intel_sdvo_connector);
2478                 return false;
2479         }
2480
2481         if (intel_sdvo->is_hdmi)
2482                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2483
2484         return true;
2485 }
2486
2487 static bool
2488 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2489 {
2490         struct drm_encoder *encoder = &intel_sdvo->base.base;
2491         struct drm_connector *connector;
2492         struct intel_connector *intel_connector;
2493         struct intel_sdvo_connector *intel_sdvo_connector;
2494
2495         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2496
2497         intel_sdvo_connector = intel_sdvo_connector_alloc();
2498         if (!intel_sdvo_connector)
2499                 return false;
2500
2501         intel_connector = &intel_sdvo_connector->base;
2502         connector = &intel_connector->base;
2503         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2504         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2505
2506         intel_sdvo->controlled_output |= type;
2507         intel_sdvo_connector->output_flag = type;
2508
2509         intel_sdvo->is_tv = true;
2510
2511         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2512                 kfree(intel_sdvo_connector);
2513                 return false;
2514         }
2515
2516         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2517                 goto err;
2518
2519         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2520                 goto err;
2521
2522         return true;
2523
2524 err:
2525         drm_connector_unregister(connector);
2526         intel_sdvo_destroy(connector);
2527         return false;
2528 }
2529
2530 static bool
2531 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2532 {
2533         struct drm_encoder *encoder = &intel_sdvo->base.base;
2534         struct drm_connector *connector;
2535         struct intel_connector *intel_connector;
2536         struct intel_sdvo_connector *intel_sdvo_connector;
2537
2538         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2539
2540         intel_sdvo_connector = intel_sdvo_connector_alloc();
2541         if (!intel_sdvo_connector)
2542                 return false;
2543
2544         intel_connector = &intel_sdvo_connector->base;
2545         connector = &intel_connector->base;
2546         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2547         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2548         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2549
2550         if (device == 0) {
2551                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2552                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2553         } else if (device == 1) {
2554                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2555                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2556         }
2557
2558         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2559                 kfree(intel_sdvo_connector);
2560                 return false;
2561         }
2562
2563         return true;
2564 }
2565
2566 static bool
2567 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2568 {
2569         struct drm_encoder *encoder = &intel_sdvo->base.base;
2570         struct drm_connector *connector;
2571         struct intel_connector *intel_connector;
2572         struct intel_sdvo_connector *intel_sdvo_connector;
2573
2574         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2575
2576         intel_sdvo_connector = intel_sdvo_connector_alloc();
2577         if (!intel_sdvo_connector)
2578                 return false;
2579
2580         intel_connector = &intel_sdvo_connector->base;
2581         connector = &intel_connector->base;
2582         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2583         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2584
2585         if (device == 0) {
2586                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2587                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2588         } else if (device == 1) {
2589                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2590                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2591         }
2592
2593         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2594                 kfree(intel_sdvo_connector);
2595                 return false;
2596         }
2597
2598         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2599                 goto err;
2600
2601         return true;
2602
2603 err:
2604         drm_connector_unregister(connector);
2605         intel_sdvo_destroy(connector);
2606         return false;
2607 }
2608
2609 static bool
2610 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2611 {
2612         intel_sdvo->is_tv = false;
2613         intel_sdvo->is_lvds = false;
2614
2615         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2616
2617         if (flags & SDVO_OUTPUT_TMDS0)
2618                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2619                         return false;
2620
2621         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2622                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2623                         return false;
2624
2625         /* TV has no XXX1 function block */
2626         if (flags & SDVO_OUTPUT_SVID0)
2627                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2628                         return false;
2629
2630         if (flags & SDVO_OUTPUT_CVBS0)
2631                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2632                         return false;
2633
2634         if (flags & SDVO_OUTPUT_YPRPB0)
2635                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2636                         return false;
2637
2638         if (flags & SDVO_OUTPUT_RGB0)
2639                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2640                         return false;
2641
2642         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2643                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2644                         return false;
2645
2646         if (flags & SDVO_OUTPUT_LVDS0)
2647                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2648                         return false;
2649
2650         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2651                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2652                         return false;
2653
2654         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2655                 unsigned char bytes[2];
2656
2657                 intel_sdvo->controlled_output = 0;
2658                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2659                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2660                               SDVO_NAME(intel_sdvo),
2661                               bytes[0], bytes[1]);
2662                 return false;
2663         }
2664         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2665
2666         return true;
2667 }
2668
2669 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2670 {
2671         struct drm_device *dev = intel_sdvo->base.base.dev;
2672         struct drm_connector *connector, *tmp;
2673
2674         list_for_each_entry_safe(connector, tmp,
2675                                  &dev->mode_config.connector_list, head) {
2676                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2677                         drm_connector_unregister(connector);
2678                         intel_sdvo_destroy(connector);
2679                 }
2680         }
2681 }
2682
2683 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2684                                           struct intel_sdvo_connector *intel_sdvo_connector,
2685                                           int type)
2686 {
2687         struct drm_device *dev = intel_sdvo->base.base.dev;
2688         struct intel_sdvo_tv_format format;
2689         uint32_t format_map, i;
2690
2691         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2692                 return false;
2693
2694         BUILD_BUG_ON(sizeof(format) != 6);
2695         if (!intel_sdvo_get_value(intel_sdvo,
2696                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2697                                   &format, sizeof(format)))
2698                 return false;
2699
2700         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2701
2702         if (format_map == 0)
2703                 return false;
2704
2705         intel_sdvo_connector->format_supported_num = 0;
2706         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2707                 if (format_map & (1 << i))
2708                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2709
2710
2711         intel_sdvo_connector->tv_format =
2712                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2713                                             "mode", intel_sdvo_connector->format_supported_num);
2714         if (!intel_sdvo_connector->tv_format)
2715                 return false;
2716
2717         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2718                 drm_property_add_enum(
2719                                 intel_sdvo_connector->tv_format, i,
2720                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2721
2722         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2723         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2724                                       intel_sdvo_connector->tv_format, 0);
2725         return true;
2726
2727 }
2728
2729 #define ENHANCEMENT(name, NAME) do { \
2730         if (enhancements.name) { \
2731                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2732                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2733                         return false; \
2734                 intel_sdvo_connector->max_##name = data_value[0]; \
2735                 intel_sdvo_connector->cur_##name = response; \
2736                 intel_sdvo_connector->name = \
2737                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2738                 if (!intel_sdvo_connector->name) return false; \
2739                 drm_object_attach_property(&connector->base, \
2740                                               intel_sdvo_connector->name, \
2741                                               intel_sdvo_connector->cur_##name); \
2742                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2743                               data_value[0], data_value[1], response); \
2744         } \
2745 } while (0)
2746
2747 static bool
2748 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2749                                       struct intel_sdvo_connector *intel_sdvo_connector,
2750                                       struct intel_sdvo_enhancements_reply enhancements)
2751 {
2752         struct drm_device *dev = intel_sdvo->base.base.dev;
2753         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2754         uint16_t response, data_value[2];
2755
2756         /* when horizontal overscan is supported, Add the left/right  property */
2757         if (enhancements.overscan_h) {
2758                 if (!intel_sdvo_get_value(intel_sdvo,
2759                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2760                                           &data_value, 4))
2761                         return false;
2762
2763                 if (!intel_sdvo_get_value(intel_sdvo,
2764                                           SDVO_CMD_GET_OVERSCAN_H,
2765                                           &response, 2))
2766                         return false;
2767
2768                 intel_sdvo_connector->max_hscan = data_value[0];
2769                 intel_sdvo_connector->left_margin = data_value[0] - response;
2770                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2771                 intel_sdvo_connector->left =
2772                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2773                 if (!intel_sdvo_connector->left)
2774                         return false;
2775
2776                 drm_object_attach_property(&connector->base,
2777                                               intel_sdvo_connector->left,
2778                                               intel_sdvo_connector->left_margin);
2779
2780                 intel_sdvo_connector->right =
2781                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2782                 if (!intel_sdvo_connector->right)
2783                         return false;
2784
2785                 drm_object_attach_property(&connector->base,
2786                                               intel_sdvo_connector->right,
2787                                               intel_sdvo_connector->right_margin);
2788                 DRM_DEBUG_KMS("h_overscan: max %d, "
2789                               "default %d, current %d\n",
2790                               data_value[0], data_value[1], response);
2791         }
2792
2793         if (enhancements.overscan_v) {
2794                 if (!intel_sdvo_get_value(intel_sdvo,
2795                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2796                                           &data_value, 4))
2797                         return false;
2798
2799                 if (!intel_sdvo_get_value(intel_sdvo,
2800                                           SDVO_CMD_GET_OVERSCAN_V,
2801                                           &response, 2))
2802                         return false;
2803
2804                 intel_sdvo_connector->max_vscan = data_value[0];
2805                 intel_sdvo_connector->top_margin = data_value[0] - response;
2806                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2807                 intel_sdvo_connector->top =
2808                         drm_property_create_range(dev, 0,
2809                                             "top_margin", 0, data_value[0]);
2810                 if (!intel_sdvo_connector->top)
2811                         return false;
2812
2813                 drm_object_attach_property(&connector->base,
2814                                               intel_sdvo_connector->top,
2815                                               intel_sdvo_connector->top_margin);
2816
2817                 intel_sdvo_connector->bottom =
2818                         drm_property_create_range(dev, 0,
2819                                             "bottom_margin", 0, data_value[0]);
2820                 if (!intel_sdvo_connector->bottom)
2821                         return false;
2822
2823                 drm_object_attach_property(&connector->base,
2824                                               intel_sdvo_connector->bottom,
2825                                               intel_sdvo_connector->bottom_margin);
2826                 DRM_DEBUG_KMS("v_overscan: max %d, "
2827                               "default %d, current %d\n",
2828                               data_value[0], data_value[1], response);
2829         }
2830
2831         ENHANCEMENT(hpos, HPOS);
2832         ENHANCEMENT(vpos, VPOS);
2833         ENHANCEMENT(saturation, SATURATION);
2834         ENHANCEMENT(contrast, CONTRAST);
2835         ENHANCEMENT(hue, HUE);
2836         ENHANCEMENT(sharpness, SHARPNESS);
2837         ENHANCEMENT(brightness, BRIGHTNESS);
2838         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2839         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2840         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2841         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2842         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2843
2844         if (enhancements.dot_crawl) {
2845                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2846                         return false;
2847
2848                 intel_sdvo_connector->max_dot_crawl = 1;
2849                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2850                 intel_sdvo_connector->dot_crawl =
2851                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2852                 if (!intel_sdvo_connector->dot_crawl)
2853                         return false;
2854
2855                 drm_object_attach_property(&connector->base,
2856                                               intel_sdvo_connector->dot_crawl,
2857                                               intel_sdvo_connector->cur_dot_crawl);
2858                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2859         }
2860
2861         return true;
2862 }
2863
2864 static bool
2865 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2866                                         struct intel_sdvo_connector *intel_sdvo_connector,
2867                                         struct intel_sdvo_enhancements_reply enhancements)
2868 {
2869         struct drm_device *dev = intel_sdvo->base.base.dev;
2870         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2871         uint16_t response, data_value[2];
2872
2873         ENHANCEMENT(brightness, BRIGHTNESS);
2874
2875         return true;
2876 }
2877 #undef ENHANCEMENT
2878
2879 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2880                                                struct intel_sdvo_connector *intel_sdvo_connector)
2881 {
2882         union {
2883                 struct intel_sdvo_enhancements_reply reply;
2884                 uint16_t response;
2885         } enhancements;
2886
2887         BUILD_BUG_ON(sizeof(enhancements) != 2);
2888
2889         enhancements.response = 0;
2890         intel_sdvo_get_value(intel_sdvo,
2891                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2892                              &enhancements, sizeof(enhancements));
2893         if (enhancements.response == 0) {
2894                 DRM_DEBUG_KMS("No enhancement is supported\n");
2895                 return true;
2896         }
2897
2898         if (IS_TV(intel_sdvo_connector))
2899                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2900         else if (IS_LVDS(intel_sdvo_connector))
2901                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2902         else
2903                 return true;
2904 }
2905
2906 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2907                                      struct i2c_msg *msgs,
2908                                      int num)
2909 {
2910         struct intel_sdvo *sdvo = adapter->algo_data;
2911
2912         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2913                 return -EIO;
2914
2915         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2916 }
2917
2918 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2919 {
2920         struct intel_sdvo *sdvo = adapter->algo_data;
2921         return sdvo->i2c->algo->functionality(sdvo->i2c);
2922 }
2923
2924 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2925         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2926         .functionality  = intel_sdvo_ddc_proxy_func
2927 };
2928
2929 static bool
2930 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2931                           struct drm_device *dev)
2932 {
2933         sdvo->ddc.owner = THIS_MODULE;
2934         sdvo->ddc.class = I2C_CLASS_DDC;
2935         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2936         sdvo->ddc.dev.parent = &dev->pdev->dev;
2937         sdvo->ddc.algo_data = sdvo;
2938         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2939
2940         return i2c_add_adapter(&sdvo->ddc) == 0;
2941 }
2942
2943 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2944 {
2945         struct drm_i915_private *dev_priv = dev->dev_private;
2946         struct intel_encoder *intel_encoder;
2947         struct intel_sdvo *intel_sdvo;
2948         int i;
2949         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
2950         if (!intel_sdvo)
2951                 return false;
2952
2953         intel_sdvo->sdvo_reg = sdvo_reg;
2954         intel_sdvo->is_sdvob = is_sdvob;
2955         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2956         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
2957         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2958                 goto err_i2c_bus;
2959
2960         /* encoder type will be decided later */
2961         intel_encoder = &intel_sdvo->base;
2962         intel_encoder->type = INTEL_OUTPUT_SDVO;
2963         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0,
2964                          NULL);
2965
2966         /* Read the regs to test if we can talk to the device */
2967         for (i = 0; i < 0x40; i++) {
2968                 u8 byte;
2969
2970                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2971                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2972                                       SDVO_NAME(intel_sdvo));
2973                         goto err;
2974                 }
2975         }
2976
2977         intel_encoder->compute_config = intel_sdvo_compute_config;
2978         if (HAS_PCH_SPLIT(dev)) {
2979                 intel_encoder->disable = pch_disable_sdvo;
2980                 intel_encoder->post_disable = pch_post_disable_sdvo;
2981         } else {
2982                 intel_encoder->disable = intel_disable_sdvo;
2983         }
2984         intel_encoder->pre_enable = intel_sdvo_pre_enable;
2985         intel_encoder->enable = intel_enable_sdvo;
2986         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2987         intel_encoder->get_config = intel_sdvo_get_config;
2988
2989         /* In default case sdvo lvds is false */
2990         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2991                 goto err;
2992
2993         if (intel_sdvo_output_setup(intel_sdvo,
2994                                     intel_sdvo->caps.output_flags) != true) {
2995                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2996                               SDVO_NAME(intel_sdvo));
2997                 /* Output_setup can leave behind connectors! */
2998                 goto err_output;
2999         }
3000
3001         /* Only enable the hotplug irq if we need it, to work around noisy
3002          * hotplug lines.
3003          */
3004         if (intel_sdvo->hotplug_active) {
3005                 intel_encoder->hpd_pin =
3006                         intel_sdvo->is_sdvob ?  HPD_SDVO_B : HPD_SDVO_C;
3007         }
3008
3009         /*
3010          * Cloning SDVO with anything is often impossible, since the SDVO
3011          * encoder can request a special input timing mode. And even if that's
3012          * not the case we have evidence that cloning a plain unscaled mode with
3013          * VGA doesn't really work. Furthermore the cloning flags are way too
3014          * simplistic anyway to express such constraints, so just give up on
3015          * cloning for SDVO encoders.
3016          */
3017         intel_sdvo->base.cloneable = 0;
3018
3019         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3020
3021         /* Set the input timing to the screen. Assume always input 0. */
3022         if (!intel_sdvo_set_target_input(intel_sdvo))
3023                 goto err_output;
3024
3025         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3026                                                     &intel_sdvo->pixel_clock_min,
3027                                                     &intel_sdvo->pixel_clock_max))
3028                 goto err_output;
3029
3030         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3031                         "clock range %dMHz - %dMHz, "
3032                         "input 1: %c, input 2: %c, "
3033                         "output 1: %c, output 2: %c\n",
3034                         SDVO_NAME(intel_sdvo),
3035                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3036                         intel_sdvo->caps.device_rev_id,
3037                         intel_sdvo->pixel_clock_min / 1000,
3038                         intel_sdvo->pixel_clock_max / 1000,
3039                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3040                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3041                         /* check currently supported outputs */
3042                         intel_sdvo->caps.output_flags &
3043                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3044                         intel_sdvo->caps.output_flags &
3045                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3046         return true;
3047
3048 err_output:
3049         intel_sdvo_output_cleanup(intel_sdvo);
3050
3051 err:
3052         drm_encoder_cleanup(&intel_encoder->base);
3053         i2c_del_adapter(&intel_sdvo->ddc);
3054 err_i2c_bus:
3055         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3056         kfree(intel_sdvo);
3057
3058         return false;
3059 }