drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include "mdp4_kms.h"
  19
  20 #define DOWN_SCALE_MAX  8
  21 #define UP_SCALE_MAX    8
  22
  23 struct mdp4_plane {
  24         struct drm_plane base;
  25         const char *name;
  26
  27         enum mdp4_pipe pipe;
  28
  29         uint32_t nformats;
  30         uint32_t formats[32];
  31
  32         bool enabled;
  33 };
  34 #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
  35
  36 /* MDP format helper functions */
  37 static inline
  38 enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb)
  39 {
  40         bool is_tile = false;
  41
  42         if (fb->modifier[1] == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
  43                 is_tile = true;
  44
  45         if (fb->pixel_format == DRM_FORMAT_NV12 && is_tile)
  46                 return FRAME_TILE_YCBCR_420;
  47
  48         return FRAME_LINEAR;
  49 }
  50
  51 static void mdp4_plane_set_scanout(struct drm_plane *plane,
  52                 struct drm_framebuffer *fb);
  53 static int mdp4_plane_mode_set(struct drm_plane *plane,
  54                 struct drm_crtc *crtc, struct drm_framebuffer *fb,
  55                 int crtc_x, int crtc_y,
  56                 unsigned int crtc_w, unsigned int crtc_h,
  57                 uint32_t src_x, uint32_t src_y,
  58                 uint32_t src_w, uint32_t src_h);
  59
  60 static struct mdp4_kms *get_kms(struct drm_plane *plane)
  61 {
  62         struct msm_drm_private *priv = plane->dev->dev_private;
  63         return to_mdp4_kms(to_mdp_kms(priv->kms));
  64 }
  65
  66 static void mdp4_plane_destroy(struct drm_plane *plane)
  67 {
  68         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
  69
  70         drm_plane_helper_disable(plane);
  71         drm_plane_cleanup(plane);
  72
  73         kfree(mdp4_plane);
  74 }
  75
  76 /* helper to install properties which are common to planes and crtcs */
  77 void mdp4_plane_install_properties(struct drm_plane *plane,
  78                 struct drm_mode_object *obj)
  79 {
  80         // XXX
  81 }
  82
  83 int mdp4_plane_set_property(struct drm_plane *plane,
  84                 struct drm_property *property, uint64_t val)
  85 {
  86         // XXX
  87         return -EINVAL;
  88 }
  89
  90 static const struct drm_plane_funcs mdp4_plane_funcs = {
  91                 .update_plane = drm_atomic_helper_update_plane,
  92                 .disable_plane = drm_atomic_helper_disable_plane,
  93                 .destroy = mdp4_plane_destroy,
  94                 .set_property = mdp4_plane_set_property,
  95                 .reset = drm_atomic_helper_plane_reset,
  96                 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
  97                 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
  98 };
  99
 100 static int mdp4_plane_prepare_fb(struct drm_plane *plane,
 101                 struct drm_framebuffer *fb,
 102                 const struct drm_plane_state *new_state)
 103 {
 104         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 105         struct mdp4_kms *mdp4_kms = get_kms(plane);
 106
 107         DBG("%s: prepare: FB[%u]", mdp4_plane->name, fb->base.id);
 108         return msm_framebuffer_prepare(fb, mdp4_kms->id);
 109 }
 110
 111 static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
 112                 struct drm_framebuffer *fb,
 113                 const struct drm_plane_state *old_state)
 114 {
 115         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 116         struct mdp4_kms *mdp4_kms = get_kms(plane);
 117
 118         DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id);
 119         msm_framebuffer_cleanup(fb, mdp4_kms->id);
 120 }
 121
 122
 123 static int mdp4_plane_atomic_check(struct drm_plane *plane,
 124                 struct drm_plane_state *state)
 125 {
 126         return 0;
 127 }
 128
 129 static void mdp4_plane_atomic_update(struct drm_plane *plane,
 130                                      struct drm_plane_state *old_state)
 131 {
 132         struct drm_plane_state *state = plane->state;
 133         int ret;
 134
 135         ret = mdp4_plane_mode_set(plane,
 136                         state->crtc, state->fb,
 137                         state->crtc_x, state->crtc_y,
 138                         state->crtc_w, state->crtc_h,
 139                         state->src_x,  state->src_y,
 140                         state->src_w, state->src_h);
 141         /* atomic_check should have ensured that this doesn't fail */
 142         WARN_ON(ret < 0);
 143 }
 144
 145 static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = {
 146                 .prepare_fb = mdp4_plane_prepare_fb,
 147                 .cleanup_fb = mdp4_plane_cleanup_fb,
 148                 .atomic_check = mdp4_plane_atomic_check,
 149                 .atomic_update = mdp4_plane_atomic_update,
 150 };
 151
 152 static void mdp4_plane_set_scanout(struct drm_plane *plane,
 153                 struct drm_framebuffer *fb)
 154 {
 155         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 156         struct mdp4_kms *mdp4_kms = get_kms(plane);
 157         enum mdp4_pipe pipe = mdp4_plane->pipe;
 158
 159         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
 160                         MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
 161                         MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
 162
 163         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),
 164                         MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) |
 165                         MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
 166
 167         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe),
 168                         msm_framebuffer_iova(fb, mdp4_kms->id, 0));
 169         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe),
 170                         msm_framebuffer_iova(fb, mdp4_kms->id, 1));
 171         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe),
 172                         msm_framebuffer_iova(fb, mdp4_kms->id, 2));
 173         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe),
 174                         msm_framebuffer_iova(fb, mdp4_kms->id, 3));
 175
 176         plane->fb = fb;
 177 }
 178
 179 static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms,
 180                 enum mdp4_pipe pipe, struct csc_cfg *csc)
 181 {
 182         int i;
 183
 184         for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) {
 185                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i),
 186                                 csc->matrix[i]);
 187         }
 188
 189         for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) {
 190                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i),
 191                                 csc->pre_bias[i]);
 192
 193                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i),
 194                                 csc->post_bias[i]);
 195         }
 196
 197         for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) {
 198                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i),
 199                                 csc->pre_clamp[i]);
 200
 201                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i),
 202                                 csc->post_clamp[i]);
 203         }
 204 }
 205
 206 #define MDP4_VG_PHASE_STEP_DEFAULT      0x20000000
 207
 208 static int mdp4_plane_mode_set(struct drm_plane *plane,
 209                 struct drm_crtc *crtc, struct drm_framebuffer *fb,
 210                 int crtc_x, int crtc_y,
 211                 unsigned int crtc_w, unsigned int crtc_h,
 212                 uint32_t src_x, uint32_t src_y,
 213                 uint32_t src_w, uint32_t src_h)
 214 {
 215         struct drm_device *dev = plane->dev;
 216         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 217         struct mdp4_kms *mdp4_kms = get_kms(plane);
 218         enum mdp4_pipe pipe = mdp4_plane->pipe;
 219         const struct mdp_format *format;
 220         uint32_t op_mode = 0;
 221         uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
 222         uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
 223         enum mdp4_frame_format frame_type = mdp4_get_frame_format(fb);
 224
 225         if (!(crtc && fb)) {
 226                 DBG("%s: disabled!", mdp4_plane->name);
 227                 return 0;
 228         }
 229
 230         /* src values are in Q16 fixed point, convert to integer: */
 231         src_x = src_x >> 16;
 232         src_y = src_y >> 16;
 233         src_w = src_w >> 16;
 234         src_h = src_h >> 16;
 235
 236         DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name,
 237                         fb->base.id, src_x, src_y, src_w, src_h,
 238                         crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);
 239
 240         format = to_mdp_format(msm_framebuffer_format(fb));
 241
 242         if (src_w > (crtc_w * DOWN_SCALE_MAX)) {
 243                 dev_err(dev->dev, "Width down scaling exceeds limits!\n");
 244                 return -ERANGE;
 245         }
 246
 247         if (src_h > (crtc_h * DOWN_SCALE_MAX)) {
 248                 dev_err(dev->dev, "Height down scaling exceeds limits!\n");
 249                 return -ERANGE;
 250         }
 251
 252         if (crtc_w > (src_w * UP_SCALE_MAX)) {
 253                 dev_err(dev->dev, "Width up scaling exceeds limits!\n");
 254                 return -ERANGE;
 255         }
 256
 257         if (crtc_h > (src_h * UP_SCALE_MAX)) {
 258                 dev_err(dev->dev, "Height up scaling exceeds limits!\n");
 259                 return -ERANGE;
 260         }
 261
 262         if (src_w != crtc_w) {
 263                 uint32_t sel_unit = SCALE_FIR;
 264                 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN;
 265
 266                 if (MDP_FORMAT_IS_YUV(format)) {
 267                         if (crtc_w > src_w)
 268                                 sel_unit = SCALE_PIXEL_RPT;
 269                         else if (crtc_w <= (src_w / 4))
 270                                 sel_unit = SCALE_MN_PHASE;
 271
 272                         op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit);
 273                         phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
 274                                         src_w, crtc_w);
 275                 }
 276         }
 277
 278         if (src_h != crtc_h) {
 279                 uint32_t sel_unit = SCALE_FIR;
 280                 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN;
 281
 282                 if (MDP_FORMAT_IS_YUV(format)) {
 283
 284                         if (crtc_h > src_h)
 285                                 sel_unit = SCALE_PIXEL_RPT;
 286                         else if (crtc_h <= (src_h / 4))
 287                                 sel_unit = SCALE_MN_PHASE;
 288
 289                         op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit);
 290                         phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
 291                                         src_h, crtc_h);
 292                 }
 293         }
 294
 295         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),
 296                         MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
 297                         MDP4_PIPE_SRC_SIZE_HEIGHT(src_h));
 298
 299         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),
 300                         MDP4_PIPE_SRC_XY_X(src_x) |
 301                         MDP4_PIPE_SRC_XY_Y(src_y));
 302
 303         mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),
 304                         MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) |
 305                         MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h));
 306
 307         mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),
 308                         MDP4_PIPE_DST_XY_X(crtc_x) |
 309                         MDP4_PIPE_DST_XY_Y(crtc_y));
 310
 311         mdp4_plane_set_scanout(plane, fb);
 312
 313         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),
 314                         MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) |
 315                         MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) |
 316                         MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) |
 317                         MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) |
 318                         COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |
 319                         MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) |
 320                         MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
 321                         MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) |
 322                         MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) |
 323                         MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) |
 324                         COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
 325
 326         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
 327                         MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) |
 328                         MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) |
 329                         MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) |
 330                         MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3]));
 331
 332         if (MDP_FORMAT_IS_YUV(format)) {
 333                 struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB);
 334
 335                 op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR;
 336                 op_mode |= MDP4_PIPE_OP_MODE_CSC_EN;
 337                 mdp4_write_csc_config(mdp4_kms, pipe, csc);
 338         }
 339
 340         mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);
 341         mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
 342         mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
 343
 344         if (frame_type != FRAME_LINEAR)
 345                 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe),
 346                                 MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) |
 347                                 MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h));
 348
 349         return 0;
 350 }
 351
 352 static const char *pipe_names[] = {
 353                 "VG1", "VG2",
 354                 "RGB1", "RGB2", "RGB3",
 355                 "VG3", "VG4",
 356 };
 357
 358 enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)
 359 {
 360         struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
 361         return mdp4_plane->pipe;
 362 }
 363
 364 /* initialize plane */
 365 struct drm_plane *mdp4_plane_init(struct drm_device *dev,
 366                 enum mdp4_pipe pipe_id, bool private_plane)
 367 {
 368         struct drm_plane *plane = NULL;
 369         struct mdp4_plane *mdp4_plane;
 370         int ret;
 371         enum drm_plane_type type;
 372
 373         mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL);
 374         if (!mdp4_plane) {
 375                 ret = -ENOMEM;
 376                 goto fail;
 377         }
 378
 379         plane = &mdp4_plane->base;
 380
 381         mdp4_plane->pipe = pipe_id;
 382         mdp4_plane->name = pipe_names[pipe_id];
 383
 384         mdp4_plane->nformats = mdp4_get_formats(pipe_id, mdp4_plane->formats,
 385                         ARRAY_SIZE(mdp4_plane->formats));
 386
 387         type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
 388         ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,
 389                                  mdp4_plane->formats, mdp4_plane->nformats, type);
 390         if (ret)
 391                 goto fail;
 392
 393         drm_plane_helper_add(plane, &mdp4_plane_helper_funcs);
 394
 395         mdp4_plane_install_properties(plane, &plane->base);
 396
 397         return plane;
 398
 399 fail:
 400         if (plane)
 401                 mdp4_plane_destroy(plane);
 402
 403         return ERR_PTR(ret);
 404 }