drm/nve4/graph: do not crash if no power device present
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / nouveau / core / engine / graph / nv2a.c
1 #include <core/os.h>
2 #include <core/class.h>
3 #include <core/engctx.h>
4 #include <core/enum.h>
5
6 #include <subdev/timer.h>
7 #include <subdev/fb.h>
8
9 #include <engine/graph.h>
10
11 #include "nv20.h"
12 #include "regs.h"
13
14 /*******************************************************************************
15  * PGRAPH context
16  ******************************************************************************/
17
18 static int
19 nv2a_graph_context_ctor(struct nouveau_object *parent,
20                         struct nouveau_object *engine,
21                         struct nouveau_oclass *oclass, void *data, u32 size,
22                         struct nouveau_object **pobject)
23 {
24         struct nv20_graph_chan *chan;
25         int ret, i;
26
27         ret = nouveau_graph_context_create(parent, engine, oclass, NULL, 0x36b0,
28                                            16, NVOBJ_FLAG_ZERO_ALLOC, &chan);
29         *pobject = nv_object(chan);
30         if (ret)
31                 return ret;
32
33         chan->chid = nouveau_fifo_chan(parent)->chid;
34
35         nv_wo32(chan, 0x0000, 0x00000001 | (chan->chid << 24));
36         nv_wo32(chan, 0x033c, 0xffff0000);
37         nv_wo32(chan, 0x03a0, 0x0fff0000);
38         nv_wo32(chan, 0x03a4, 0x0fff0000);
39         nv_wo32(chan, 0x047c, 0x00000101);
40         nv_wo32(chan, 0x0490, 0x00000111);
41         nv_wo32(chan, 0x04a8, 0x44400000);
42         for (i = 0x04d4; i <= 0x04e0; i += 4)
43                 nv_wo32(chan, i, 0x00030303);
44         for (i = 0x04f4; i <= 0x0500; i += 4)
45                 nv_wo32(chan, i, 0x00080000);
46         for (i = 0x050c; i <= 0x0518; i += 4)
47                 nv_wo32(chan, i, 0x01012000);
48         for (i = 0x051c; i <= 0x0528; i += 4)
49                 nv_wo32(chan, i, 0x000105b8);
50         for (i = 0x052c; i <= 0x0538; i += 4)
51                 nv_wo32(chan, i, 0x00080008);
52         for (i = 0x055c; i <= 0x0598; i += 4)
53                 nv_wo32(chan, i, 0x07ff0000);
54         nv_wo32(chan, 0x05a4, 0x4b7fffff);
55         nv_wo32(chan, 0x05fc, 0x00000001);
56         nv_wo32(chan, 0x0604, 0x00004000);
57         nv_wo32(chan, 0x0610, 0x00000001);
58         nv_wo32(chan, 0x0618, 0x00040000);
59         nv_wo32(chan, 0x061c, 0x00010000);
60         for (i = 0x1a9c; i <= 0x22fc; i += 16) { /*XXX: check!! */
61                 nv_wo32(chan, (i + 0), 0x10700ff9);
62                 nv_wo32(chan, (i + 4), 0x0436086c);
63                 nv_wo32(chan, (i + 8), 0x000c001b);
64         }
65         nv_wo32(chan, 0x269c, 0x3f800000);
66         nv_wo32(chan, 0x26b0, 0x3f800000);
67         nv_wo32(chan, 0x26dc, 0x40000000);
68         nv_wo32(chan, 0x26e0, 0x3f800000);
69         nv_wo32(chan, 0x26e4, 0x3f000000);
70         nv_wo32(chan, 0x26ec, 0x40000000);
71         nv_wo32(chan, 0x26f0, 0x3f800000);
72         nv_wo32(chan, 0x26f8, 0xbf800000);
73         nv_wo32(chan, 0x2700, 0xbf800000);
74         nv_wo32(chan, 0x3024, 0x000fe000);
75         nv_wo32(chan, 0x30a0, 0x000003f8);
76         nv_wo32(chan, 0x33fc, 0x002fe000);
77         for (i = 0x341c; i <= 0x3438; i += 4)
78                 nv_wo32(chan, i, 0x001c527c);
79         return 0;
80 }
81
82 static struct nouveau_oclass
83 nv2a_graph_cclass = {
84         .handle = NV_ENGCTX(GR, 0x2a),
85         .ofuncs = &(struct nouveau_ofuncs) {
86                 .ctor = nv2a_graph_context_ctor,
87                 .dtor = _nouveau_graph_context_dtor,
88                 .init = nv20_graph_context_init,
89                 .fini = nv20_graph_context_fini,
90                 .rd32 = _nouveau_graph_context_rd32,
91                 .wr32 = _nouveau_graph_context_wr32,
92         },
93 };
94
95 /*******************************************************************************
96  * PGRAPH engine/subdev functions
97  ******************************************************************************/
98
99 static int
100 nv2a_graph_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
101                struct nouveau_oclass *oclass, void *data, u32 size,
102                struct nouveau_object **pobject)
103 {
104         struct nv20_graph_priv *priv;
105         int ret;
106
107         ret = nouveau_graph_create(parent, engine, oclass, true, &priv);
108         *pobject = nv_object(priv);
109         if (ret)
110                 return ret;
111
112         ret = nouveau_gpuobj_new(nv_object(priv), NULL, 32 * 4, 16,
113                                  NVOBJ_FLAG_ZERO_ALLOC, &priv->ctxtab);
114         if (ret)
115                 return ret;
116
117         nv_subdev(priv)->unit = 0x00001000;
118         nv_subdev(priv)->intr = nv20_graph_intr;
119         nv_engine(priv)->cclass = &nv2a_graph_cclass;
120         nv_engine(priv)->sclass = nv25_graph_sclass;
121         nv_engine(priv)->tile_prog = nv20_graph_tile_prog;
122         return 0;
123 }
124
125 struct nouveau_oclass
126 nv2a_graph_oclass = {
127         .handle = NV_ENGINE(GR, 0x2a),
128         .ofuncs = &(struct nouveau_ofuncs) {
129                 .ctor = nv2a_graph_ctor,
130                 .dtor = nv20_graph_dtor,
131                 .init = nv20_graph_init,
132                 .fini = _nouveau_graph_fini,
133         },
134 };