2 * Copyright (C) 2010 Francisco Jerez.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include <subdev/fb.h>
30 struct nouveau_fb base;
34 nv20_fb_tile_init(struct nouveau_fb *pfb, int i, u32 addr, u32 size, u32 pitch,
35 u32 flags, struct nouveau_fb_tile *tile)
37 struct nouveau_device *device = nv_device(pfb);
38 int bpp = (flags & 2) ? 32 : 16;
40 tile->addr = 0x00000001 | addr;
41 tile->limit = max(1u, addr + size) - 1;
44 /* Allocate some of the on-die tag memory, used to store Z
45 * compression meta-data (most likely just a bitmap determining
46 * if a given tile is compressed or not).
50 if (!nouveau_mm_head(&pfb->tags, 1, size, size, 1, &tile->tag)) {
51 /* Enable Z compression */
52 tile->zcomp = tile->tag->offset;
53 if (device->chipset >= 0x25) {
55 tile->zcomp |= 0x00100000;
57 tile->zcomp |= 0x00200000;
59 tile->zcomp |= 0x80000000;
61 tile->zcomp |= 0x04000000;
70 nv20_fb_tile_fini(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
76 nouveau_mm_free(&pfb->tags, &tile->tag);
80 nv20_fb_tile_prog(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
82 nv_wr32(pfb, 0x100244 + (i * 0x10), tile->limit);
83 nv_wr32(pfb, 0x100248 + (i * 0x10), tile->pitch);
84 nv_wr32(pfb, 0x100240 + (i * 0x10), tile->addr);
85 nv_wr32(pfb, 0x100300 + (i * 0x04), tile->zcomp);
89 nv20_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
90 struct nouveau_oclass *oclass, void *data, u32 size,
91 struct nouveau_object **pobject)
93 struct nouveau_device *device = nv_device(parent);
94 struct nv20_fb_priv *priv;
98 ret = nouveau_fb_create(parent, engine, oclass, &priv);
99 *pobject = nv_object(priv);
103 pbus1218 = nv_rd32(priv, 0x001218);
104 switch (pbus1218 & 0x00000300) {
105 case 0x00000000: priv->base.ram.type = NV_MEM_TYPE_SDRAM; break;
106 case 0x00000100: priv->base.ram.type = NV_MEM_TYPE_DDR1; break;
107 case 0x00000200: priv->base.ram.type = NV_MEM_TYPE_GDDR3; break;
108 case 0x00000300: priv->base.ram.type = NV_MEM_TYPE_GDDR2; break;
110 priv->base.ram.size = nv_rd32(priv, 0x10020c) & 0xff000000;
112 if (device->chipset >= 0x25)
113 ret = nouveau_mm_init(&priv->base.tags, 0, 64 * 1024, 1);
115 ret = nouveau_mm_init(&priv->base.tags, 0, 32 * 1024, 1);
119 priv->base.memtype_valid = nv04_fb_memtype_valid;
120 priv->base.tile.regions = 8;
121 priv->base.tile.init = nv20_fb_tile_init;
122 priv->base.tile.fini = nv20_fb_tile_fini;
123 priv->base.tile.prog = nv20_fb_tile_prog;
124 return nouveau_fb_created(&priv->base);
127 struct nouveau_oclass
129 .handle = NV_SUBDEV(FB, 0x20),
130 .ofuncs = &(struct nouveau_ofuncs) {
131 .ctor = nv20_fb_ctor,
132 .dtor = _nouveau_fb_dtor,
133 .init = _nouveau_fb_init,
134 .fini = _nouveau_fb_fini,