drivers/gpu/drm/nouveau/include/nvkm/core/device.h

   1 #ifndef __NOUVEAU_DEVICE_H__
   2 #define __NOUVEAU_DEVICE_H__
   3
   4 #include <core/object.h>
   5 #include <core/subdev.h>
   6 #include <core/engine.h>
   7 #include <core/event.h>
   8
   9 enum nv_subdev_type {
  10         NVDEV_ENGINE_DEVICE,
  11         NVDEV_SUBDEV_VBIOS,
  12
  13         /* All subdevs from DEVINIT to DEVINIT_LAST will be created before
  14          * *any* of them are initialised.  This subdev category is used
  15          * for any subdevs that the VBIOS init table parsing may call out
  16          * to during POST.
  17          */
  18         NVDEV_SUBDEV_DEVINIT,
  19         NVDEV_SUBDEV_IBUS,
  20         NVDEV_SUBDEV_GPIO,
  21         NVDEV_SUBDEV_I2C,
  22         NVDEV_SUBDEV_DEVINIT_LAST = NVDEV_SUBDEV_I2C,
  23
  24         /* This grouping of subdevs are initialised right after they've
  25          * been created, and are allowed to assume any subdevs in the
  26          * list above them exist and have been initialised.
  27          */
  28         NVDEV_SUBDEV_FUSE,
  29         NVDEV_SUBDEV_MXM,
  30         NVDEV_SUBDEV_MC,
  31         NVDEV_SUBDEV_BUS,
  32         NVDEV_SUBDEV_TIMER,
  33         NVDEV_SUBDEV_FB,
  34         NVDEV_SUBDEV_LTC,
  35         NVDEV_SUBDEV_INSTMEM,
  36         NVDEV_SUBDEV_MMU,
  37         NVDEV_SUBDEV_BAR,
  38         NVDEV_SUBDEV_PMU,
  39         NVDEV_SUBDEV_VOLT,
  40         NVDEV_SUBDEV_THERM,
  41         NVDEV_SUBDEV_CLK,
  42
  43         NVDEV_ENGINE_FIRST,
  44         NVDEV_ENGINE_DMAOBJ = NVDEV_ENGINE_FIRST,
  45         NVDEV_ENGINE_IFB,
  46         NVDEV_ENGINE_FIFO,
  47         NVDEV_ENGINE_SW,
  48         NVDEV_ENGINE_GR,
  49         NVDEV_ENGINE_MPEG,
  50         NVDEV_ENGINE_ME,
  51         NVDEV_ENGINE_VP,
  52         NVDEV_ENGINE_CIPHER,
  53         NVDEV_ENGINE_BSP,
  54         NVDEV_ENGINE_PPP,
  55         NVDEV_ENGINE_CE0,
  56         NVDEV_ENGINE_CE1,
  57         NVDEV_ENGINE_CE2,
  58         NVDEV_ENGINE_VIC,
  59         NVDEV_ENGINE_VENC,
  60         NVDEV_ENGINE_DISP,
  61         NVDEV_ENGINE_PERFMON,
  62         NVDEV_ENGINE_MSVLD,
  63         NVDEV_ENGINE_SEC,
  64
  65         NVDEV_SUBDEV_NR,
  66 };
  67
  68 struct nouveau_device {
  69         struct nouveau_engine engine;
  70         struct list_head head;
  71
  72         struct pci_dev *pdev;
  73         struct platform_device *platformdev;
  74         u64 handle;
  75
  76         struct nvkm_event event;
  77
  78         const char *cfgopt;
  79         const char *dbgopt;
  80         const char *name;
  81         const char *cname;
  82         u64 disable_mask;
  83
  84         enum {
  85                 NV_04    = 0x04,
  86                 NV_10    = 0x10,
  87                 NV_11    = 0x11,
  88                 NV_20    = 0x20,
  89                 NV_30    = 0x30,
  90                 NV_40    = 0x40,
  91                 NV_50    = 0x50,
  92                 NV_C0    = 0xc0,
  93                 NV_E0    = 0xe0,
  94                 GM100    = 0x110,
  95         } card_type;
  96         u32 chipset;
  97         u8  chiprev;
  98         u32 crystal;
  99
 100         struct nouveau_oclass *oclass[NVDEV_SUBDEV_NR];
 101         struct nouveau_object *subdev[NVDEV_SUBDEV_NR];
 102
 103         struct {
 104                 struct notifier_block nb;
 105         } acpi;
 106 };
 107
 108 int nouveau_device_list(u64 *name, int size);
 109
 110 struct nouveau_device *nv_device(void *obj);
 111
 112 static inline bool
 113 nv_device_match(struct nouveau_object *object, u16 dev, u16 ven, u16 sub)
 114 {
 115         struct nouveau_device *device = nv_device(object);
 116         return device->pdev->device == dev &&
 117                device->pdev->subsystem_vendor == ven &&
 118                device->pdev->subsystem_device == sub;
 119 }
 120
 121 static inline bool
 122 nv_device_is_pci(struct nouveau_device *device)
 123 {
 124         return device->pdev != NULL;
 125 }
 126
 127 static inline bool
 128 nv_device_is_cpu_coherent(struct nouveau_device *device)
 129 {
 130         return (!IS_ENABLED(CONFIG_ARM) && nv_device_is_pci(device));
 131 }
 132
 133 static inline struct device *
 134 nv_device_base(struct nouveau_device *device)
 135 {
 136         return nv_device_is_pci(device) ? &device->pdev->dev :
 137                                           &device->platformdev->dev;
 138 }
 139
 140 resource_size_t
 141 nv_device_resource_start(struct nouveau_device *device, unsigned int bar);
 142
 143 resource_size_t
 144 nv_device_resource_len(struct nouveau_device *device, unsigned int bar);
 145
 146 int
 147 nv_device_get_irq(struct nouveau_device *device, bool stall);
 148
 149 #endif