2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
27 gm100_identify(struct nvkm_device *device)
29 switch (device->chipset) {
31 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
32 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
33 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
34 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
35 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
38 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
40 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
41 device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass;
42 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
43 device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass;
44 device->oclass[NVDEV_ENGINE_DISP ] = gm107_disp_oclass;
45 device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
47 device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
49 device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
51 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
52 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
53 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
58 /* looks to be some non-trivial changes */
59 /* priv ring says no to 0x10eb14 writes */
60 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
62 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
63 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
64 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
65 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
67 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
69 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
70 device->oclass[NVDEV_ENGINE_FIFO ] = gm204_fifo_oclass;
71 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
72 device->oclass[NVDEV_ENGINE_GR ] = gm204_gr_oclass;
73 device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass;
74 device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass;
75 device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
76 device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
78 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
79 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
80 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
85 /* looks to be some non-trivial changes */
86 /* priv ring says no to 0x10eb14 writes */
87 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
89 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
90 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
91 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
92 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
94 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
96 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
97 device->oclass[NVDEV_ENGINE_FIFO ] = gm204_fifo_oclass;
98 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
99 device->oclass[NVDEV_ENGINE_GR ] = gm206_gr_oclass;
100 device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass;
101 device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass;
102 device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
103 device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
105 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
106 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
107 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
112 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
113 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
114 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
115 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
116 device->oclass[NVDEV_ENGINE_FIFO ] = gm20b_fifo_oclass;
117 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
118 device->oclass[NVDEV_ENGINE_GR ] = gm20b_gr_oclass;
119 device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;