2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
27 gm100_identify(struct nvkm_device *device)
29 switch (device->chipset) {
31 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
32 device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
33 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
34 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
35 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
36 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
37 device->oclass[NVDEV_SUBDEV_DEVINIT] = gm107_devinit_oclass;
38 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
39 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
40 device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
41 device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
42 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
43 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
44 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
45 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
48 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
50 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
51 device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass;
52 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
53 device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass;
54 device->oclass[NVDEV_ENGINE_DISP ] = gm107_disp_oclass;
55 device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
57 device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
59 device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
61 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
62 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
63 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
67 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
68 device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
69 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
71 /* looks to be some non-trivial changes */
72 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
73 /* priv ring says no to 0x10eb14 writes */
74 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
76 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
77 device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass;
78 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
79 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
80 device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
81 device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
82 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
83 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
84 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
85 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
87 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
89 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
90 device->oclass[NVDEV_ENGINE_FIFO ] = gm204_fifo_oclass;
91 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
92 device->oclass[NVDEV_ENGINE_GR ] = gm204_gr_oclass;
93 device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass;
94 device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass;
95 device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
96 device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
98 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
99 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
100 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
104 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
105 device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
106 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
108 /* looks to be some non-trivial changes */
109 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
110 /* priv ring says no to 0x10eb14 writes */
111 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
113 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
114 device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass;
115 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
116 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
117 device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
118 device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
119 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
120 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
121 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
122 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
124 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
126 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
127 device->oclass[NVDEV_ENGINE_FIFO ] = gm204_fifo_oclass;
128 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
129 device->oclass[NVDEV_ENGINE_GR ] = gm206_gr_oclass;
130 device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass;
131 device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass;
132 device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
133 device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
135 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
136 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
137 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
142 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
143 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
144 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
145 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
146 device->oclass[NVDEV_SUBDEV_FB ] = gk20a_fb_oclass;
147 device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
148 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
149 device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass;
150 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
151 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
152 device->oclass[NVDEV_ENGINE_FIFO ] = gm20b_fifo_oclass;
153 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
154 device->oclass[NVDEV_ENGINE_GR ] = gm20b_gr_oclass;
155 device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;