2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
27 nv50_identify(struct nvkm_device *device)
29 switch (device->chipset) {
31 device->oclass[NVDEV_ENGINE_FIFO ] = nv50_fifo_oclass;
32 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
33 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
34 device->oclass[NVDEV_ENGINE_MPEG ] = &nv50_mpeg_oclass;
35 device->oclass[NVDEV_ENGINE_PM ] = nv50_pm_oclass;
38 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
39 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
40 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
41 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
42 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
45 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
46 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
47 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
48 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
49 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
52 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
53 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
54 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
55 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
56 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
59 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
60 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
61 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
62 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
63 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
66 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
67 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
68 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
69 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
70 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
73 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
74 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
75 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
76 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
79 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
80 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
81 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
82 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
83 device->oclass[NVDEV_ENGINE_PM ] = gt200_pm_oclass;
86 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
87 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
88 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
89 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
92 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
93 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
94 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
95 device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
98 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
99 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
100 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
101 device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
102 device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
105 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
106 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
107 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
108 device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
111 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
112 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
113 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
114 device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
117 device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
118 device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
119 device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
120 device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;