drivers/gpu/drm/nouveau/nvkm/engine/pm/gf100.c

   1 /*
   2  * Copyright 2013 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "gf100.h"
  25
  26 const struct nvkm_specsrc
  27 gf100_pbfb_sources[] = {
  28         { 0x10f100, (const struct nvkm_specmux[]) {
  29                         { 0x1, 0, "unk0" },
  30                         { 0x3f, 4, "unk4" },
  31                         {}
  32                 }, "pbfb_broadcast_pm_unk100" },
  33         {}
  34 };
  35
  36 const struct nvkm_specsrc
  37 gf100_pmfb_sources[] = {
  38         { 0x140028, (const struct nvkm_specmux[]) {
  39                         { 0x3fff, 0, "unk0" },
  40                         { 0x7, 16, "unk16" },
  41                         { 0x3, 24, "unk24" },
  42                         { 0x2, 29, "unk29" },
  43                         {}
  44                 }, "pmfb0_pm_unk28" },
  45         {}
  46 };
  47
  48 static const struct nvkm_specsrc
  49 gf100_l1_sources[] = {
  50         { 0x5044a8, (const struct nvkm_specmux[]) {
  51                         { 0x3f, 0, "sel", true },
  52                         {}
  53                 }, "pgraph_gpc0_tpc0_l1_pm_mux" },
  54         {}
  55 };
  56
  57 static const struct nvkm_specsrc
  58 gf100_tex_sources[] = {
  59         { 0x5042c0, (const struct nvkm_specmux[]) {
  60                         { 0xf, 0, "sel0", true },
  61                         { 0x7, 8, "sel1", true },
  62                         {}
  63                 }, "pgraph_gpc0_tpc0_tex_pm_mux_c_d" },
  64         {}
  65 };
  66
  67 static const struct nvkm_specsrc
  68 gf100_unk400_sources[] = {
  69         { 0x50440c, (const struct nvkm_specmux[]) {
  70                         { 0x3f, 0, "sel", true },
  71                         {}
  72                 }, "pgraph_gpc0_tpc0_unk400_pm_mux" },
  73         {}
  74 };
  75
  76 static const struct nvkm_specdom
  77 gf100_pm_hub[] = {
  78         {}
  79 };
  80
  81 const struct nvkm_specdom
  82 gf100_pm_gpc[] = {
  83         { 0xe0, (const struct nvkm_specsig[]) {
  84                         { 0x00, "gpc00_l1_00", gf100_l1_sources },
  85                         { 0x01, "gpc00_l1_01", gf100_l1_sources },
  86                         { 0x02, "gpc00_l1_02", gf100_l1_sources },
  87                         { 0x03, "gpc00_l1_03", gf100_l1_sources },
  88                         { 0x05, "gpc00_l1_04", gf100_l1_sources },
  89                         { 0x06, "gpc00_l1_05", gf100_l1_sources },
  90                         { 0x0a, "gpc00_tex_00", gf100_tex_sources },
  91                         { 0x0b, "gpc00_tex_01", gf100_tex_sources },
  92                         { 0x0c, "gpc00_tex_02", gf100_tex_sources },
  93                         { 0x0d, "gpc00_tex_03", gf100_tex_sources },
  94                         { 0x0e, "gpc00_tex_04", gf100_tex_sources },
  95                         { 0x0f, "gpc00_tex_05", gf100_tex_sources },
  96                         { 0x10, "gpc00_tex_06", gf100_tex_sources },
  97                         { 0x11, "gpc00_tex_07", gf100_tex_sources },
  98                         { 0x12, "gpc00_tex_08", gf100_tex_sources },
  99                         { 0x26, "gpc00_unk400_00", gf100_unk400_sources },
 100                         {}
 101                 }, &gf100_perfctr_func },
 102         {}
 103 };
 104
 105 const struct nvkm_specdom
 106 gf100_pm_part[] = {
 107         { 0xe0, (const struct nvkm_specsig[]) {
 108                         { 0x0f, "part00_pbfb_00", gf100_pbfb_sources },
 109                         { 0x10, "part00_pbfb_01", gf100_pbfb_sources },
 110                         { 0x21, "part00_pmfb_00", gf100_pmfb_sources },
 111                         { 0x04, "part00_pmfb_01", gf100_pmfb_sources },
 112                         { 0x00, "part00_pmfb_02", gf100_pmfb_sources },
 113                         { 0x02, "part00_pmfb_03", gf100_pmfb_sources },
 114                         { 0x01, "part00_pmfb_04", gf100_pmfb_sources },
 115                         { 0x2e, "part00_pmfb_05", gf100_pmfb_sources },
 116                         { 0x2f, "part00_pmfb_06", gf100_pmfb_sources },
 117                         { 0x1b, "part00_pmfb_07", gf100_pmfb_sources },
 118                         { 0x1c, "part00_pmfb_08", gf100_pmfb_sources },
 119                         { 0x1d, "part00_pmfb_09", gf100_pmfb_sources },
 120                         { 0x1e, "part00_pmfb_0a", gf100_pmfb_sources },
 121                         { 0x1f, "part00_pmfb_0b", gf100_pmfb_sources },
 122                         {}
 123                 }, &gf100_perfctr_func },
 124         {}
 125 };
 126
 127 static void
 128 gf100_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
 129                    struct nvkm_perfctr *ctr)
 130 {
 131         struct gf100_pm_priv *priv = (void *)ppm;
 132         struct gf100_pm_cntr *cntr = (void *)ctr;
 133         u32 log = ctr->logic_op;
 134         u32 src = 0x00000000;
 135         int i;
 136
 137         for (i = 0; i < 4; i++)
 138                 src |= ctr->signal[i] << (i * 8);
 139
 140         nv_wr32(priv, dom->addr + 0x09c, 0x00040002 | (dom->mode << 3));
 141         nv_wr32(priv, dom->addr + 0x100, 0x00000000);
 142         nv_wr32(priv, dom->addr + 0x040 + (cntr->base.slot * 0x08), src);
 143         nv_wr32(priv, dom->addr + 0x044 + (cntr->base.slot * 0x08), log);
 144 }
 145
 146 static void
 147 gf100_perfctr_read(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
 148                    struct nvkm_perfctr *ctr)
 149 {
 150         struct gf100_pm_priv *priv = (void *)ppm;
 151         struct gf100_pm_cntr *cntr = (void *)ctr;
 152
 153         switch (cntr->base.slot) {
 154         case 0: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x08c); break;
 155         case 1: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x088); break;
 156         case 2: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x080); break;
 157         case 3: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x090); break;
 158         }
 159         dom->clk = nv_rd32(priv, dom->addr + 0x070);
 160 }
 161
 162 static void
 163 gf100_perfctr_next(struct nvkm_pm *ppm, struct nvkm_perfdom *dom)
 164 {
 165         struct gf100_pm_priv *priv = (void *)ppm;
 166         nv_wr32(priv, dom->addr + 0x06c, dom->signal_nr - 0x40 + 0x27);
 167         nv_wr32(priv, dom->addr + 0x0ec, 0x00000011);
 168 }
 169
 170 const struct nvkm_funcdom
 171 gf100_perfctr_func = {
 172         .init = gf100_perfctr_init,
 173         .read = gf100_perfctr_read,
 174         .next = gf100_perfctr_next,
 175 };
 176
 177 int
 178 gf100_pm_fini(struct nvkm_object *object, bool suspend)
 179 {
 180         struct gf100_pm_priv *priv = (void *)object;
 181         nv_mask(priv, 0x000200, 0x10000000, 0x00000000);
 182         nv_mask(priv, 0x000200, 0x10000000, 0x10000000);
 183         return nvkm_pm_fini(&priv->base, suspend);
 184 }
 185
 186 int
 187 gf100_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
 188               struct nvkm_oclass *oclass, void *data, u32 size,
 189               struct nvkm_object **pobject)
 190 {
 191         struct gf100_pm_oclass *mclass = (void *)oclass;
 192         struct gf100_pm_priv *priv;
 193         u32 mask;
 194         int ret;
 195
 196         ret = nvkm_pm_create(parent, engine, oclass, &priv);
 197         *pobject = nv_object(priv);
 198         if (ret)
 199                 return ret;
 200
 201         /* HUB */
 202         ret = nvkm_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200,
 203                                mclass->doms_hub);
 204         if (ret)
 205                 return ret;
 206
 207         /* GPC */
 208         mask  = (1 << nv_rd32(priv, 0x022430)) - 1;
 209         mask &= ~nv_rd32(priv, 0x022504);
 210         mask &= ~nv_rd32(priv, 0x022584);
 211
 212         ret = nvkm_perfdom_new(&priv->base, "gpc", mask, 0x180000,
 213                                0x1000, 0x200, mclass->doms_gpc);
 214         if (ret)
 215                 return ret;
 216
 217         /* PART */
 218         mask  = (1 << nv_rd32(priv, 0x022438)) - 1;
 219         mask &= ~nv_rd32(priv, 0x022548);
 220         mask &= ~nv_rd32(priv, 0x0225c8);
 221
 222         ret = nvkm_perfdom_new(&priv->base, "part", mask, 0x1a0000,
 223                                0x1000, 0x200, mclass->doms_part);
 224         if (ret)
 225                 return ret;
 226
 227         nv_engine(priv)->cclass = &nvkm_pm_cclass;
 228         nv_engine(priv)->sclass =  nvkm_pm_sclass;
 229         return 0;
 230 }
 231
 232 struct nvkm_oclass *
 233 gf100_pm_oclass = &(struct gf100_pm_oclass) {
 234         .base.handle = NV_ENGINE(PM, 0xc0),
 235         .base.ofuncs = &(struct nvkm_ofuncs) {
 236                 .ctor = gf100_pm_ctor,
 237                 .dtor = _nvkm_pm_dtor,
 238                 .init = _nvkm_pm_init,
 239                 .fini = gf100_pm_fini,
 240         },
 241         .doms_gpc  = gf100_pm_gpc,
 242         .doms_hub  = gf100_pm_hub,
 243         .doms_part = gf100_pm_part,
 244 }.base;