2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 #include <linux/backlight.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/module.h>
27 #include <linux/of_platform.h>
28 #include <linux/platform_device.h>
29 #include <linux/regulator/consumer.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_mipi_dsi.h>
34 #include <drm/drm_panel.h>
36 #include <video/display_timing.h>
37 #include <video/of_display_timing.h>
38 #include <video/videomode.h>
41 const struct drm_display_mode *modes;
42 unsigned int num_modes;
43 const struct display_timing *timings;
44 unsigned int num_timings;
54 * @prepare: the time (in milliseconds) that it takes for the panel to
55 * become ready and start receiving video data
56 * @enable: the time (in milliseconds) that it takes for the panel to
57 * display the first valid frame after starting to receive
59 * @disable: the time (in milliseconds) that it takes for the panel to
60 * turn the display off (no content is visible)
61 * @unprepare: the time (in milliseconds) that it takes for the panel
62 * to power itself down completely
68 unsigned int unprepare;
75 struct drm_panel base;
80 const struct panel_desc *desc;
82 struct backlight_device *backlight;
83 struct regulator *supply;
84 struct i2c_adapter *ddc;
86 struct gpio_desc *enable_gpio;
89 static inline struct panel_simple *to_panel_simple(struct drm_panel *panel)
91 return container_of(panel, struct panel_simple, base);
94 static int panel_simple_get_fixed_modes(struct panel_simple *panel)
96 struct drm_connector *connector = panel->base.connector;
97 struct drm_device *drm = panel->base.drm;
98 struct drm_display_mode *mode;
99 unsigned int i, num = 0;
104 for (i = 0; i < panel->desc->num_timings; i++) {
105 const struct display_timing *dt = &panel->desc->timings[i];
108 videomode_from_timing(dt, &vm);
109 mode = drm_mode_create(drm);
111 dev_err(drm->dev, "failed to add mode %ux%u\n",
112 dt->hactive.typ, dt->vactive.typ);
116 drm_display_mode_from_videomode(&vm, mode);
117 drm_mode_set_name(mode);
119 drm_mode_probed_add(connector, mode);
123 for (i = 0; i < panel->desc->num_modes; i++) {
124 const struct drm_display_mode *m = &panel->desc->modes[i];
126 mode = drm_mode_duplicate(drm, m);
128 dev_err(drm->dev, "failed to add mode %ux%u@%u\n",
129 m->hdisplay, m->vdisplay, m->vrefresh);
133 drm_mode_set_name(mode);
135 drm_mode_probed_add(connector, mode);
139 connector->display_info.bpc = panel->desc->bpc;
140 connector->display_info.width_mm = panel->desc->size.width;
141 connector->display_info.height_mm = panel->desc->size.height;
142 if (panel->desc->bus_format)
143 drm_display_info_set_bus_formats(&connector->display_info,
144 &panel->desc->bus_format, 1);
149 static int panel_simple_of_get_native_mode(struct panel_simple *panel)
151 struct drm_connector *connector = panel->base.connector;
152 struct drm_device *drm = panel->base.drm;
153 struct drm_display_mode *mode;
156 mode = drm_mode_create(drm);
160 ret = of_get_drm_display_mode(panel->dev->of_node, mode,
163 dev_dbg(panel->dev, "failed to find dts display timings\n");
164 drm_mode_destroy(drm, mode);
168 drm_mode_set_name(mode);
169 mode->type |= DRM_MODE_TYPE_PREFERRED;
170 drm_mode_probed_add(connector, mode);
175 static int panel_simple_disable(struct drm_panel *panel)
177 struct panel_simple *p = to_panel_simple(panel);
183 p->backlight->props.power = FB_BLANK_POWERDOWN;
184 backlight_update_status(p->backlight);
187 if (p->desc && p->desc->delay.disable)
188 msleep(p->desc->delay.disable);
195 static int panel_simple_unprepare(struct drm_panel *panel)
197 struct panel_simple *p = to_panel_simple(panel);
203 gpiod_direction_output(p->enable_gpio, 0);
205 regulator_disable(p->supply);
207 if (p->desc && p->desc->delay.unprepare)
208 msleep(p->desc->delay.unprepare);
215 static int panel_simple_prepare(struct drm_panel *panel)
217 struct panel_simple *p = to_panel_simple(panel);
223 err = regulator_enable(p->supply);
225 dev_err(panel->dev, "failed to enable supply: %d\n", err);
230 gpiod_direction_output(p->enable_gpio, 1);
232 if (p->desc && p->desc->delay.prepare)
233 msleep(p->desc->delay.prepare);
240 static int panel_simple_enable(struct drm_panel *panel)
242 struct panel_simple *p = to_panel_simple(panel);
247 if (p->desc && p->desc->delay.enable)
248 msleep(p->desc->delay.enable);
251 p->backlight->props.power = FB_BLANK_UNBLANK;
252 backlight_update_status(p->backlight);
260 static int panel_simple_get_modes(struct drm_panel *panel)
262 struct panel_simple *p = to_panel_simple(panel);
265 /* probe EDID if a DDC bus is available */
267 struct edid *edid = drm_get_edid(panel->connector, p->ddc);
268 drm_mode_connector_update_edid_property(panel->connector, edid);
270 num += drm_add_edid_modes(panel->connector, edid);
275 /* add hard-coded panel modes */
276 num += panel_simple_get_fixed_modes(p);
278 /* add device node plane modes */
279 num += panel_simple_of_get_native_mode(p);
284 static int panel_simple_get_timings(struct drm_panel *panel,
285 unsigned int num_timings,
286 struct display_timing *timings)
288 struct panel_simple *p = to_panel_simple(panel);
294 if (p->desc->num_timings < num_timings)
295 num_timings = p->desc->num_timings;
298 for (i = 0; i < num_timings; i++)
299 timings[i] = p->desc->timings[i];
301 return p->desc->num_timings;
304 static const struct drm_panel_funcs panel_simple_funcs = {
305 .disable = panel_simple_disable,
306 .unprepare = panel_simple_unprepare,
307 .prepare = panel_simple_prepare,
308 .enable = panel_simple_enable,
309 .get_modes = panel_simple_get_modes,
310 .get_timings = panel_simple_get_timings,
313 static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
315 struct device_node *backlight, *ddc;
316 struct panel_simple *panel;
319 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
323 panel->enabled = false;
324 panel->prepared = false;
328 panel->supply = devm_regulator_get(dev, "power");
329 if (IS_ERR(panel->supply))
330 return PTR_ERR(panel->supply);
332 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable", 0);
333 if (IS_ERR(panel->enable_gpio)) {
334 err = PTR_ERR(panel->enable_gpio);
335 dev_err(dev, "failed to request GPIO: %d\n", err);
339 backlight = of_parse_phandle(dev->of_node, "backlight", 0);
341 panel->backlight = of_find_backlight_by_node(backlight);
342 of_node_put(backlight);
344 if (!panel->backlight)
345 return -EPROBE_DEFER;
348 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
350 panel->ddc = of_find_i2c_adapter_by_node(ddc);
359 drm_panel_init(&panel->base);
360 panel->base.dev = dev;
361 panel->base.funcs = &panel_simple_funcs;
363 err = drm_panel_add(&panel->base);
367 dev_set_drvdata(dev, panel);
373 put_device(&panel->ddc->dev);
375 if (panel->backlight)
376 put_device(&panel->backlight->dev);
381 static int panel_simple_remove(struct device *dev)
383 struct panel_simple *panel = dev_get_drvdata(dev);
385 drm_panel_detach(&panel->base);
386 drm_panel_remove(&panel->base);
388 panel_simple_disable(&panel->base);
391 put_device(&panel->ddc->dev);
393 if (panel->backlight)
394 put_device(&panel->backlight->dev);
399 static void panel_simple_shutdown(struct device *dev)
401 struct panel_simple *panel = dev_get_drvdata(dev);
403 panel_simple_disable(&panel->base);
406 static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = {
409 .hsync_start = 800 + 0,
410 .hsync_end = 800 + 0 + 255,
411 .htotal = 800 + 0 + 255 + 0,
413 .vsync_start = 480 + 2,
414 .vsync_end = 480 + 2 + 45,
415 .vtotal = 480 + 2 + 45 + 0,
417 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
420 static const struct panel_desc ampire_am800480r3tmqwa1h = {
421 .modes = &ire_am800480r3tmqwa1h_mode,
428 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
431 static const struct drm_display_mode auo_b101aw03_mode = {
434 .hsync_start = 1024 + 156,
435 .hsync_end = 1024 + 156 + 8,
436 .htotal = 1024 + 156 + 8 + 156,
438 .vsync_start = 600 + 16,
439 .vsync_end = 600 + 16 + 6,
440 .vtotal = 600 + 16 + 6 + 16,
444 static const struct panel_desc auo_b101aw03 = {
445 .modes = &auo_b101aw03_mode,
454 static const struct drm_display_mode auo_b101ean01_mode = {
457 .hsync_start = 1280 + 119,
458 .hsync_end = 1280 + 119 + 32,
459 .htotal = 1280 + 119 + 32 + 21,
461 .vsync_start = 800 + 4,
462 .vsync_end = 800 + 4 + 20,
463 .vtotal = 800 + 4 + 20 + 8,
467 static const struct panel_desc auo_b101ean01 = {
468 .modes = &auo_b101ean01_mode,
477 static const struct drm_display_mode auo_b101ew05_mode = {
480 .hsync_start = 1280 + 18,
481 .hsync_end = 1280 + 18 + 10,
482 .htotal = 1280 + 18 + 10 + 100,
484 .vsync_start = 800 + 6,
485 .vsync_end = 800 + 6 + 2,
486 .vtotal = 800 + 6 + 2 + 8,
490 static const struct panel_desc auo_b101ew05 = {
491 .modes = &auo_b101ew05_mode,
500 static const struct drm_display_mode auo_b101xtn01_mode = {
503 .hsync_start = 1366 + 20,
504 .hsync_end = 1366 + 20 + 70,
505 .htotal = 1366 + 20 + 70,
507 .vsync_start = 768 + 14,
508 .vsync_end = 768 + 14 + 42,
509 .vtotal = 768 + 14 + 42,
511 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
514 static const struct panel_desc auo_b101xtn01 = {
515 .modes = &auo_b101xtn01_mode,
524 static const struct drm_display_mode auo_b116xw03_mode = {
527 .hsync_start = 1366 + 40,
528 .hsync_end = 1366 + 40 + 40,
529 .htotal = 1366 + 40 + 40 + 32,
531 .vsync_start = 768 + 10,
532 .vsync_end = 768 + 10 + 12,
533 .vtotal = 768 + 10 + 12 + 6,
537 static const struct panel_desc auo_b116xw03 = {
538 .modes = &auo_b116xw03_mode,
547 static const struct drm_display_mode auo_b133xtn01_mode = {
550 .hsync_start = 1366 + 48,
551 .hsync_end = 1366 + 48 + 32,
552 .htotal = 1366 + 48 + 32 + 20,
554 .vsync_start = 768 + 3,
555 .vsync_end = 768 + 3 + 6,
556 .vtotal = 768 + 3 + 6 + 13,
560 static const struct panel_desc auo_b133xtn01 = {
561 .modes = &auo_b133xtn01_mode,
570 static const struct drm_display_mode auo_b133htn01_mode = {
573 .hsync_start = 1920 + 172,
574 .hsync_end = 1920 + 172 + 80,
575 .htotal = 1920 + 172 + 80 + 60,
577 .vsync_start = 1080 + 25,
578 .vsync_end = 1080 + 25 + 10,
579 .vtotal = 1080 + 25 + 10 + 10,
583 static const struct panel_desc auo_b133htn01 = {
584 .modes = &auo_b133htn01_mode,
598 static const struct drm_display_mode avic_tm070ddh03_mode = {
601 .hsync_start = 1024 + 160,
602 .hsync_end = 1024 + 160 + 4,
603 .htotal = 1024 + 160 + 4 + 156,
605 .vsync_start = 600 + 17,
606 .vsync_end = 600 + 17 + 1,
607 .vtotal = 600 + 17 + 1 + 17,
611 static const struct panel_desc avic_tm070ddh03 = {
612 .modes = &avic_tm070ddh03_mode,
626 static const struct drm_display_mode chunghwa_claa070wp03xg_mode = {
629 .hsync_start = 800 + 24,
630 .hsync_end = 800 + 24 + 16,
631 .htotal = 800 + 24 + 16 + 24,
633 .vsync_start = 1280 + 2,
634 .vsync_end = 1280 + 2 + 2,
635 .vtotal = 1280 + 2 + 2 + 4,
639 static const struct panel_desc chunghwa_claa070wp03xg = {
640 .modes = &chunghwa_claa070wp03xg_mode,
649 static const struct drm_display_mode chunghwa_claa101wa01a_mode = {
652 .hsync_start = 1366 + 58,
653 .hsync_end = 1366 + 58 + 58,
654 .htotal = 1366 + 58 + 58 + 58,
656 .vsync_start = 768 + 4,
657 .vsync_end = 768 + 4 + 4,
658 .vtotal = 768 + 4 + 4 + 4,
662 static const struct panel_desc chunghwa_claa101wa01a = {
663 .modes = &chunghwa_claa101wa01a_mode,
672 static const struct drm_display_mode chunghwa_claa101wb01_mode = {
675 .hsync_start = 1366 + 48,
676 .hsync_end = 1366 + 48 + 32,
677 .htotal = 1366 + 48 + 32 + 20,
679 .vsync_start = 768 + 16,
680 .vsync_end = 768 + 16 + 8,
681 .vtotal = 768 + 16 + 8 + 16,
685 static const struct panel_desc chunghwa_claa101wb01 = {
686 .modes = &chunghwa_claa101wb01_mode,
695 static const struct drm_display_mode edt_et057090dhu_mode = {
698 .hsync_start = 640 + 16,
699 .hsync_end = 640 + 16 + 30,
700 .htotal = 640 + 16 + 30 + 114,
702 .vsync_start = 480 + 10,
703 .vsync_end = 480 + 10 + 3,
704 .vtotal = 480 + 10 + 3 + 32,
706 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
709 static const struct panel_desc edt_et057090dhu = {
710 .modes = &edt_et057090dhu_mode,
719 static const struct drm_display_mode edt_etm0700g0dh6_mode = {
722 .hsync_start = 800 + 40,
723 .hsync_end = 800 + 40 + 128,
724 .htotal = 800 + 40 + 128 + 88,
726 .vsync_start = 480 + 10,
727 .vsync_end = 480 + 10 + 2,
728 .vtotal = 480 + 10 + 2 + 33,
730 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
733 static const struct panel_desc edt_etm0700g0dh6 = {
734 .modes = &edt_etm0700g0dh6_mode,
743 static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
746 .hsync_start = 800 + 168,
747 .hsync_end = 800 + 168 + 64,
748 .htotal = 800 + 168 + 64 + 88,
750 .vsync_start = 480 + 37,
751 .vsync_end = 480 + 37 + 2,
752 .vtotal = 480 + 37 + 2 + 8,
756 static const struct panel_desc foxlink_fl500wvr00_a0t = {
757 .modes = &foxlink_fl500wvr00_a0t_mode,
764 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
767 static const struct drm_display_mode giantplus_gpg482739qs5_mode = {
770 .hsync_start = 480 + 5,
771 .hsync_end = 480 + 5 + 1,
772 .htotal = 480 + 5 + 1 + 40,
774 .vsync_start = 272 + 8,
775 .vsync_end = 272 + 8 + 1,
776 .vtotal = 272 + 8 + 1 + 8,
780 static const struct panel_desc giantplus_gpg482739qs5 = {
781 .modes = &giantplus_gpg482739qs5_mode,
788 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
791 static const struct display_timing hannstar_hsd070pww1_timing = {
792 .pixelclock = { 64300000, 71100000, 82000000 },
793 .hactive = { 1280, 1280, 1280 },
794 .hfront_porch = { 1, 1, 10 },
795 .hback_porch = { 1, 1, 10 },
797 * According to the data sheet, the minimum horizontal blanking interval
798 * is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
799 * minimum working horizontal blanking interval to be 60 clocks.
801 .hsync_len = { 58, 158, 661 },
802 .vactive = { 800, 800, 800 },
803 .vfront_porch = { 1, 1, 10 },
804 .vback_porch = { 1, 1, 10 },
805 .vsync_len = { 1, 21, 203 },
806 .flags = DISPLAY_FLAGS_DE_HIGH,
809 static const struct panel_desc hannstar_hsd070pww1 = {
810 .timings = &hannstar_hsd070pww1_timing,
817 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
820 static const struct display_timing hannstar_hsd100pxn1_timing = {
821 .pixelclock = { 55000000, 65000000, 75000000 },
822 .hactive = { 1024, 1024, 1024 },
823 .hfront_porch = { 40, 40, 40 },
824 .hback_porch = { 220, 220, 220 },
825 .hsync_len = { 20, 60, 100 },
826 .vactive = { 768, 768, 768 },
827 .vfront_porch = { 7, 7, 7 },
828 .vback_porch = { 21, 21, 21 },
829 .vsync_len = { 10, 10, 10 },
830 .flags = DISPLAY_FLAGS_DE_HIGH,
833 static const struct panel_desc hannstar_hsd100pxn1 = {
834 .timings = &hannstar_hsd100pxn1_timing,
841 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
844 static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
847 .hsync_start = 800 + 85,
848 .hsync_end = 800 + 85 + 86,
849 .htotal = 800 + 85 + 86 + 85,
851 .vsync_start = 480 + 16,
852 .vsync_end = 480 + 16 + 13,
853 .vtotal = 480 + 16 + 13 + 16,
857 static const struct panel_desc hitachi_tx23d38vm0caa = {
858 .modes = &hitachi_tx23d38vm0caa_mode,
867 static const struct drm_display_mode innolux_at043tn24_mode = {
870 .hsync_start = 480 + 2,
871 .hsync_end = 480 + 2 + 41,
872 .htotal = 480 + 2 + 41 + 2,
874 .vsync_start = 272 + 2,
875 .vsync_end = 272 + 2 + 11,
876 .vtotal = 272 + 2 + 11 + 2,
878 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
881 static const struct panel_desc innolux_at043tn24 = {
882 .modes = &innolux_at043tn24_mode,
889 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
892 static const struct drm_display_mode innolux_g121i1_l01_mode = {
895 .hsync_start = 1280 + 64,
896 .hsync_end = 1280 + 64 + 32,
897 .htotal = 1280 + 64 + 32 + 64,
899 .vsync_start = 800 + 9,
900 .vsync_end = 800 + 9 + 6,
901 .vtotal = 800 + 9 + 6 + 9,
905 static const struct panel_desc innolux_g121i1_l01 = {
906 .modes = &innolux_g121i1_l01_mode,
915 static const struct drm_display_mode innolux_n116bge_mode = {
918 .hsync_start = 1366 + 136,
919 .hsync_end = 1366 + 136 + 30,
920 .htotal = 1366 + 136 + 30 + 60,
922 .vsync_start = 768 + 8,
923 .vsync_end = 768 + 8 + 12,
924 .vtotal = 768 + 8 + 12 + 12,
926 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
929 static const struct panel_desc innolux_n116bge = {
930 .modes = &innolux_n116bge_mode,
939 static const struct drm_display_mode innolux_n156bge_l21_mode = {
942 .hsync_start = 1366 + 16,
943 .hsync_end = 1366 + 16 + 34,
944 .htotal = 1366 + 16 + 34 + 50,
946 .vsync_start = 768 + 2,
947 .vsync_end = 768 + 2 + 6,
948 .vtotal = 768 + 2 + 6 + 12,
952 static const struct panel_desc innolux_n156bge_l21 = {
953 .modes = &innolux_n156bge_l21_mode,
962 static const struct drm_display_mode innolux_zj070na_01p_mode = {
965 .hsync_start = 1024 + 128,
966 .hsync_end = 1024 + 128 + 64,
967 .htotal = 1024 + 128 + 64 + 128,
969 .vsync_start = 600 + 16,
970 .vsync_end = 600 + 16 + 4,
971 .vtotal = 600 + 16 + 4 + 16,
975 static const struct panel_desc innolux_zj070na_01p = {
976 .modes = &innolux_zj070na_01p_mode,
985 static const struct drm_display_mode lg_lb070wv8_mode = {
988 .hsync_start = 800 + 88,
989 .hsync_end = 800 + 88 + 80,
990 .htotal = 800 + 88 + 80 + 88,
992 .vsync_start = 480 + 10,
993 .vsync_end = 480 + 10 + 25,
994 .vtotal = 480 + 10 + 25 + 10,
998 static const struct panel_desc lg_lb070wv8 = {
999 .modes = &lg_lb070wv8_mode,
1006 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
1009 static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
1012 .hsync_start = 1536 + 12,
1013 .hsync_end = 1536 + 12 + 16,
1014 .htotal = 1536 + 12 + 16 + 48,
1016 .vsync_start = 2048 + 8,
1017 .vsync_end = 2048 + 8 + 4,
1018 .vtotal = 2048 + 8 + 4 + 8,
1020 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1023 static const struct panel_desc lg_lp079qx1_sp0v = {
1024 .modes = &lg_lp079qx1_sp0v_mode,
1032 static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
1035 .hsync_start = 2048 + 150,
1036 .hsync_end = 2048 + 150 + 5,
1037 .htotal = 2048 + 150 + 5 + 5,
1039 .vsync_start = 1536 + 3,
1040 .vsync_end = 1536 + 3 + 1,
1041 .vtotal = 1536 + 3 + 1 + 9,
1045 static const struct panel_desc lg_lp097qx1_spa1 = {
1046 .modes = &lg_lp097qx1_spa1_mode,
1054 static const struct drm_display_mode lg_lp129qe_mode = {
1057 .hsync_start = 2560 + 48,
1058 .hsync_end = 2560 + 48 + 32,
1059 .htotal = 2560 + 48 + 32 + 80,
1061 .vsync_start = 1700 + 3,
1062 .vsync_end = 1700 + 3 + 10,
1063 .vtotal = 1700 + 3 + 10 + 36,
1067 static const struct panel_desc lg_lp129qe = {
1068 .modes = &lg_lp129qe_mode,
1077 static const struct drm_display_mode nec_nl4827hc19_05b_mode = {
1080 .hsync_start = 480 + 2,
1081 .hsync_end = 480 + 2 + 41,
1082 .htotal = 480 + 2 + 41 + 2,
1084 .vsync_start = 272 + 2,
1085 .vsync_end = 272 + 2 + 4,
1086 .vtotal = 272 + 2 + 4 + 2,
1090 static const struct panel_desc nec_nl4827hc19_05b = {
1091 .modes = &nec_nl4827hc19_05b_mode,
1098 .bus_format = MEDIA_BUS_FMT_RGB888_1X24
1101 static const struct display_timing okaya_rs800480t_7x0gp_timing = {
1102 .pixelclock = { 30000000, 30000000, 40000000 },
1103 .hactive = { 800, 800, 800 },
1104 .hfront_porch = { 40, 40, 40 },
1105 .hback_porch = { 40, 40, 40 },
1106 .hsync_len = { 1, 48, 48 },
1107 .vactive = { 480, 480, 480 },
1108 .vfront_porch = { 13, 13, 13 },
1109 .vback_porch = { 29, 29, 29 },
1110 .vsync_len = { 3, 3, 3 },
1111 .flags = DISPLAY_FLAGS_DE_HIGH,
1114 static const struct panel_desc okaya_rs800480t_7x0gp = {
1115 .timings = &okaya_rs800480t_7x0gp_timing,
1128 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1131 static const struct drm_display_mode ortustech_com43h4m85ulc_mode = {
1134 .hsync_start = 480 + 10,
1135 .hsync_end = 480 + 10 + 10,
1136 .htotal = 480 + 10 + 10 + 15,
1138 .vsync_start = 800 + 3,
1139 .vsync_end = 800 + 3 + 3,
1140 .vtotal = 800 + 3 + 3 + 3,
1144 static const struct panel_desc ortustech_com43h4m85ulc = {
1145 .modes = &ortustech_com43h4m85ulc_mode,
1152 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
1155 static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
1158 .hsync_start = 2560 + 48,
1159 .hsync_end = 2560 + 48 + 32,
1160 .htotal = 2560 + 48 + 32 + 80,
1162 .vsync_start = 1600 + 2,
1163 .vsync_end = 1600 + 2 + 5,
1164 .vtotal = 1600 + 2 + 5 + 57,
1168 static const struct panel_desc samsung_lsn122dl01_c01 = {
1169 .modes = &samsung_lsn122dl01_c01_mode,
1177 static const struct drm_display_mode samsung_ltn101nt05_mode = {
1180 .hsync_start = 1024 + 24,
1181 .hsync_end = 1024 + 24 + 136,
1182 .htotal = 1024 + 24 + 136 + 160,
1184 .vsync_start = 600 + 3,
1185 .vsync_end = 600 + 3 + 6,
1186 .vtotal = 600 + 3 + 6 + 61,
1190 static const struct panel_desc samsung_ltn101nt05 = {
1191 .modes = &samsung_ltn101nt05_mode,
1200 static const struct drm_display_mode samsung_ltn140at29_301_mode = {
1203 .hsync_start = 1366 + 64,
1204 .hsync_end = 1366 + 64 + 48,
1205 .htotal = 1366 + 64 + 48 + 128,
1207 .vsync_start = 768 + 2,
1208 .vsync_end = 768 + 2 + 5,
1209 .vtotal = 768 + 2 + 5 + 17,
1213 static const struct panel_desc samsung_ltn140at29_301 = {
1214 .modes = &samsung_ltn140at29_301_mode,
1223 static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode = {
1226 .hsync_start = 800 + 1,
1227 .hsync_end = 800 + 1 + 64,
1228 .htotal = 800 + 1 + 64 + 64,
1230 .vsync_start = 480 + 1,
1231 .vsync_end = 480 + 1 + 23,
1232 .vtotal = 480 + 1 + 23 + 22,
1236 static const struct panel_desc shelly_sca07010_bfn_lnn = {
1237 .modes = &shelly_sca07010_bfn_lnn_mode,
1243 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1246 static const struct of_device_id platform_of_match[] = {
1248 .compatible = "simple-panel",
1251 .compatible = "ampire,am800480r3tmqwa1h",
1252 .data = &ire_am800480r3tmqwa1h,
1254 .compatible = "auo,b101aw03",
1255 .data = &auo_b101aw03,
1257 .compatible = "auo,b101ean01",
1258 .data = &auo_b101ean01,
1260 .compatible = "auo,b101ew05",
1261 .data = &auo_b101ew05,
1263 .compatible = "auo,b101xtn01",
1264 .data = &auo_b101xtn01,
1266 .compatible = "auo,b116xw03",
1267 .data = &auo_b116xw03,
1269 .compatible = "auo,b133htn01",
1270 .data = &auo_b133htn01,
1272 .compatible = "auo,b133xtn01",
1273 .data = &auo_b133xtn01,
1275 .compatible = "avic,tm070ddh03",
1276 .data = &avic_tm070ddh03,
1278 .compatible = "chunghwa,claa070wp03xg",
1279 .data = &chunghwa_claa070wp03xg,
1281 .compatible = "chunghwa,claa101wa01a",
1282 .data = &chunghwa_claa101wa01a
1284 .compatible = "chunghwa,claa101wb01",
1285 .data = &chunghwa_claa101wb01
1287 .compatible = "edt,et057090dhu",
1288 .data = &edt_et057090dhu,
1290 .compatible = "edt,et070080dh6",
1291 .data = &edt_etm0700g0dh6,
1293 .compatible = "edt,etm0700g0dh6",
1294 .data = &edt_etm0700g0dh6,
1296 .compatible = "foxlink,fl500wvr00-a0t",
1297 .data = &foxlink_fl500wvr00_a0t,
1299 .compatible = "giantplus,gpg482739qs5",
1300 .data = &giantplus_gpg482739qs5
1302 .compatible = "hannstar,hsd070pww1",
1303 .data = &hannstar_hsd070pww1,
1305 .compatible = "hannstar,hsd100pxn1",
1306 .data = &hannstar_hsd100pxn1,
1308 .compatible = "hit,tx23d38vm0caa",
1309 .data = &hitachi_tx23d38vm0caa
1311 .compatible = "innolux,at043tn24",
1312 .data = &innolux_at043tn24,
1314 .compatible ="innolux,g121i1-l01",
1315 .data = &innolux_g121i1_l01
1317 .compatible = "innolux,n116bge",
1318 .data = &innolux_n116bge,
1320 .compatible = "innolux,n156bge-l21",
1321 .data = &innolux_n156bge_l21,
1323 .compatible = "innolux,zj070na-01p",
1324 .data = &innolux_zj070na_01p,
1326 .compatible = "lg,lb070wv8",
1327 .data = &lg_lb070wv8,
1329 .compatible = "lg,lp079qx1-sp0v",
1330 .data = &lg_lp079qx1_sp0v,
1332 .compatible = "lg,lp097qx1-spa1",
1333 .data = &lg_lp097qx1_spa1,
1335 .compatible = "lg,lp129qe",
1336 .data = &lg_lp129qe,
1338 .compatible = "nec,nl4827hc19-05b",
1339 .data = &nec_nl4827hc19_05b,
1341 .compatible = "okaya,rs800480t-7x0gp",
1342 .data = &okaya_rs800480t_7x0gp,
1344 .compatible = "ortustech,com43h4m85ulc",
1345 .data = &ortustech_com43h4m85ulc,
1347 .compatible = "samsung,lsn122dl01-c01",
1348 .data = &samsung_lsn122dl01_c01,
1350 .compatible = "samsung,ltn101nt05",
1351 .data = &samsung_ltn101nt05,
1353 .compatible = "samsung,ltn140at29-301",
1354 .data = &samsung_ltn140at29_301,
1356 .compatible = "shelly,sca07010-bfn-lnn",
1357 .data = &shelly_sca07010_bfn_lnn,
1362 MODULE_DEVICE_TABLE(of, platform_of_match);
1364 static int panel_simple_platform_probe(struct platform_device *pdev)
1366 const struct of_device_id *id;
1368 id = of_match_node(platform_of_match, pdev->dev.of_node);
1372 return panel_simple_probe(&pdev->dev, id->data);
1375 static int panel_simple_platform_remove(struct platform_device *pdev)
1377 return panel_simple_remove(&pdev->dev);
1380 static void panel_simple_platform_shutdown(struct platform_device *pdev)
1382 panel_simple_shutdown(&pdev->dev);
1385 static struct platform_driver panel_simple_platform_driver = {
1387 .name = "panel-simple",
1388 .of_match_table = platform_of_match,
1390 .probe = panel_simple_platform_probe,
1391 .remove = panel_simple_platform_remove,
1392 .shutdown = panel_simple_platform_shutdown,
1395 struct panel_desc_dsi {
1396 struct panel_desc desc;
1398 unsigned long flags;
1399 enum mipi_dsi_pixel_format format;
1403 static const struct drm_display_mode auo_b080uan01_mode = {
1406 .hsync_start = 1200 + 62,
1407 .hsync_end = 1200 + 62 + 4,
1408 .htotal = 1200 + 62 + 4 + 62,
1410 .vsync_start = 1920 + 9,
1411 .vsync_end = 1920 + 9 + 2,
1412 .vtotal = 1920 + 9 + 2 + 8,
1416 static const struct panel_desc_dsi auo_b080uan01 = {
1418 .modes = &auo_b080uan01_mode,
1426 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
1427 .format = MIPI_DSI_FMT_RGB888,
1431 static const struct drm_display_mode boe_tv080wum_nl0_mode = {
1434 .hsync_start = 1200 + 120,
1435 .hsync_end = 1200 + 120 + 20,
1436 .htotal = 1200 + 120 + 20 + 21,
1438 .vsync_start = 1920 + 21,
1439 .vsync_end = 1920 + 21 + 3,
1440 .vtotal = 1920 + 21 + 3 + 18,
1442 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1445 static const struct panel_desc_dsi boe_tv080wum_nl0 = {
1447 .modes = &boe_tv080wum_nl0_mode,
1454 .flags = MIPI_DSI_MODE_VIDEO |
1455 MIPI_DSI_MODE_VIDEO_BURST |
1456 MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
1457 .format = MIPI_DSI_FMT_RGB888,
1461 static const struct drm_display_mode lg_ld070wx3_sl01_mode = {
1464 .hsync_start = 800 + 32,
1465 .hsync_end = 800 + 32 + 1,
1466 .htotal = 800 + 32 + 1 + 57,
1468 .vsync_start = 1280 + 28,
1469 .vsync_end = 1280 + 28 + 1,
1470 .vtotal = 1280 + 28 + 1 + 14,
1474 static const struct panel_desc_dsi lg_ld070wx3_sl01 = {
1476 .modes = &lg_ld070wx3_sl01_mode,
1484 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
1485 .format = MIPI_DSI_FMT_RGB888,
1489 static const struct drm_display_mode lg_lh500wx1_sd03_mode = {
1492 .hsync_start = 720 + 12,
1493 .hsync_end = 720 + 12 + 4,
1494 .htotal = 720 + 12 + 4 + 112,
1496 .vsync_start = 1280 + 8,
1497 .vsync_end = 1280 + 8 + 4,
1498 .vtotal = 1280 + 8 + 4 + 12,
1502 static const struct panel_desc_dsi lg_lh500wx1_sd03 = {
1504 .modes = &lg_lh500wx1_sd03_mode,
1512 .flags = MIPI_DSI_MODE_VIDEO,
1513 .format = MIPI_DSI_FMT_RGB888,
1517 static const struct drm_display_mode panasonic_vvx10f004b00_mode = {
1520 .hsync_start = 1920 + 154,
1521 .hsync_end = 1920 + 154 + 16,
1522 .htotal = 1920 + 154 + 16 + 32,
1524 .vsync_start = 1200 + 17,
1525 .vsync_end = 1200 + 17 + 2,
1526 .vtotal = 1200 + 17 + 2 + 16,
1530 static const struct panel_desc_dsi panasonic_vvx10f004b00 = {
1532 .modes = &panasonic_vvx10f004b00_mode,
1540 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1541 MIPI_DSI_CLOCK_NON_CONTINUOUS,
1542 .format = MIPI_DSI_FMT_RGB888,
1547 static const struct of_device_id dsi_of_match[] = {
1549 .compatible = "simple-panel-dsi",
1552 .compatible = "auo,b080uan01",
1553 .data = &auo_b080uan01
1555 .compatible = "boe,tv080wum-nl0",
1556 .data = &boe_tv080wum_nl0
1558 .compatible = "lg,ld070wx3-sl01",
1559 .data = &lg_ld070wx3_sl01
1561 .compatible = "lg,lh500wx1-sd03",
1562 .data = &lg_lh500wx1_sd03
1564 .compatible = "panasonic,vvx10f004b00",
1565 .data = &panasonic_vvx10f004b00
1570 MODULE_DEVICE_TABLE(of, dsi_of_match);
1572 static int panel_simple_dsi_probe(struct mipi_dsi_device *dsi)
1574 const struct panel_desc_dsi *desc;
1575 const struct of_device_id *id;
1576 const struct panel_desc *pdesc;
1580 id = of_match_node(dsi_of_match, dsi->dev.of_node);
1587 dsi->mode_flags = desc->flags;
1588 dsi->format = desc->format;
1589 dsi->lanes = desc->lanes;
1590 pdesc = &desc->desc;
1595 err = panel_simple_probe(&dsi->dev, pdesc);
1599 if (!of_property_read_u32(dsi->dev.of_node, "dsi,flags", &val))
1600 dsi->mode_flags = val;
1602 if (!of_property_read_u32(dsi->dev.of_node, "dsi,format", &val))
1605 if (!of_property_read_u32(dsi->dev.of_node, "dsi,lanes", &val))
1608 return mipi_dsi_attach(dsi);
1611 static int panel_simple_dsi_remove(struct mipi_dsi_device *dsi)
1615 err = mipi_dsi_detach(dsi);
1617 dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
1619 return panel_simple_remove(&dsi->dev);
1622 static void panel_simple_dsi_shutdown(struct mipi_dsi_device *dsi)
1624 panel_simple_shutdown(&dsi->dev);
1627 static struct mipi_dsi_driver panel_simple_dsi_driver = {
1629 .name = "panel-simple-dsi",
1630 .of_match_table = dsi_of_match,
1632 .probe = panel_simple_dsi_probe,
1633 .remove = panel_simple_dsi_remove,
1634 .shutdown = panel_simple_dsi_shutdown,
1637 static int __init panel_simple_init(void)
1641 err = platform_driver_register(&panel_simple_platform_driver);
1645 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) {
1646 err = mipi_dsi_driver_register(&panel_simple_dsi_driver);
1653 module_init(panel_simple_init);
1655 static void __exit panel_simple_exit(void)
1657 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
1658 mipi_dsi_driver_unregister(&panel_simple_dsi_driver);
1660 platform_driver_unregister(&panel_simple_platform_driver);
1662 module_exit(panel_simple_exit);
1664 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
1665 MODULE_DESCRIPTION("DRM Driver for Simple Panels");
1666 MODULE_LICENSE("GPL and additional rights");