2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Christian König.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Christian König
28 #include "radeon_reg.h"
29 #include "radeon_asic.h"
33 * check if enc_priv stores radeon_encoder_atom_dig
35 static bool radeon_dig_encoder(struct drm_encoder *encoder)
37 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
38 switch (radeon_encoder->encoder_id) {
39 case ENCODER_OBJECT_ID_INTERNAL_LVDS:
40 case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
41 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
42 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
43 case ENCODER_OBJECT_ID_INTERNAL_DVO1:
44 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
45 case ENCODER_OBJECT_ID_INTERNAL_DDI:
46 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
47 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
48 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
49 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
56 * check if the chipset is supported
58 static int r600_audio_chipset_supported(struct radeon_device *rdev)
60 return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE5(rdev))
61 || rdev->family == CHIP_RS600
62 || rdev->family == CHIP_RS690
63 || rdev->family == CHIP_RS740;
67 * current number of channels
69 int r600_audio_channels(struct radeon_device *rdev)
71 return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
75 * current bits per sample
77 int r600_audio_bits_per_sample(struct radeon_device *rdev)
79 uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
88 dev_err(rdev->dev, "Unknown bits per sample 0x%x using 16 instead\n",
95 * current sampling rate in HZ
97 int r600_audio_rate(struct radeon_device *rdev)
99 uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
107 result *= ((value >> 11) & 0x7) + 1;
108 result /= ((value >> 8) & 0x7) + 1;
114 * iec 60958 status bits
116 uint8_t r600_audio_status_bits(struct radeon_device *rdev)
118 return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
122 * iec 60958 category code
124 uint8_t r600_audio_category_code(struct radeon_device *rdev)
126 return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
130 * update all hdmi interfaces with current audio parameters
132 void r600_audio_update_hdmi(struct work_struct *work)
134 struct radeon_device *rdev = container_of(work, struct radeon_device,
136 struct drm_device *dev = rdev->ddev;
138 int channels = r600_audio_channels(rdev);
139 int rate = r600_audio_rate(rdev);
140 int bps = r600_audio_bits_per_sample(rdev);
141 uint8_t status_bits = r600_audio_status_bits(rdev);
142 uint8_t category_code = r600_audio_category_code(rdev);
143 struct drm_encoder *encoder;
146 changes |= channels != rdev->audio.channels;
147 changes |= rate != rdev->audio.rate;
148 changes |= bps != rdev->audio.bits_per_sample;
149 changes |= status_bits != rdev->audio.status_bits;
150 changes |= category_code != rdev->audio.category_code;
153 rdev->audio.channels = channels;
154 rdev->audio.rate = rate;
155 rdev->audio.bits_per_sample = bps;
156 rdev->audio.status_bits = status_bits;
157 rdev->audio.category_code = category_code;
160 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
161 if (!radeon_dig_encoder(encoder))
163 if (changes || r600_hdmi_buffer_status_changed(encoder))
164 r600_hdmi_update_audio_settings(encoder);
169 * turn on/off audio engine
171 static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
174 DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
175 if (ASIC_IS_DCE4(rdev)) {
177 value |= 0x81000000; /* Required to enable audio */
178 value |= 0x0e1000f0; /* fglrx sets that too */
180 WREG32(EVERGREEN_AUDIO_ENABLE, value);
182 WREG32_P(R600_AUDIO_ENABLE,
183 enable ? 0x81000000 : 0x0, ~0x81000000);
185 rdev->audio.enabled = enable;
189 * initialize the audio vars
191 int r600_audio_init(struct radeon_device *rdev)
193 if (!radeon_audio || !r600_audio_chipset_supported(rdev))
196 r600_audio_engine_enable(rdev, true);
198 rdev->audio.channels = -1;
199 rdev->audio.rate = -1;
200 rdev->audio.bits_per_sample = -1;
201 rdev->audio.status_bits = 0;
202 rdev->audio.category_code = 0;
208 * atach the audio codec to the clock source of the encoder
210 void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
212 struct drm_device *dev = encoder->dev;
213 struct radeon_device *rdev = dev->dev_private;
214 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
215 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
216 int base_rate = 48000;
218 switch (radeon_encoder->encoder_id) {
219 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
220 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
221 WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
223 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
224 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
225 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
226 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
227 WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
230 dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
231 radeon_encoder->encoder_id);
235 if (ASIC_IS_DCE4(rdev)) {
236 /* TODO: other PLLs? */
237 WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10);
238 WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10);
239 WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071);
241 /* Some magic trigger or src sel? */
242 WREG32_P(0x5ac, 0x01, ~0x77);
244 switch (dig->dig_encoder) {
246 WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
247 WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
248 WREG32(R600_AUDIO_CLK_SRCSEL, 0);
252 WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
253 WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
254 WREG32(R600_AUDIO_CLK_SRCSEL, 1);
258 "Unsupported DIG on encoder 0x%02X\n",
259 radeon_encoder->encoder_id);
266 * release the audio timer
267 * TODO: How to do this correctly on SMP systems?
269 void r600_audio_fini(struct radeon_device *rdev)
271 if (!rdev->audio.enabled)
274 r600_audio_engine_enable(rdev, false);