drm/radeon/hdmi: use new AFMT structs
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / radeon / r600_audio.c
1 /*
2  * Copyright 2008 Advanced Micro Devices, Inc.
3  * Copyright 2008 Red Hat Inc.
4  * Copyright 2009 Christian König.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Christian König
25  */
26 #include "drmP.h"
27 #include "radeon.h"
28 #include "radeon_reg.h"
29 #include "radeon_asic.h"
30 #include "atom.h"
31
32 /*
33  * check if enc_priv stores radeon_encoder_atom_dig
34  */
35 static bool radeon_dig_encoder(struct drm_encoder *encoder)
36 {
37         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
38         switch (radeon_encoder->encoder_id) {
39         case ENCODER_OBJECT_ID_INTERNAL_LVDS:
40         case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
41         case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
42         case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
43         case ENCODER_OBJECT_ID_INTERNAL_DVO1:
44         case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
45         case ENCODER_OBJECT_ID_INTERNAL_DDI:
46         case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
47         case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
48         case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
49         case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
50                 return true;
51         }
52         return false;
53 }
54
55 /*
56  * check if the chipset is supported
57  */
58 static int r600_audio_chipset_supported(struct radeon_device *rdev)
59 {
60         return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE5(rdev))
61                 || rdev->family == CHIP_RS600
62                 || rdev->family == CHIP_RS690
63                 || rdev->family == CHIP_RS740;
64 }
65
66 /*
67  * current number of channels
68  */
69 int r600_audio_channels(struct radeon_device *rdev)
70 {
71         return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
72 }
73
74 /*
75  * current bits per sample
76  */
77 int r600_audio_bits_per_sample(struct radeon_device *rdev)
78 {
79         uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
80         switch (value) {
81         case 0x0: return  8;
82         case 0x1: return 16;
83         case 0x2: return 20;
84         case 0x3: return 24;
85         case 0x4: return 32;
86         }
87
88         dev_err(rdev->dev, "Unknown bits per sample 0x%x using 16 instead\n",
89                 (int)value);
90
91         return 16;
92 }
93
94 /*
95  * current sampling rate in HZ
96  */
97 int r600_audio_rate(struct radeon_device *rdev)
98 {
99         uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
100         uint32_t result;
101
102         if (value & 0x4000)
103                 result = 44100;
104         else
105                 result = 48000;
106
107         result *= ((value >> 11) & 0x7) + 1;
108         result /= ((value >> 8) & 0x7) + 1;
109
110         return result;
111 }
112
113 /*
114  * iec 60958 status bits
115  */
116 uint8_t r600_audio_status_bits(struct radeon_device *rdev)
117 {
118         return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
119 }
120
121 /*
122  * iec 60958 category code
123  */
124 uint8_t r600_audio_category_code(struct radeon_device *rdev)
125 {
126         return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
127 }
128
129 /*
130  * update all hdmi interfaces with current audio parameters
131  */
132 void r600_audio_update_hdmi(struct work_struct *work)
133 {
134         struct radeon_device *rdev = container_of(work, struct radeon_device,
135                                                   audio_work);
136         struct drm_device *dev = rdev->ddev;
137
138         int channels = r600_audio_channels(rdev);
139         int rate = r600_audio_rate(rdev);
140         int bps = r600_audio_bits_per_sample(rdev);
141         uint8_t status_bits = r600_audio_status_bits(rdev);
142         uint8_t category_code = r600_audio_category_code(rdev);
143         struct drm_encoder *encoder;
144         int changes = 0;
145
146         changes |= channels != rdev->audio.channels;
147         changes |= rate != rdev->audio.rate;
148         changes |= bps != rdev->audio.bits_per_sample;
149         changes |= status_bits != rdev->audio.status_bits;
150         changes |= category_code != rdev->audio.category_code;
151
152         if (changes) {
153                 rdev->audio.channels = channels;
154                 rdev->audio.rate = rate;
155                 rdev->audio.bits_per_sample = bps;
156                 rdev->audio.status_bits = status_bits;
157                 rdev->audio.category_code = category_code;
158         }
159
160         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
161                 if (!radeon_dig_encoder(encoder))
162                         continue;
163                 if (changes || r600_hdmi_buffer_status_changed(encoder))
164                         r600_hdmi_update_audio_settings(encoder);
165         }
166 }
167
168 /*
169  * turn on/off audio engine
170  */
171 static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
172 {
173         u32 value = 0;
174         DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
175         if (ASIC_IS_DCE4(rdev)) {
176                 if (enable) {
177                         value |= 0x81000000; /* Required to enable audio */
178                         value |= 0x0e1000f0; /* fglrx sets that too */
179                 }
180                 WREG32(EVERGREEN_AUDIO_ENABLE, value);
181         } else {
182                 WREG32_P(R600_AUDIO_ENABLE,
183                          enable ? 0x81000000 : 0x0, ~0x81000000);
184         }
185         rdev->audio.enabled = enable;
186 }
187
188 /*
189  * initialize the audio vars
190  */
191 int r600_audio_init(struct radeon_device *rdev)
192 {
193         if (!radeon_audio || !r600_audio_chipset_supported(rdev))
194                 return 0;
195
196         r600_audio_engine_enable(rdev, true);
197
198         rdev->audio.channels = -1;
199         rdev->audio.rate = -1;
200         rdev->audio.bits_per_sample = -1;
201         rdev->audio.status_bits = 0;
202         rdev->audio.category_code = 0;
203
204         return 0;
205 }
206
207 /*
208  * atach the audio codec to the clock source of the encoder
209  */
210 void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
211 {
212         struct drm_device *dev = encoder->dev;
213         struct radeon_device *rdev = dev->dev_private;
214         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
215         struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
216         int base_rate = 48000;
217
218         switch (radeon_encoder->encoder_id) {
219         case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
220         case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
221                 WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
222                 break;
223         case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
224         case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
225         case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
226         case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
227                 WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
228                 break;
229         default:
230                 dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
231                           radeon_encoder->encoder_id);
232                 return;
233         }
234
235         if (ASIC_IS_DCE4(rdev)) {
236                 /* TODO: other PLLs? */
237                 WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10);
238                 WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10);
239                 WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071);
240
241                 /* Some magic trigger or src sel? */
242                 WREG32_P(0x5ac, 0x01, ~0x77);
243         } else {
244                 switch (dig->dig_encoder) {
245                 case 0:
246                         WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
247                         WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
248                         WREG32(R600_AUDIO_CLK_SRCSEL, 0);
249                         break;
250
251                 case 1:
252                         WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
253                         WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
254                         WREG32(R600_AUDIO_CLK_SRCSEL, 1);
255                         break;
256                 default:
257                         dev_err(rdev->dev,
258                                 "Unsupported DIG on encoder 0x%02X\n",
259                                 radeon_encoder->encoder_id);
260                         return;
261                 }
262         }
263 }
264
265 /*
266  * release the audio timer
267  * TODO: How to do this correctly on SMP systems?
268  */
269 void r600_audio_fini(struct radeon_device *rdev)
270 {
271         if (!rdev->audio.enabled)
272                 return;
273
274         r600_audio_engine_enable(rdev, false);
275 }