drivers/gpu/drm/radeon/radeon_fence.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Dave Airlie
  30  */
  31 #include <linux/seq_file.h>
  32 #include <linux/atomic.h>
  33 #include <linux/wait.h>
  34 #include <linux/list.h>
  35 #include <linux/kref.h>
  36 #include <linux/slab.h>
  37 #include "drmP.h"
  38 #include "drm.h"
  39 #include "radeon_reg.h"
  40 #include "radeon.h"
  41 #include "radeon_trace.h"
  42
  43 static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring)
  44 {
  45         if (rdev->wb.enabled) {
  46                 *rdev->fence_drv[ring].cpu_addr = cpu_to_le32(seq);
  47         } else {
  48                 WREG32(rdev->fence_drv[ring].scratch_reg, seq);
  49         }
  50 }
  51
  52 static u32 radeon_fence_read(struct radeon_device *rdev, int ring)
  53 {
  54         u32 seq = 0;
  55
  56         if (rdev->wb.enabled) {
  57                 seq = le32_to_cpu(*rdev->fence_drv[ring].cpu_addr);
  58         } else {
  59                 seq = RREG32(rdev->fence_drv[ring].scratch_reg);
  60         }
  61         return seq;
  62 }
  63
  64 int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
  65 {
  66         unsigned long irq_flags;
  67
  68         write_lock_irqsave(&rdev->fence_lock, irq_flags);
  69         if (fence->emitted) {
  70                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  71                 return 0;
  72         }
  73         fence->seq = atomic_add_return(1, &rdev->fence_drv[fence->ring].seq);
  74         if (!rdev->ring[fence->ring].ready)
  75                 /* FIXME: cp is not running assume everythings is done right
  76                  * away
  77                  */
  78                 radeon_fence_write(rdev, fence->seq, fence->ring);
  79         else
  80                 radeon_fence_ring_emit(rdev, fence->ring, fence);
  81
  82         trace_radeon_fence_emit(rdev->ddev, fence->seq);
  83         fence->emitted = true;
  84         list_move_tail(&fence->list, &rdev->fence_drv[fence->ring].emitted);
  85         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  86         return 0;
  87 }
  88
  89 static bool radeon_fence_poll_locked(struct radeon_device *rdev, int ring)
  90 {
  91         struct radeon_fence *fence;
  92         struct list_head *i, *n;
  93         uint32_t seq;
  94         bool wake = false;
  95         unsigned long cjiffies;
  96
  97         seq = radeon_fence_read(rdev, ring);
  98         if (seq != rdev->fence_drv[ring].last_seq) {
  99                 rdev->fence_drv[ring].last_seq = seq;
 100                 rdev->fence_drv[ring].last_jiffies = jiffies;
 101                 rdev->fence_drv[ring].last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
 102         } else {
 103                 cjiffies = jiffies;
 104                 if (time_after(cjiffies, rdev->fence_drv[ring].last_jiffies)) {
 105                         cjiffies -= rdev->fence_drv[ring].last_jiffies;
 106                         if (time_after(rdev->fence_drv[ring].last_timeout, cjiffies)) {
 107                                 /* update the timeout */
 108                                 rdev->fence_drv[ring].last_timeout -= cjiffies;
 109                         } else {
 110                                 /* the 500ms timeout is elapsed we should test
 111                                  * for GPU lockup
 112                                  */
 113                                 rdev->fence_drv[ring].last_timeout = 1;
 114                         }
 115                 } else {
 116                         /* wrap around update last jiffies, we will just wait
 117                          * a little longer
 118                          */
 119                         rdev->fence_drv[ring].last_jiffies = cjiffies;
 120                 }
 121                 return false;
 122         }
 123         n = NULL;
 124         list_for_each(i, &rdev->fence_drv[ring].emitted) {
 125                 fence = list_entry(i, struct radeon_fence, list);
 126                 if (fence->seq == seq) {
 127                         n = i;
 128                         break;
 129                 }
 130         }
 131         /* all fence previous to this one are considered as signaled */
 132         if (n) {
 133                 i = n;
 134                 do {
 135                         n = i->prev;
 136                         list_move_tail(i, &rdev->fence_drv[ring].signaled);
 137                         fence = list_entry(i, struct radeon_fence, list);
 138                         fence->signaled = true;
 139                         i = n;
 140                 } while (i != &rdev->fence_drv[ring].emitted);
 141                 wake = true;
 142         }
 143         return wake;
 144 }
 145
 146 static void radeon_fence_destroy(struct kref *kref)
 147 {
 148         unsigned long irq_flags;
 149         struct radeon_fence *fence;
 150
 151         fence = container_of(kref, struct radeon_fence, kref);
 152         write_lock_irqsave(&fence->rdev->fence_lock, irq_flags);
 153         list_del(&fence->list);
 154         fence->emitted = false;
 155         write_unlock_irqrestore(&fence->rdev->fence_lock, irq_flags);
 156         kfree(fence);
 157 }
 158
 159 int radeon_fence_create(struct radeon_device *rdev,
 160                         struct radeon_fence **fence,
 161                         int ring)
 162 {
 163         unsigned long irq_flags;
 164
 165         *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
 166         if ((*fence) == NULL) {
 167                 return -ENOMEM;
 168         }
 169         kref_init(&((*fence)->kref));
 170         (*fence)->rdev = rdev;
 171         (*fence)->emitted = false;
 172         (*fence)->signaled = false;
 173         (*fence)->seq = 0;
 174         (*fence)->ring = ring;
 175         INIT_LIST_HEAD(&(*fence)->list);
 176
 177         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 178         list_add_tail(&(*fence)->list, &rdev->fence_drv[ring].created);
 179         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 180         return 0;
 181 }
 182
 183 bool radeon_fence_signaled(struct radeon_fence *fence)
 184 {
 185         unsigned long irq_flags;
 186         bool signaled = false;
 187
 188         if (!fence)
 189                 return true;
 190
 191         if (fence->rdev->gpu_lockup)
 192                 return true;
 193
 194         write_lock_irqsave(&fence->rdev->fence_lock, irq_flags);
 195         signaled = fence->signaled;
 196         /* if we are shuting down report all fence as signaled */
 197         if (fence->rdev->shutdown) {
 198                 signaled = true;
 199         }
 200         if (!fence->emitted) {
 201                 WARN(1, "Querying an unemitted fence : %p !\n", fence);
 202                 signaled = true;
 203         }
 204         if (!signaled) {
 205                 radeon_fence_poll_locked(fence->rdev, fence->ring);
 206                 signaled = fence->signaled;
 207         }
 208         write_unlock_irqrestore(&fence->rdev->fence_lock, irq_flags);
 209         return signaled;
 210 }
 211
 212 int radeon_fence_wait(struct radeon_fence *fence, bool intr)
 213 {
 214         struct radeon_device *rdev;
 215         unsigned long irq_flags, timeout;
 216         u32 seq;
 217         int r;
 218
 219         if (fence == NULL) {
 220                 WARN(1, "Querying an invalid fence : %p !\n", fence);
 221                 return 0;
 222         }
 223         rdev = fence->rdev;
 224         if (radeon_fence_signaled(fence)) {
 225                 return 0;
 226         }
 227         timeout = rdev->fence_drv[fence->ring].last_timeout;
 228 retry:
 229         /* save current sequence used to check for GPU lockup */
 230         seq = rdev->fence_drv[fence->ring].last_seq;
 231         trace_radeon_fence_wait_begin(rdev->ddev, seq);
 232         if (intr) {
 233                 radeon_irq_kms_sw_irq_get(rdev, fence->ring);
 234                 r = wait_event_interruptible_timeout(rdev->fence_drv[fence->ring].queue,
 235                                 radeon_fence_signaled(fence), timeout);
 236                 radeon_irq_kms_sw_irq_put(rdev, fence->ring);
 237                 if (unlikely(r < 0)) {
 238                         return r;
 239                 }
 240         } else {
 241                 radeon_irq_kms_sw_irq_get(rdev, fence->ring);
 242                 r = wait_event_timeout(rdev->fence_drv[fence->ring].queue,
 243                          radeon_fence_signaled(fence), timeout);
 244                 radeon_irq_kms_sw_irq_put(rdev, fence->ring);
 245         }
 246         trace_radeon_fence_wait_end(rdev->ddev, seq);
 247         if (unlikely(!radeon_fence_signaled(fence))) {
 248                 /* we were interrupted for some reason and fence isn't
 249                  * isn't signaled yet, resume wait
 250                  */
 251                 if (r) {
 252                         timeout = r;
 253                         goto retry;
 254                 }
 255                 /* don't protect read access to rdev->fence_drv[t].last_seq
 256                  * if we experiencing a lockup the value doesn't change
 257                  */
 258                 if (seq == rdev->fence_drv[fence->ring].last_seq &&
 259                     radeon_gpu_is_lockup(rdev, &rdev->ring[fence->ring])) {
 260                         /* good news we believe it's a lockup */
 261                         printk(KERN_WARNING "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n",
 262                              fence->seq, seq);
 263                         /* FIXME: what should we do ? marking everyone
 264                          * as signaled for now
 265                          */
 266                         rdev->gpu_lockup = true;
 267                         r = radeon_gpu_reset(rdev);
 268                         if (r)
 269                                 return r;
 270                         radeon_fence_write(rdev, fence->seq, fence->ring);
 271                         rdev->gpu_lockup = false;
 272                 }
 273                 timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
 274                 write_lock_irqsave(&rdev->fence_lock, irq_flags);
 275                 rdev->fence_drv[fence->ring].last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
 276                 rdev->fence_drv[fence->ring].last_jiffies = jiffies;
 277                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 278                 goto retry;
 279         }
 280         return 0;
 281 }
 282
 283 int radeon_fence_wait_next(struct radeon_device *rdev, int ring)
 284 {
 285         unsigned long irq_flags;
 286         struct radeon_fence *fence;
 287         int r;
 288
 289         if (rdev->gpu_lockup) {
 290                 return 0;
 291         }
 292         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 293         if (list_empty(&rdev->fence_drv[ring].emitted)) {
 294                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 295                 return 0;
 296         }
 297         fence = list_entry(rdev->fence_drv[ring].emitted.next,
 298                            struct radeon_fence, list);
 299         radeon_fence_ref(fence);
 300         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 301         r = radeon_fence_wait(fence, false);
 302         radeon_fence_unref(&fence);
 303         return r;
 304 }
 305
 306 int radeon_fence_wait_last(struct radeon_device *rdev, int ring)
 307 {
 308         unsigned long irq_flags;
 309         struct radeon_fence *fence;
 310         int r;
 311
 312         if (rdev->gpu_lockup) {
 313                 return 0;
 314         }
 315         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 316         if (list_empty(&rdev->fence_drv[ring].emitted)) {
 317                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 318                 return 0;
 319         }
 320         fence = list_entry(rdev->fence_drv[ring].emitted.prev,
 321                            struct radeon_fence, list);
 322         radeon_fence_ref(fence);
 323         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 324         r = radeon_fence_wait(fence, false);
 325         radeon_fence_unref(&fence);
 326         return r;
 327 }
 328
 329 struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
 330 {
 331         kref_get(&fence->kref);
 332         return fence;
 333 }
 334
 335 void radeon_fence_unref(struct radeon_fence **fence)
 336 {
 337         struct radeon_fence *tmp = *fence;
 338
 339         *fence = NULL;
 340         if (tmp) {
 341                 kref_put(&tmp->kref, radeon_fence_destroy);
 342         }
 343 }
 344
 345 void radeon_fence_process(struct radeon_device *rdev, int ring)
 346 {
 347         unsigned long irq_flags;
 348         bool wake;
 349
 350         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 351         wake = radeon_fence_poll_locked(rdev, ring);
 352         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 353         if (wake) {
 354                 wake_up_all(&rdev->fence_drv[ring].queue);
 355         }
 356 }
 357
 358 int radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
 359 {
 360         unsigned long irq_flags;
 361         int not_processed = 0;
 362
 363         read_lock_irqsave(&rdev->fence_lock, irq_flags);
 364         if (!rdev->fence_drv[ring].initialized)
 365                 return 0;
 366
 367         if (!list_empty(&rdev->fence_drv[ring].emitted)) {
 368                 struct list_head *ptr;
 369                 list_for_each(ptr, &rdev->fence_drv[ring].emitted) {
 370                         /* count up to 3, that's enought info */
 371                         if (++not_processed >= 3)
 372                                 break;
 373                 }
 374         }
 375         read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 376         return not_processed;
 377 }
 378
 379 int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
 380 {
 381         unsigned long irq_flags;
 382         uint64_t index;
 383         int r;
 384
 385         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 386         radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
 387         if (rdev->wb.use_event) {
 388                 rdev->fence_drv[ring].scratch_reg = 0;
 389                 index = R600_WB_EVENT_OFFSET + ring * 4;
 390         } else {
 391                 r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
 392                 if (r) {
 393                         dev_err(rdev->dev, "fence failed to get scratch register\n");
 394                         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 395                         return r;
 396                 }
 397                 index = RADEON_WB_SCRATCH_OFFSET +
 398                         rdev->fence_drv[ring].scratch_reg -
 399                         rdev->scratch.reg_base;
 400         }
 401         rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4];
 402         rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index;
 403         radeon_fence_write(rdev, atomic_read(&rdev->fence_drv[ring].seq), ring);
 404         rdev->fence_drv[ring].initialized = true;
 405         DRM_INFO("fence driver on ring %d use gpu addr 0x%08Lx and cpu addr 0x%p\n",
 406                  ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);
 407         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 408         return 0;
 409 }
 410
 411 static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring)
 412 {
 413         rdev->fence_drv[ring].scratch_reg = -1;
 414         rdev->fence_drv[ring].cpu_addr = NULL;
 415         rdev->fence_drv[ring].gpu_addr = 0;
 416         atomic_set(&rdev->fence_drv[ring].seq, 0);
 417         INIT_LIST_HEAD(&rdev->fence_drv[ring].created);
 418         INIT_LIST_HEAD(&rdev->fence_drv[ring].emitted);
 419         INIT_LIST_HEAD(&rdev->fence_drv[ring].signaled);
 420         init_waitqueue_head(&rdev->fence_drv[ring].queue);
 421         rdev->fence_drv[ring].initialized = false;
 422 }
 423
 424 int radeon_fence_driver_init(struct radeon_device *rdev)
 425 {
 426         unsigned long irq_flags;
 427         int ring;
 428
 429         write_lock_irqsave(&rdev->fence_lock, irq_flags);
 430         for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
 431                 radeon_fence_driver_init_ring(rdev, ring);
 432         }
 433         write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 434         if (radeon_debugfs_fence_init(rdev)) {
 435                 dev_err(rdev->dev, "fence debugfs file creation failed\n");
 436         }
 437         return 0;
 438 }
 439
 440 void radeon_fence_driver_fini(struct radeon_device *rdev)
 441 {
 442         unsigned long irq_flags;
 443         int ring;
 444
 445         for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
 446                 if (!rdev->fence_drv[ring].initialized)
 447                         continue;
 448                 radeon_fence_wait_last(rdev, ring);
 449                 wake_up_all(&rdev->fence_drv[ring].queue);
 450                 write_lock_irqsave(&rdev->fence_lock, irq_flags);
 451                 radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
 452                 write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
 453                 rdev->fence_drv[ring].initialized = false;
 454         }
 455 }
 456
 457
 458 /*
 459  * Fence debugfs
 460  */
 461 #if defined(CONFIG_DEBUG_FS)
 462 static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
 463 {
 464         struct drm_info_node *node = (struct drm_info_node *)m->private;
 465         struct drm_device *dev = node->minor->dev;
 466         struct radeon_device *rdev = dev->dev_private;
 467         struct radeon_fence *fence;
 468         int i;
 469
 470         for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 471                 if (!rdev->fence_drv[i].initialized)
 472                         continue;
 473
 474                 seq_printf(m, "--- ring %d ---\n", i);
 475                 seq_printf(m, "Last signaled fence 0x%08X\n",
 476                            radeon_fence_read(rdev, i));
 477                 if (!list_empty(&rdev->fence_drv[i].emitted)) {
 478                         fence = list_entry(rdev->fence_drv[i].emitted.prev,
 479                                            struct radeon_fence, list);
 480                         seq_printf(m, "Last emitted fence %p with 0x%08X\n",
 481                                    fence,  fence->seq);
 482                 }
 483         }
 484         return 0;
 485 }
 486
 487 static struct drm_info_list radeon_debugfs_fence_list[] = {
 488         {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
 489 };
 490 #endif
 491
 492 int radeon_debugfs_fence_init(struct radeon_device *rdev)
 493 {
 494 #if defined(CONFIG_DEBUG_FS)
 495         return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
 496 #else
 497         return 0;
 498 #endif
 499 }