2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
29 #include <drm/radeon_drm.h>
32 void radeon_gem_object_free(struct drm_gem_object *gobj)
34 struct radeon_bo *robj = gem_to_radeon_bo(gobj);
37 if (robj->gem_base.import_attach)
38 drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
39 radeon_bo_unref(&robj);
43 int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
44 int alignment, int initial_domain,
45 u32 flags, bool kernel,
46 struct drm_gem_object **obj)
48 struct radeon_bo *robj;
49 unsigned long max_size;
53 /* At least align on page size */
54 if (alignment < PAGE_SIZE) {
55 alignment = PAGE_SIZE;
58 /* Maximum bo size is the unpinned gtt size since we use the gtt to
59 * handle vram to system pool migrations.
61 max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
62 if (size > max_size) {
63 DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
64 size >> 20, max_size >> 20);
69 r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
72 if (r != -ERESTARTSYS) {
73 if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
74 initial_domain |= RADEON_GEM_DOMAIN_GTT;
77 DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
78 size, initial_domain, alignment, r);
82 *obj = &robj->gem_base;
83 robj->pid = task_pid_nr(current);
85 mutex_lock(&rdev->gem.mutex);
86 list_add_tail(&robj->list, &rdev->gem.objects);
87 mutex_unlock(&rdev->gem.mutex);
92 static int radeon_gem_set_domain(struct drm_gem_object *gobj,
93 uint32_t rdomain, uint32_t wdomain)
95 struct radeon_bo *robj;
99 /* FIXME: reeimplement */
100 robj = gem_to_radeon_bo(gobj);
101 /* work out where to validate the buffer to */
108 printk(KERN_WARNING "Set domain without domain !\n");
111 if (domain == RADEON_GEM_DOMAIN_CPU) {
112 /* Asking for cpu access wait for object idle */
113 r = radeon_bo_wait(robj, NULL, false);
115 printk(KERN_ERR "Failed to wait for object !\n");
122 int radeon_gem_init(struct radeon_device *rdev)
124 INIT_LIST_HEAD(&rdev->gem.objects);
128 void radeon_gem_fini(struct radeon_device *rdev)
130 radeon_bo_force_delete(rdev);
134 * Call from drm_gem_handle_create which appear in both new and open ioctl
137 int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
139 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
140 struct radeon_device *rdev = rbo->rdev;
141 struct radeon_fpriv *fpriv = file_priv->driver_priv;
142 struct radeon_vm *vm = &fpriv->vm;
143 struct radeon_bo_va *bo_va;
146 if (rdev->family < CHIP_CAYMAN) {
150 r = radeon_bo_reserve(rbo, false);
155 bo_va = radeon_vm_bo_find(vm, rbo);
157 bo_va = radeon_vm_bo_add(rdev, vm, rbo);
161 radeon_bo_unreserve(rbo);
166 void radeon_gem_object_close(struct drm_gem_object *obj,
167 struct drm_file *file_priv)
169 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
170 struct radeon_device *rdev = rbo->rdev;
171 struct radeon_fpriv *fpriv = file_priv->driver_priv;
172 struct radeon_vm *vm = &fpriv->vm;
173 struct radeon_bo_va *bo_va;
176 if (rdev->family < CHIP_CAYMAN) {
180 r = radeon_bo_reserve(rbo, true);
182 dev_err(rdev->dev, "leaking bo va because "
183 "we fail to reserve bo (%d)\n", r);
186 bo_va = radeon_vm_bo_find(vm, rbo);
188 if (--bo_va->ref_count == 0) {
189 radeon_vm_bo_rmv(rdev, bo_va);
192 radeon_bo_unreserve(rbo);
195 static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
198 r = radeon_gpu_reset(rdev);
208 int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
209 struct drm_file *filp)
211 struct radeon_device *rdev = dev->dev_private;
212 struct drm_radeon_gem_info *args = data;
213 struct ttm_mem_type_manager *man;
215 man = &rdev->mman.bdev.man[TTM_PL_VRAM];
217 args->vram_size = rdev->mc.real_vram_size;
218 args->vram_visible = (u64)man->size << PAGE_SHIFT;
219 args->vram_visible -= rdev->vram_pin_size;
220 args->gart_size = rdev->mc.gtt_size;
221 args->gart_size -= rdev->gart_pin_size;
226 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
227 struct drm_file *filp)
229 /* TODO: implement */
230 DRM_ERROR("unimplemented %s\n", __func__);
234 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
235 struct drm_file *filp)
237 /* TODO: implement */
238 DRM_ERROR("unimplemented %s\n", __func__);
242 int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
243 struct drm_file *filp)
245 struct radeon_device *rdev = dev->dev_private;
246 struct drm_radeon_gem_create *args = data;
247 struct drm_gem_object *gobj;
251 down_read(&rdev->exclusive_lock);
252 /* create a gem object to contain this object in */
253 args->size = roundup(args->size, PAGE_SIZE);
254 r = radeon_gem_object_create(rdev, args->size, args->alignment,
255 args->initial_domain, args->flags,
258 up_read(&rdev->exclusive_lock);
259 r = radeon_gem_handle_lockup(rdev, r);
262 r = drm_gem_handle_create(filp, gobj, &handle);
263 /* drop reference from allocate - handle holds it now */
264 drm_gem_object_unreference_unlocked(gobj);
266 up_read(&rdev->exclusive_lock);
267 r = radeon_gem_handle_lockup(rdev, r);
270 args->handle = handle;
271 up_read(&rdev->exclusive_lock);
275 int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data,
276 struct drm_file *filp)
278 struct radeon_device *rdev = dev->dev_private;
279 struct drm_radeon_gem_userptr *args = data;
280 struct drm_gem_object *gobj;
281 struct radeon_bo *bo;
285 if (offset_in_page(args->addr | args->size))
288 /* we only support read only mappings for now */
289 if (!(args->flags & RADEON_GEM_USERPTR_READONLY))
292 /* reject unknown flag values */
293 if (args->flags & ~(RADEON_GEM_USERPTR_READONLY |
294 RADEON_GEM_USERPTR_ANONONLY))
297 /* readonly pages not tested on older hardware */
298 if (rdev->family < CHIP_R600)
301 down_read(&rdev->exclusive_lock);
303 /* create a gem object to contain this object in */
304 r = radeon_gem_object_create(rdev, args->size, 0,
305 RADEON_GEM_DOMAIN_CPU, 0,
310 bo = gem_to_radeon_bo(gobj);
311 r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
315 r = drm_gem_handle_create(filp, gobj, &handle);
316 /* drop reference from allocate - handle holds it now */
317 drm_gem_object_unreference_unlocked(gobj);
321 args->handle = handle;
322 up_read(&rdev->exclusive_lock);
326 drm_gem_object_unreference_unlocked(gobj);
329 up_read(&rdev->exclusive_lock);
330 r = radeon_gem_handle_lockup(rdev, r);
335 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
336 struct drm_file *filp)
338 /* transition the BO to a domain -
339 * just validate the BO into a certain domain */
340 struct radeon_device *rdev = dev->dev_private;
341 struct drm_radeon_gem_set_domain *args = data;
342 struct drm_gem_object *gobj;
343 struct radeon_bo *robj;
346 /* for now if someone requests domain CPU -
347 * just make sure the buffer is finished with */
348 down_read(&rdev->exclusive_lock);
350 /* just do a BO wait for now */
351 gobj = drm_gem_object_lookup(dev, filp, args->handle);
353 up_read(&rdev->exclusive_lock);
356 robj = gem_to_radeon_bo(gobj);
358 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
360 drm_gem_object_unreference_unlocked(gobj);
361 up_read(&rdev->exclusive_lock);
362 r = radeon_gem_handle_lockup(robj->rdev, r);
366 int radeon_mode_dumb_mmap(struct drm_file *filp,
367 struct drm_device *dev,
368 uint32_t handle, uint64_t *offset_p)
370 struct drm_gem_object *gobj;
371 struct radeon_bo *robj;
373 gobj = drm_gem_object_lookup(dev, filp, handle);
377 robj = gem_to_radeon_bo(gobj);
378 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm)) {
379 drm_gem_object_unreference_unlocked(gobj);
382 *offset_p = radeon_bo_mmap_offset(robj);
383 drm_gem_object_unreference_unlocked(gobj);
387 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
388 struct drm_file *filp)
390 struct drm_radeon_gem_mmap *args = data;
392 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
395 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
396 struct drm_file *filp)
398 struct radeon_device *rdev = dev->dev_private;
399 struct drm_radeon_gem_busy *args = data;
400 struct drm_gem_object *gobj;
401 struct radeon_bo *robj;
403 uint32_t cur_placement = 0;
405 gobj = drm_gem_object_lookup(dev, filp, args->handle);
409 robj = gem_to_radeon_bo(gobj);
410 r = radeon_bo_wait(robj, &cur_placement, true);
411 args->domain = radeon_mem_type_to_domain(cur_placement);
412 drm_gem_object_unreference_unlocked(gobj);
413 r = radeon_gem_handle_lockup(rdev, r);
417 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
418 struct drm_file *filp)
420 struct radeon_device *rdev = dev->dev_private;
421 struct drm_radeon_gem_wait_idle *args = data;
422 struct drm_gem_object *gobj;
423 struct radeon_bo *robj;
425 uint32_t cur_placement = 0;
427 gobj = drm_gem_object_lookup(dev, filp, args->handle);
431 robj = gem_to_radeon_bo(gobj);
432 r = radeon_bo_wait(robj, &cur_placement, false);
433 /* Flush HDP cache via MMIO if necessary */
434 if (rdev->asic->mmio_hdp_flush &&
435 radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)
436 robj->rdev->asic->mmio_hdp_flush(rdev);
437 drm_gem_object_unreference_unlocked(gobj);
438 r = radeon_gem_handle_lockup(rdev, r);
442 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
443 struct drm_file *filp)
445 struct drm_radeon_gem_set_tiling *args = data;
446 struct drm_gem_object *gobj;
447 struct radeon_bo *robj;
450 DRM_DEBUG("%d \n", args->handle);
451 gobj = drm_gem_object_lookup(dev, filp, args->handle);
454 robj = gem_to_radeon_bo(gobj);
455 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
456 drm_gem_object_unreference_unlocked(gobj);
460 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
461 struct drm_file *filp)
463 struct drm_radeon_gem_get_tiling *args = data;
464 struct drm_gem_object *gobj;
465 struct radeon_bo *rbo;
469 gobj = drm_gem_object_lookup(dev, filp, args->handle);
472 rbo = gem_to_radeon_bo(gobj);
473 r = radeon_bo_reserve(rbo, false);
474 if (unlikely(r != 0))
476 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
477 radeon_bo_unreserve(rbo);
479 drm_gem_object_unreference_unlocked(gobj);
483 int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
484 struct drm_file *filp)
486 struct drm_radeon_gem_va *args = data;
487 struct drm_gem_object *gobj;
488 struct radeon_device *rdev = dev->dev_private;
489 struct radeon_fpriv *fpriv = filp->driver_priv;
490 struct radeon_bo *rbo;
491 struct radeon_bo_va *bo_va;
495 if (!rdev->vm_manager.enabled) {
496 args->operation = RADEON_VA_RESULT_ERROR;
501 * We don't support vm_id yet, to be sure we don't have have broken
502 * userspace, reject anyone trying to use non 0 value thus moving
503 * forward we can use those fields without breaking existant userspace
506 args->operation = RADEON_VA_RESULT_ERROR;
510 if (args->offset < RADEON_VA_RESERVED_SIZE) {
511 dev_err(&dev->pdev->dev,
512 "offset 0x%lX is in reserved area 0x%X\n",
513 (unsigned long)args->offset,
514 RADEON_VA_RESERVED_SIZE);
515 args->operation = RADEON_VA_RESULT_ERROR;
519 /* don't remove, we need to enforce userspace to set the snooped flag
520 * otherwise we will endup with broken userspace and we won't be able
521 * to enable this feature without adding new interface
523 invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
524 if ((args->flags & invalid_flags)) {
525 dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
526 args->flags, invalid_flags);
527 args->operation = RADEON_VA_RESULT_ERROR;
531 switch (args->operation) {
533 case RADEON_VA_UNMAP:
536 dev_err(&dev->pdev->dev, "unsupported operation %d\n",
538 args->operation = RADEON_VA_RESULT_ERROR;
542 gobj = drm_gem_object_lookup(dev, filp, args->handle);
544 args->operation = RADEON_VA_RESULT_ERROR;
547 rbo = gem_to_radeon_bo(gobj);
548 r = radeon_bo_reserve(rbo, false);
550 args->operation = RADEON_VA_RESULT_ERROR;
551 drm_gem_object_unreference_unlocked(gobj);
554 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
556 args->operation = RADEON_VA_RESULT_ERROR;
557 drm_gem_object_unreference_unlocked(gobj);
561 switch (args->operation) {
563 if (bo_va->it.start) {
564 args->operation = RADEON_VA_RESULT_VA_EXIST;
565 args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE;
568 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
570 case RADEON_VA_UNMAP:
571 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
576 args->operation = RADEON_VA_RESULT_OK;
578 args->operation = RADEON_VA_RESULT_ERROR;
581 radeon_bo_unreserve(rbo);
582 drm_gem_object_unreference_unlocked(gobj);
586 int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
587 struct drm_file *filp)
589 struct drm_radeon_gem_op *args = data;
590 struct drm_gem_object *gobj;
591 struct radeon_bo *robj;
594 gobj = drm_gem_object_lookup(dev, filp, args->handle);
598 robj = gem_to_radeon_bo(gobj);
601 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm))
604 r = radeon_bo_reserve(robj, false);
609 case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
610 args->value = robj->initial_domain;
612 case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
613 robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
614 RADEON_GEM_DOMAIN_GTT |
615 RADEON_GEM_DOMAIN_CPU);
621 radeon_bo_unreserve(robj);
623 drm_gem_object_unreference_unlocked(gobj);
627 int radeon_mode_dumb_create(struct drm_file *file_priv,
628 struct drm_device *dev,
629 struct drm_mode_create_dumb *args)
631 struct radeon_device *rdev = dev->dev_private;
632 struct drm_gem_object *gobj;
636 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
637 args->size = args->pitch * args->height;
638 args->size = ALIGN(args->size, PAGE_SIZE);
640 r = radeon_gem_object_create(rdev, args->size, 0,
641 RADEON_GEM_DOMAIN_VRAM, 0,
646 r = drm_gem_handle_create(file_priv, gobj, &handle);
647 /* drop reference from allocate - handle holds it now */
648 drm_gem_object_unreference_unlocked(gobj);
652 args->handle = handle;
656 #if defined(CONFIG_DEBUG_FS)
657 static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
659 struct drm_info_node *node = (struct drm_info_node *)m->private;
660 struct drm_device *dev = node->minor->dev;
661 struct radeon_device *rdev = dev->dev_private;
662 struct radeon_bo *rbo;
665 mutex_lock(&rdev->gem.mutex);
666 list_for_each_entry(rbo, &rdev->gem.objects, list) {
668 const char *placement;
670 domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
672 case RADEON_GEM_DOMAIN_VRAM:
675 case RADEON_GEM_DOMAIN_GTT:
678 case RADEON_GEM_DOMAIN_CPU:
683 seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
684 i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
685 placement, (unsigned long)rbo->pid);
688 mutex_unlock(&rdev->gem.mutex);
692 static struct drm_info_list radeon_debugfs_gem_list[] = {
693 {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
697 int radeon_gem_debugfs_init(struct radeon_device *rdev)
699 #if defined(CONFIG_DEBUG_FS)
700 return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);