2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
29 #include <drm/radeon_drm.h>
32 void radeon_gem_object_free(struct drm_gem_object *gobj)
34 struct radeon_bo *robj = gem_to_radeon_bo(gobj);
37 if (robj->gem_base.import_attach)
38 drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
39 radeon_bo_unref(&robj);
43 int radeon_gem_object_create(struct radeon_device *rdev, unsigned long size,
44 int alignment, int initial_domain,
45 u32 flags, bool kernel,
46 struct drm_gem_object **obj)
48 struct radeon_bo *robj;
49 unsigned long max_size;
53 /* At least align on page size */
54 if (alignment < PAGE_SIZE) {
55 alignment = PAGE_SIZE;
58 /* Maximum bo size is the unpinned gtt size since we use the gtt to
59 * handle vram to system pool migrations.
61 max_size = rdev->mc.gtt_size - rdev->gart_pin_size;
62 if (size > max_size) {
63 DRM_DEBUG("Allocation size %ldMb bigger than %ldMb limit\n",
64 size >> 20, max_size >> 20);
69 r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain,
70 flags, NULL, NULL, &robj);
72 if (r != -ERESTARTSYS) {
73 if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
74 initial_domain |= RADEON_GEM_DOMAIN_GTT;
77 DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
78 size, initial_domain, alignment, r);
82 *obj = &robj->gem_base;
83 robj->pid = task_pid_nr(current);
85 mutex_lock(&rdev->gem.mutex);
86 list_add_tail(&robj->list, &rdev->gem.objects);
87 mutex_unlock(&rdev->gem.mutex);
92 static int radeon_gem_set_domain(struct drm_gem_object *gobj,
93 uint32_t rdomain, uint32_t wdomain)
95 struct radeon_bo *robj;
99 /* FIXME: reeimplement */
100 robj = gem_to_radeon_bo(gobj);
101 /* work out where to validate the buffer to */
108 printk(KERN_WARNING "Set domain without domain !\n");
111 if (domain == RADEON_GEM_DOMAIN_CPU) {
112 /* Asking for cpu access wait for object idle */
113 r = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
117 if (r < 0 && r != -EINTR) {
118 printk(KERN_ERR "Failed to wait for object: %li\n", r);
125 int radeon_gem_init(struct radeon_device *rdev)
127 INIT_LIST_HEAD(&rdev->gem.objects);
131 void radeon_gem_fini(struct radeon_device *rdev)
133 radeon_bo_force_delete(rdev);
137 * Call from drm_gem_handle_create which appear in both new and open ioctl
140 int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
142 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
143 struct radeon_device *rdev = rbo->rdev;
144 struct radeon_fpriv *fpriv = file_priv->driver_priv;
145 struct radeon_vm *vm = &fpriv->vm;
146 struct radeon_bo_va *bo_va;
149 if (rdev->family < CHIP_CAYMAN) {
153 r = radeon_bo_reserve(rbo, false);
158 bo_va = radeon_vm_bo_find(vm, rbo);
160 bo_va = radeon_vm_bo_add(rdev, vm, rbo);
164 radeon_bo_unreserve(rbo);
169 void radeon_gem_object_close(struct drm_gem_object *obj,
170 struct drm_file *file_priv)
172 struct radeon_bo *rbo = gem_to_radeon_bo(obj);
173 struct radeon_device *rdev = rbo->rdev;
174 struct radeon_fpriv *fpriv = file_priv->driver_priv;
175 struct radeon_vm *vm = &fpriv->vm;
176 struct radeon_bo_va *bo_va;
179 if (rdev->family < CHIP_CAYMAN) {
183 r = radeon_bo_reserve(rbo, true);
185 dev_err(rdev->dev, "leaking bo va because "
186 "we fail to reserve bo (%d)\n", r);
189 bo_va = radeon_vm_bo_find(vm, rbo);
191 if (--bo_va->ref_count == 0) {
192 radeon_vm_bo_rmv(rdev, bo_va);
195 radeon_bo_unreserve(rbo);
198 static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
201 r = radeon_gpu_reset(rdev);
211 int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
212 struct drm_file *filp)
214 struct radeon_device *rdev = dev->dev_private;
215 struct drm_radeon_gem_info *args = data;
216 struct ttm_mem_type_manager *man;
218 man = &rdev->mman.bdev.man[TTM_PL_VRAM];
220 args->vram_size = rdev->mc.real_vram_size;
221 args->vram_visible = (u64)man->size << PAGE_SHIFT;
222 args->vram_visible -= rdev->vram_pin_size;
223 args->gart_size = rdev->mc.gtt_size;
224 args->gart_size -= rdev->gart_pin_size;
229 int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
230 struct drm_file *filp)
232 /* TODO: implement */
233 DRM_ERROR("unimplemented %s\n", __func__);
237 int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
238 struct drm_file *filp)
240 /* TODO: implement */
241 DRM_ERROR("unimplemented %s\n", __func__);
245 int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
246 struct drm_file *filp)
248 struct radeon_device *rdev = dev->dev_private;
249 struct drm_radeon_gem_create *args = data;
250 struct drm_gem_object *gobj;
254 down_read(&rdev->exclusive_lock);
255 /* create a gem object to contain this object in */
256 args->size = roundup(args->size, PAGE_SIZE);
257 r = radeon_gem_object_create(rdev, args->size, args->alignment,
258 args->initial_domain, args->flags,
261 up_read(&rdev->exclusive_lock);
262 r = radeon_gem_handle_lockup(rdev, r);
265 r = drm_gem_handle_create(filp, gobj, &handle);
266 /* drop reference from allocate - handle holds it now */
267 drm_gem_object_unreference_unlocked(gobj);
269 up_read(&rdev->exclusive_lock);
270 r = radeon_gem_handle_lockup(rdev, r);
273 args->handle = handle;
274 up_read(&rdev->exclusive_lock);
278 int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data,
279 struct drm_file *filp)
281 struct radeon_device *rdev = dev->dev_private;
282 struct drm_radeon_gem_userptr *args = data;
283 struct drm_gem_object *gobj;
284 struct radeon_bo *bo;
288 if (offset_in_page(args->addr | args->size))
291 /* reject unknown flag values */
292 if (args->flags & ~(RADEON_GEM_USERPTR_READONLY |
293 RADEON_GEM_USERPTR_ANONONLY | RADEON_GEM_USERPTR_VALIDATE |
294 RADEON_GEM_USERPTR_REGISTER))
297 if (args->flags & RADEON_GEM_USERPTR_READONLY) {
298 /* readonly pages not tested on older hardware */
299 if (rdev->family < CHIP_R600)
302 } else if (!(args->flags & RADEON_GEM_USERPTR_ANONONLY) ||
303 !(args->flags & RADEON_GEM_USERPTR_REGISTER)) {
305 /* if we want to write to it we must require anonymous
306 memory and install a MMU notifier */
310 down_read(&rdev->exclusive_lock);
312 /* create a gem object to contain this object in */
313 r = radeon_gem_object_create(rdev, args->size, 0,
314 RADEON_GEM_DOMAIN_CPU, 0,
319 bo = gem_to_radeon_bo(gobj);
320 r = radeon_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
324 if (args->flags & RADEON_GEM_USERPTR_REGISTER) {
325 r = radeon_mn_register(bo, args->addr);
330 if (args->flags & RADEON_GEM_USERPTR_VALIDATE) {
331 down_read(¤t->mm->mmap_sem);
332 r = radeon_bo_reserve(bo, true);
334 up_read(¤t->mm->mmap_sem);
338 radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT);
339 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
340 radeon_bo_unreserve(bo);
341 up_read(¤t->mm->mmap_sem);
346 r = drm_gem_handle_create(filp, gobj, &handle);
347 /* drop reference from allocate - handle holds it now */
348 drm_gem_object_unreference_unlocked(gobj);
352 args->handle = handle;
353 up_read(&rdev->exclusive_lock);
357 drm_gem_object_unreference_unlocked(gobj);
360 up_read(&rdev->exclusive_lock);
361 r = radeon_gem_handle_lockup(rdev, r);
366 int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
367 struct drm_file *filp)
369 /* transition the BO to a domain -
370 * just validate the BO into a certain domain */
371 struct radeon_device *rdev = dev->dev_private;
372 struct drm_radeon_gem_set_domain *args = data;
373 struct drm_gem_object *gobj;
374 struct radeon_bo *robj;
377 /* for now if someone requests domain CPU -
378 * just make sure the buffer is finished with */
379 down_read(&rdev->exclusive_lock);
381 /* just do a BO wait for now */
382 gobj = drm_gem_object_lookup(dev, filp, args->handle);
384 up_read(&rdev->exclusive_lock);
387 robj = gem_to_radeon_bo(gobj);
389 r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
391 drm_gem_object_unreference_unlocked(gobj);
392 up_read(&rdev->exclusive_lock);
393 r = radeon_gem_handle_lockup(robj->rdev, r);
397 int radeon_mode_dumb_mmap(struct drm_file *filp,
398 struct drm_device *dev,
399 uint32_t handle, uint64_t *offset_p)
401 struct drm_gem_object *gobj;
402 struct radeon_bo *robj;
404 gobj = drm_gem_object_lookup(dev, filp, handle);
408 robj = gem_to_radeon_bo(gobj);
409 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm)) {
410 drm_gem_object_unreference_unlocked(gobj);
413 *offset_p = radeon_bo_mmap_offset(robj);
414 drm_gem_object_unreference_unlocked(gobj);
418 int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
419 struct drm_file *filp)
421 struct drm_radeon_gem_mmap *args = data;
423 return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
426 int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
427 struct drm_file *filp)
429 struct radeon_device *rdev = dev->dev_private;
430 struct drm_radeon_gem_busy *args = data;
431 struct drm_gem_object *gobj;
432 struct radeon_bo *robj;
434 uint32_t cur_placement = 0;
436 gobj = drm_gem_object_lookup(dev, filp, args->handle);
440 robj = gem_to_radeon_bo(gobj);
441 r = radeon_bo_wait(robj, &cur_placement, true);
442 args->domain = radeon_mem_type_to_domain(cur_placement);
443 drm_gem_object_unreference_unlocked(gobj);
444 r = radeon_gem_handle_lockup(rdev, r);
448 int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
449 struct drm_file *filp)
451 struct radeon_device *rdev = dev->dev_private;
452 struct drm_radeon_gem_wait_idle *args = data;
453 struct drm_gem_object *gobj;
454 struct radeon_bo *robj;
456 uint32_t cur_placement = 0;
459 gobj = drm_gem_object_lookup(dev, filp, args->handle);
463 robj = gem_to_radeon_bo(gobj);
465 ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true, 30 * HZ);
471 /* Flush HDP cache via MMIO if necessary */
472 if (rdev->asic->mmio_hdp_flush &&
473 radeon_mem_type_to_domain(cur_placement) == RADEON_GEM_DOMAIN_VRAM)
474 robj->rdev->asic->mmio_hdp_flush(rdev);
475 drm_gem_object_unreference_unlocked(gobj);
476 r = radeon_gem_handle_lockup(rdev, r);
480 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
481 struct drm_file *filp)
483 struct drm_radeon_gem_set_tiling *args = data;
484 struct drm_gem_object *gobj;
485 struct radeon_bo *robj;
488 DRM_DEBUG("%d \n", args->handle);
489 gobj = drm_gem_object_lookup(dev, filp, args->handle);
492 robj = gem_to_radeon_bo(gobj);
493 r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
494 drm_gem_object_unreference_unlocked(gobj);
498 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
499 struct drm_file *filp)
501 struct drm_radeon_gem_get_tiling *args = data;
502 struct drm_gem_object *gobj;
503 struct radeon_bo *rbo;
507 gobj = drm_gem_object_lookup(dev, filp, args->handle);
510 rbo = gem_to_radeon_bo(gobj);
511 r = radeon_bo_reserve(rbo, false);
512 if (unlikely(r != 0))
514 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
515 radeon_bo_unreserve(rbo);
517 drm_gem_object_unreference_unlocked(gobj);
521 int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
522 struct drm_file *filp)
524 struct drm_radeon_gem_va *args = data;
525 struct drm_gem_object *gobj;
526 struct radeon_device *rdev = dev->dev_private;
527 struct radeon_fpriv *fpriv = filp->driver_priv;
528 struct radeon_bo *rbo;
529 struct radeon_bo_va *bo_va;
533 if (!rdev->vm_manager.enabled) {
534 args->operation = RADEON_VA_RESULT_ERROR;
539 * We don't support vm_id yet, to be sure we don't have have broken
540 * userspace, reject anyone trying to use non 0 value thus moving
541 * forward we can use those fields without breaking existant userspace
544 args->operation = RADEON_VA_RESULT_ERROR;
548 if (args->offset < RADEON_VA_RESERVED_SIZE) {
549 dev_err(&dev->pdev->dev,
550 "offset 0x%lX is in reserved area 0x%X\n",
551 (unsigned long)args->offset,
552 RADEON_VA_RESERVED_SIZE);
553 args->operation = RADEON_VA_RESULT_ERROR;
557 /* don't remove, we need to enforce userspace to set the snooped flag
558 * otherwise we will endup with broken userspace and we won't be able
559 * to enable this feature without adding new interface
561 invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
562 if ((args->flags & invalid_flags)) {
563 dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
564 args->flags, invalid_flags);
565 args->operation = RADEON_VA_RESULT_ERROR;
569 switch (args->operation) {
571 case RADEON_VA_UNMAP:
574 dev_err(&dev->pdev->dev, "unsupported operation %d\n",
576 args->operation = RADEON_VA_RESULT_ERROR;
580 gobj = drm_gem_object_lookup(dev, filp, args->handle);
582 args->operation = RADEON_VA_RESULT_ERROR;
585 rbo = gem_to_radeon_bo(gobj);
586 r = radeon_bo_reserve(rbo, false);
588 args->operation = RADEON_VA_RESULT_ERROR;
589 drm_gem_object_unreference_unlocked(gobj);
592 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
594 args->operation = RADEON_VA_RESULT_ERROR;
595 drm_gem_object_unreference_unlocked(gobj);
599 switch (args->operation) {
601 if (bo_va->it.start) {
602 args->operation = RADEON_VA_RESULT_VA_EXIST;
603 args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE;
606 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
608 case RADEON_VA_UNMAP:
609 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
614 args->operation = RADEON_VA_RESULT_OK;
616 args->operation = RADEON_VA_RESULT_ERROR;
619 radeon_bo_unreserve(rbo);
620 drm_gem_object_unreference_unlocked(gobj);
624 int radeon_gem_op_ioctl(struct drm_device *dev, void *data,
625 struct drm_file *filp)
627 struct drm_radeon_gem_op *args = data;
628 struct drm_gem_object *gobj;
629 struct radeon_bo *robj;
632 gobj = drm_gem_object_lookup(dev, filp, args->handle);
636 robj = gem_to_radeon_bo(gobj);
639 if (radeon_ttm_tt_has_userptr(robj->tbo.ttm))
642 r = radeon_bo_reserve(robj, false);
647 case RADEON_GEM_OP_GET_INITIAL_DOMAIN:
648 args->value = robj->initial_domain;
650 case RADEON_GEM_OP_SET_INITIAL_DOMAIN:
651 robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM |
652 RADEON_GEM_DOMAIN_GTT |
653 RADEON_GEM_DOMAIN_CPU);
659 radeon_bo_unreserve(robj);
661 drm_gem_object_unreference_unlocked(gobj);
665 int radeon_mode_dumb_create(struct drm_file *file_priv,
666 struct drm_device *dev,
667 struct drm_mode_create_dumb *args)
669 struct radeon_device *rdev = dev->dev_private;
670 struct drm_gem_object *gobj;
674 args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
675 args->size = args->pitch * args->height;
676 args->size = ALIGN(args->size, PAGE_SIZE);
678 r = radeon_gem_object_create(rdev, args->size, 0,
679 RADEON_GEM_DOMAIN_VRAM, 0,
684 r = drm_gem_handle_create(file_priv, gobj, &handle);
685 /* drop reference from allocate - handle holds it now */
686 drm_gem_object_unreference_unlocked(gobj);
690 args->handle = handle;
694 #if defined(CONFIG_DEBUG_FS)
695 static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
697 struct drm_info_node *node = (struct drm_info_node *)m->private;
698 struct drm_device *dev = node->minor->dev;
699 struct radeon_device *rdev = dev->dev_private;
700 struct radeon_bo *rbo;
703 mutex_lock(&rdev->gem.mutex);
704 list_for_each_entry(rbo, &rdev->gem.objects, list) {
706 const char *placement;
708 domain = radeon_mem_type_to_domain(rbo->tbo.mem.mem_type);
710 case RADEON_GEM_DOMAIN_VRAM:
713 case RADEON_GEM_DOMAIN_GTT:
716 case RADEON_GEM_DOMAIN_CPU:
721 seq_printf(m, "bo[0x%08x] %8ldkB %8ldMB %s pid %8ld\n",
722 i, radeon_bo_size(rbo) >> 10, radeon_bo_size(rbo) >> 20,
723 placement, (unsigned long)rbo->pid);
726 mutex_unlock(&rdev->gem.mutex);
730 static struct drm_info_list radeon_debugfs_gem_list[] = {
731 {"radeon_gem_info", &radeon_debugfs_gem_info, 0, NULL},
735 int radeon_gem_debugfs_init(struct radeon_device *rdev)
737 #if defined(CONFIG_DEBUG_FS)
738 return radeon_debugfs_add_files(rdev, radeon_debugfs_gem_list, 1);