2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include <drm/drm_dp_helper.h>
36 #include <drm/drm_fixed.h>
37 #include <drm/drm_crtc_helper.h>
38 #include <linux/i2c.h>
39 #include <linux/i2c-algo-bit.h>
44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
45 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
46 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
47 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
49 enum radeon_rmx_type {
68 enum radeon_underscan_type {
81 RADEON_HPD_NONE = 0xff,
84 #define RADEON_MAX_I2C_BUS 16
86 /* radeon gpio-based i2c
87 * 1. "mask" reg and bits
88 * grabs the gpio pins for software use
93 * 3. "en" reg and bits
94 * sets the pin direction
100 struct radeon_i2c_bus_rec {
102 /* id used by atom */
104 /* id used by atom */
105 enum radeon_hpd_id hpd;
106 /* can be used with hw i2c engine */
108 /* uses multi-media i2c engine */
111 uint32_t mask_clk_reg;
112 uint32_t mask_data_reg;
116 uint32_t en_data_reg;
119 uint32_t mask_clk_mask;
120 uint32_t mask_data_mask;
122 uint32_t a_data_mask;
123 uint32_t en_clk_mask;
124 uint32_t en_data_mask;
126 uint32_t y_data_mask;
129 struct radeon_tmds_pll {
134 #define RADEON_MAX_BIOS_CONNECTOR 16
137 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
138 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
139 #define RADEON_PLL_USE_REF_DIV (1 << 2)
140 #define RADEON_PLL_LEGACY (1 << 3)
141 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
142 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
143 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
144 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
145 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
146 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
147 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
148 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
149 #define RADEON_PLL_USE_POST_DIV (1 << 12)
150 #define RADEON_PLL_IS_LCD (1 << 13)
151 #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
154 /* reference frequency */
155 uint32_t reference_freq;
158 uint32_t reference_div;
161 /* pll in/out limits */
164 uint32_t pll_out_min;
165 uint32_t pll_out_max;
166 uint32_t lcd_pll_out_min;
167 uint32_t lcd_pll_out_max;
171 uint32_t min_ref_div;
172 uint32_t max_ref_div;
173 uint32_t min_post_div;
174 uint32_t max_post_div;
175 uint32_t min_feedback_div;
176 uint32_t max_feedback_div;
177 uint32_t min_frac_feedback_div;
178 uint32_t max_frac_feedback_div;
180 /* flags for the current clock */
187 struct radeon_i2c_chan {
188 struct i2c_adapter adapter;
189 struct drm_device *dev;
191 struct i2c_algo_bit_data bit;
192 struct i2c_algo_dp_aux_data dp;
194 struct radeon_i2c_bus_rec rec;
197 /* mostly for macs, but really any system without connector tables */
198 enum radeon_connector_table {
202 CT_POWERBOOK_EXTERNAL,
203 CT_POWERBOOK_INTERNAL,
216 enum radeon_dvo_chip {
226 bool last_buffer_filled_status;
228 struct r600_audio_pin *pin;
231 struct radeon_mode_info {
232 struct atom_context *atom_context;
233 struct card_info *atom_card_info;
234 enum radeon_connector_table connector_table;
235 bool mode_config_initialized;
236 struct radeon_crtc *crtcs[6];
237 struct radeon_afmt *afmt[7];
238 /* DVI-I properties */
239 struct drm_property *coherent_mode_property;
240 /* DAC enable load detect */
241 struct drm_property *load_detect_property;
243 struct drm_property *tv_std_property;
244 /* legacy TMDS PLL detect */
245 struct drm_property *tmds_pll_property;
247 struct drm_property *underscan_property;
248 struct drm_property *underscan_hborder_property;
249 struct drm_property *underscan_vborder_property;
251 struct drm_property *audio_property;
253 struct drm_property *dither_property;
254 /* hardcoded DFP edid from BIOS */
255 struct edid *bios_hardcoded_edid;
256 int bios_hardcoded_edid_size;
258 /* pointer to fbdev info structure */
259 struct radeon_fbdev *rfbdev;
262 /* pointer to backlight encoder */
263 struct radeon_encoder *bl_encoder;
266 #define RADEON_MAX_BL_LEVEL 0xFF
268 #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
270 struct radeon_backlight_privdata {
271 struct radeon_encoder *encoder;
277 #define MAX_H_CODE_TIMING_LEN 32
278 #define MAX_V_CODE_TIMING_LEN 32
280 /* need to store these as reading
281 back code tables is excessive */
282 struct radeon_tv_regs {
284 uint32_t timing_cntl;
288 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
289 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
292 struct radeon_atom_ss {
294 uint16_t percentage_divider;
306 struct drm_crtc base;
308 u16 lut_r[256], lut_g[256], lut_b[256];
311 uint32_t crtc_offset;
312 struct drm_gem_object *cursor_bo;
313 uint64_t cursor_addr;
316 int max_cursor_width;
317 int max_cursor_height;
318 uint32_t legacy_display_base_addr;
319 uint32_t legacy_cursor_offset;
320 enum radeon_rmx_type rmx_type;
325 struct drm_display_mode native_mode;
328 struct radeon_unpin_work *unpin_work;
329 int deferred_flip_completion;
331 struct radeon_atom_ss ss;
335 u32 pll_reference_div;
338 struct drm_encoder *encoder;
339 struct drm_connector *connector;
344 struct drm_display_mode hw_mode;
347 struct radeon_encoder_primary_dac {
348 /* legacy primary dac */
349 uint32_t ps2_pdac_adj;
352 struct radeon_encoder_lvds {
354 uint16_t panel_vcc_delay;
355 uint8_t panel_pwr_delay;
356 uint8_t panel_digon_delay;
357 uint8_t panel_blon_delay;
358 uint16_t panel_ref_divider;
359 uint8_t panel_post_divider;
360 uint16_t panel_fb_divider;
361 bool use_bios_dividers;
362 uint32_t lvds_gen_cntl;
364 struct drm_display_mode native_mode;
365 struct backlight_device *bl_dev;
367 uint8_t backlight_level;
370 struct radeon_encoder_tv_dac {
372 uint32_t ps2_tvdac_adj;
373 uint32_t ntsc_tvdac_adj;
374 uint32_t pal_tvdac_adj;
379 int supported_tv_stds;
381 enum radeon_tv_std tv_std;
382 struct radeon_tv_regs tv;
385 struct radeon_encoder_int_tmds {
386 /* legacy int tmds */
387 struct radeon_tmds_pll tmds_pll[4];
390 struct radeon_encoder_ext_tmds {
392 struct radeon_i2c_chan *i2c_bus;
394 enum radeon_dvo_chip dvo_chip;
397 /* spread spectrum */
398 struct radeon_encoder_atom_dig {
402 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
405 uint16_t panel_pwr_delay;
408 struct drm_display_mode native_mode;
409 struct backlight_device *bl_dev;
411 uint8_t backlight_level;
413 struct radeon_afmt *afmt;
416 struct radeon_encoder_atom_dac {
417 enum radeon_tv_std tv_std;
420 struct radeon_encoder {
421 struct drm_encoder base;
422 uint32_t encoder_enum;
425 uint32_t active_device;
427 uint32_t pixel_clock;
428 enum radeon_rmx_type rmx_type;
429 enum radeon_underscan_type underscan_type;
430 uint32_t underscan_hborder;
431 uint32_t underscan_vborder;
432 struct drm_display_mode native_mode;
434 int audio_polling_active;
439 struct radeon_connector_atom_dig {
440 uint32_t igp_lane_info;
442 struct radeon_i2c_chan *dp_i2c_bus;
443 u8 dpcd[DP_RECEIVER_CAP_SIZE];
450 struct radeon_gpio_rec {
458 enum radeon_hpd_id hpd;
460 struct radeon_gpio_rec gpio;
463 struct radeon_router {
465 struct radeon_i2c_bus_rec i2c_info;
470 u8 ddc_mux_control_pin;
475 u8 cd_mux_control_pin;
479 enum radeon_connector_audio {
480 RADEON_AUDIO_DISABLE = 0,
481 RADEON_AUDIO_ENABLE = 1,
482 RADEON_AUDIO_AUTO = 2
485 enum radeon_connector_dither {
486 RADEON_FMT_DITHER_DISABLE = 0,
487 RADEON_FMT_DITHER_ENABLE = 1,
490 struct radeon_connector {
491 struct drm_connector base;
492 uint32_t connector_id;
494 struct radeon_i2c_chan *ddc_bus;
495 /* some systems have an hdmi and vga port with a shared ddc line */
498 /* we need to mind the EDID between detect
499 and get modes due to analog/digital/tvencoder */
502 bool dac_load_detect;
503 bool detected_by_load; /* if the connection status was determined by load */
504 uint16_t connector_object_id;
505 struct radeon_hpd hpd;
506 struct radeon_router router;
507 struct radeon_i2c_chan *router_bus;
508 enum radeon_connector_audio audio;
509 enum radeon_connector_dither dither;
512 struct radeon_framebuffer {
513 struct drm_framebuffer base;
514 struct drm_gem_object *obj;
517 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
518 ((em) == ATOM_ENCODER_MODE_DP_MST))
520 struct atom_clock_dividers {
526 u32 whole_fb_div : 12;
527 u32 frac_fb_div : 14;
529 u32 frac_fb_div : 14;
530 u32 whole_fb_div : 12;
537 bool enable_post_div;
546 struct atom_mpll_param {
570 #define MEM_TYPE_GDDR5 0x50
571 #define MEM_TYPE_GDDR4 0x40
572 #define MEM_TYPE_GDDR3 0x30
573 #define MEM_TYPE_DDR2 0x20
574 #define MEM_TYPE_GDDR1 0x10
575 #define MEM_TYPE_DDR3 0xb0
576 #define MEM_TYPE_MASK 0xf0
578 struct atom_memory_info {
583 #define MAX_AC_TIMING_ENTRIES 16
585 struct atom_memory_clock_range_table
589 u32 mclk[MAX_AC_TIMING_ENTRIES];
592 #define VBIOS_MC_REGISTER_ARRAY_SIZE 32
593 #define VBIOS_MAX_AC_TIMING_ENTRIES 20
595 struct atom_mc_reg_entry {
597 u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE];
600 struct atom_mc_register_address {
605 struct atom_mc_reg_table {
608 struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
609 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE];
612 #define MAX_VOLTAGE_ENTRIES 32
614 struct atom_voltage_table_entry
620 struct atom_voltage_table
625 struct atom_voltage_table_entry entries[MAX_VOLTAGE_ENTRIES];
630 radeon_add_atom_connector(struct drm_device *dev,
631 uint32_t connector_id,
632 uint32_t supported_device,
634 struct radeon_i2c_bus_rec *i2c_bus,
635 uint32_t igp_lane_info,
636 uint16_t connector_object_id,
637 struct radeon_hpd *hpd,
638 struct radeon_router *router);
640 radeon_add_legacy_connector(struct drm_device *dev,
641 uint32_t connector_id,
642 uint32_t supported_device,
644 struct radeon_i2c_bus_rec *i2c_bus,
645 uint16_t connector_object_id,
646 struct radeon_hpd *hpd);
648 radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device,
650 extern void radeon_link_encoder_connector(struct drm_device *dev);
652 extern enum radeon_tv_std
653 radeon_combios_get_tv_info(struct radeon_device *rdev);
654 extern enum radeon_tv_std
655 radeon_atombios_get_tv_info(struct radeon_device *rdev);
656 extern void radeon_atombios_get_default_voltages(struct radeon_device *rdev,
657 u16 *vddc, u16 *vddci, u16 *mvdd);
660 radeon_combios_connected_scratch_regs(struct drm_connector *connector,
661 struct drm_encoder *encoder,
664 radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
665 struct drm_encoder *encoder,
668 extern struct drm_connector *
669 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
670 extern struct drm_connector *
671 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder);
672 extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
675 extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
676 extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);
677 extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);
678 extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
679 extern int radeon_get_monitor_bpc(struct drm_connector *connector);
681 extern void radeon_connector_hotplug(struct drm_connector *connector);
682 extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
683 struct drm_display_mode *mode);
684 extern void radeon_dp_set_link_config(struct drm_connector *connector,
685 const struct drm_display_mode *mode);
686 extern void radeon_dp_link_train(struct drm_encoder *encoder,
687 struct drm_connector *connector);
688 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
689 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
690 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
691 extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
692 struct drm_connector *connector);
693 extern void radeon_dp_set_rx_power_state(struct drm_connector *connector,
695 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
696 extern void radeon_atom_encoder_init(struct radeon_device *rdev);
697 extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
698 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
699 int action, uint8_t lane_num,
701 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
702 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
703 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
704 u8 write_byte, u8 *read_byte);
705 void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
707 extern void radeon_i2c_init(struct radeon_device *rdev);
708 extern void radeon_i2c_fini(struct radeon_device *rdev);
709 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
710 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
711 extern void radeon_i2c_add(struct radeon_device *rdev,
712 struct radeon_i2c_bus_rec *rec,
714 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
715 struct radeon_i2c_bus_rec *i2c_bus);
716 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
717 struct radeon_i2c_bus_rec *rec,
719 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
720 struct radeon_i2c_bus_rec *rec,
722 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
723 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
727 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
731 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
732 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
733 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux);
734 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
736 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
738 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
739 struct radeon_atom_ss *ss,
741 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
742 struct radeon_atom_ss *ss,
745 extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
747 uint32_t *dot_clock_p,
749 uint32_t *frac_fb_div_p,
751 uint32_t *post_div_p);
753 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
761 extern void radeon_setup_encoder_clones(struct drm_device *dev);
763 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
764 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
765 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
766 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
767 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
768 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
769 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
770 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
771 extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
772 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
774 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
775 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
776 struct drm_framebuffer *old_fb);
777 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
778 struct drm_framebuffer *fb,
780 enum mode_set_atomic state);
781 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
782 struct drm_display_mode *mode,
783 struct drm_display_mode *adjusted_mode,
785 struct drm_framebuffer *old_fb);
786 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
788 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
789 struct drm_framebuffer *old_fb);
790 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
791 struct drm_framebuffer *fb,
793 enum mode_set_atomic state);
794 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
795 struct drm_framebuffer *fb,
796 int x, int y, int atomic);
797 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
798 struct drm_file *file_priv,
802 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
805 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
807 int *vpos, int *hpos, ktime_t *stime,
810 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
812 radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
813 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
814 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
815 extern struct radeon_encoder_atom_dig *
816 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
817 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
818 struct radeon_encoder_int_tmds *tmds);
819 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
820 struct radeon_encoder_int_tmds *tmds);
821 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
822 struct radeon_encoder_int_tmds *tmds);
823 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
824 struct radeon_encoder_ext_tmds *tmds);
825 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
826 struct radeon_encoder_ext_tmds *tmds);
827 extern struct radeon_encoder_primary_dac *
828 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
829 extern struct radeon_encoder_tv_dac *
830 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
831 extern struct radeon_encoder_lvds *
832 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
833 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
834 extern struct radeon_encoder_tv_dac *
835 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
836 extern struct radeon_encoder_primary_dac *
837 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
838 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
839 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
840 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
841 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
842 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
843 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
844 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
845 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
847 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
849 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
851 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
853 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
854 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
855 u16 blue, int regno);
856 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
857 u16 *blue, int regno);
858 int radeon_framebuffer_init(struct drm_device *dev,
859 struct radeon_framebuffer *rfb,
860 struct drm_mode_fb_cmd2 *mode_cmd,
861 struct drm_gem_object *obj);
863 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
864 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
865 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
866 void radeon_atombios_init_crtc(struct drm_device *dev,
867 struct radeon_crtc *radeon_crtc);
868 void radeon_legacy_init_crtc(struct drm_device *dev,
869 struct radeon_crtc *radeon_crtc);
871 void radeon_get_clock_info(struct drm_device *dev);
873 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
874 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
876 void radeon_enc_destroy(struct drm_encoder *encoder);
877 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
878 void radeon_combios_asic_init(struct drm_device *dev);
879 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
880 const struct drm_display_mode *mode,
881 struct drm_display_mode *adjusted_mode);
882 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
883 struct drm_display_mode *adjusted_mode);
884 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
887 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
888 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
889 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
890 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
891 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
892 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
893 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
894 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
895 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
896 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
897 struct drm_display_mode *mode,
898 struct drm_display_mode *adjusted_mode);
901 void avivo_program_fmt(struct drm_encoder *encoder);
902 void dce3_program_fmt(struct drm_encoder *encoder);
903 void dce4_program_fmt(struct drm_encoder *encoder);
904 void dce8_program_fmt(struct drm_encoder *encoder);
907 int radeon_fbdev_init(struct radeon_device *rdev);
908 void radeon_fbdev_fini(struct radeon_device *rdev);
909 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
910 int radeon_fbdev_total_size(struct radeon_device *rdev);
911 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
913 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
915 void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
917 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);