2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include <drm/drm_dp_helper.h>
36 #include <drm/drm_fixed.h>
37 #include <drm/drm_crtc_helper.h>
38 #include <linux/i2c.h>
39 #include <linux/i2c-algo-bit.h>
44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
45 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
46 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
47 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
49 #define RADEON_MAX_HPD_PINS 7
50 #define RADEON_MAX_CRTCS 6
51 #define RADEON_MAX_AFMT_BLOCKS 7
53 enum radeon_rmx_type {
72 enum radeon_underscan_type {
85 RADEON_HPD_NONE = 0xff,
88 #define RADEON_MAX_I2C_BUS 16
90 /* radeon gpio-based i2c
91 * 1. "mask" reg and bits
92 * grabs the gpio pins for software use
97 * 3. "en" reg and bits
98 * sets the pin direction
100 * 4. "y" reg and bits
104 struct radeon_i2c_bus_rec {
106 /* id used by atom */
108 /* id used by atom */
109 enum radeon_hpd_id hpd;
110 /* can be used with hw i2c engine */
112 /* uses multi-media i2c engine */
115 uint32_t mask_clk_reg;
116 uint32_t mask_data_reg;
120 uint32_t en_data_reg;
123 uint32_t mask_clk_mask;
124 uint32_t mask_data_mask;
126 uint32_t a_data_mask;
127 uint32_t en_clk_mask;
128 uint32_t en_data_mask;
130 uint32_t y_data_mask;
133 struct radeon_tmds_pll {
138 #define RADEON_MAX_BIOS_CONNECTOR 16
141 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
142 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
143 #define RADEON_PLL_USE_REF_DIV (1 << 2)
144 #define RADEON_PLL_LEGACY (1 << 3)
145 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
146 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
147 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
148 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
149 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
150 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
151 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
152 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
153 #define RADEON_PLL_USE_POST_DIV (1 << 12)
154 #define RADEON_PLL_IS_LCD (1 << 13)
155 #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
158 /* reference frequency */
159 uint32_t reference_freq;
162 uint32_t reference_div;
165 /* pll in/out limits */
168 uint32_t pll_out_min;
169 uint32_t pll_out_max;
170 uint32_t lcd_pll_out_min;
171 uint32_t lcd_pll_out_max;
175 uint32_t min_ref_div;
176 uint32_t max_ref_div;
177 uint32_t min_post_div;
178 uint32_t max_post_div;
179 uint32_t min_feedback_div;
180 uint32_t max_feedback_div;
181 uint32_t min_frac_feedback_div;
182 uint32_t max_frac_feedback_div;
184 /* flags for the current clock */
191 struct radeon_i2c_chan {
192 struct i2c_adapter adapter;
193 struct drm_device *dev;
194 struct i2c_algo_bit_data bit;
195 struct radeon_i2c_bus_rec rec;
196 struct drm_dp_aux aux;
201 /* mostly for macs, but really any system without connector tables */
202 enum radeon_connector_table {
206 CT_POWERBOOK_EXTERNAL,
207 CT_POWERBOOK_INTERNAL,
220 enum radeon_dvo_chip {
230 bool last_buffer_filled_status;
232 struct r600_audio_pin *pin;
235 struct radeon_mode_info {
236 struct atom_context *atom_context;
237 struct card_info *atom_card_info;
238 enum radeon_connector_table connector_table;
239 bool mode_config_initialized;
240 struct radeon_crtc *crtcs[RADEON_MAX_CRTCS];
241 struct radeon_afmt *afmt[RADEON_MAX_AFMT_BLOCKS];
242 /* DVI-I properties */
243 struct drm_property *coherent_mode_property;
244 /* DAC enable load detect */
245 struct drm_property *load_detect_property;
247 struct drm_property *tv_std_property;
248 /* legacy TMDS PLL detect */
249 struct drm_property *tmds_pll_property;
251 struct drm_property *underscan_property;
252 struct drm_property *underscan_hborder_property;
253 struct drm_property *underscan_vborder_property;
255 struct drm_property *audio_property;
257 struct drm_property *dither_property;
258 /* hardcoded DFP edid from BIOS */
259 struct edid *bios_hardcoded_edid;
260 int bios_hardcoded_edid_size;
262 /* pointer to fbdev info structure */
263 struct radeon_fbdev *rfbdev;
266 /* pointer to backlight encoder */
267 struct radeon_encoder *bl_encoder;
270 #define RADEON_MAX_BL_LEVEL 0xFF
272 #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
274 struct radeon_backlight_privdata {
275 struct radeon_encoder *encoder;
281 #define MAX_H_CODE_TIMING_LEN 32
282 #define MAX_V_CODE_TIMING_LEN 32
284 /* need to store these as reading
285 back code tables is excessive */
286 struct radeon_tv_regs {
288 uint32_t timing_cntl;
292 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
293 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
296 struct radeon_atom_ss {
298 uint16_t percentage_divider;
309 enum radeon_flip_status {
312 RADEON_FLIP_SUBMITTED
316 struct drm_crtc base;
318 u16 lut_r[256], lut_g[256], lut_b[256];
321 uint32_t crtc_offset;
322 struct drm_gem_object *cursor_bo;
323 uint64_t cursor_addr;
326 int max_cursor_width;
327 int max_cursor_height;
328 uint32_t legacy_display_base_addr;
329 uint32_t legacy_cursor_offset;
330 enum radeon_rmx_type rmx_type;
335 struct drm_display_mode native_mode;
338 struct workqueue_struct *flip_queue;
339 struct radeon_flip_work *flip_work;
340 enum radeon_flip_status flip_status;
342 struct radeon_atom_ss ss;
346 u32 pll_reference_div;
349 struct drm_encoder *encoder;
350 struct drm_connector *connector;
355 struct drm_display_mode hw_mode;
358 struct radeon_encoder_primary_dac {
359 /* legacy primary dac */
360 uint32_t ps2_pdac_adj;
363 struct radeon_encoder_lvds {
365 uint16_t panel_vcc_delay;
366 uint8_t panel_pwr_delay;
367 uint8_t panel_digon_delay;
368 uint8_t panel_blon_delay;
369 uint16_t panel_ref_divider;
370 uint8_t panel_post_divider;
371 uint16_t panel_fb_divider;
372 bool use_bios_dividers;
373 uint32_t lvds_gen_cntl;
375 struct drm_display_mode native_mode;
376 struct backlight_device *bl_dev;
378 uint8_t backlight_level;
381 struct radeon_encoder_tv_dac {
383 uint32_t ps2_tvdac_adj;
384 uint32_t ntsc_tvdac_adj;
385 uint32_t pal_tvdac_adj;
390 int supported_tv_stds;
392 enum radeon_tv_std tv_std;
393 struct radeon_tv_regs tv;
396 struct radeon_encoder_int_tmds {
397 /* legacy int tmds */
398 struct radeon_tmds_pll tmds_pll[4];
401 struct radeon_encoder_ext_tmds {
403 struct radeon_i2c_chan *i2c_bus;
405 enum radeon_dvo_chip dvo_chip;
408 /* spread spectrum */
409 struct radeon_encoder_atom_dig {
413 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
416 uint16_t panel_pwr_delay;
419 struct drm_display_mode native_mode;
420 struct backlight_device *bl_dev;
422 uint8_t backlight_level;
424 struct radeon_afmt *afmt;
427 struct radeon_encoder_atom_dac {
428 enum radeon_tv_std tv_std;
431 struct radeon_encoder {
432 struct drm_encoder base;
433 uint32_t encoder_enum;
436 uint32_t active_device;
438 uint32_t pixel_clock;
439 enum radeon_rmx_type rmx_type;
440 enum radeon_underscan_type underscan_type;
441 uint32_t underscan_hborder;
442 uint32_t underscan_vborder;
443 struct drm_display_mode native_mode;
445 int audio_polling_active;
450 struct radeon_connector_atom_dig {
451 uint32_t igp_lane_info;
453 u8 dpcd[DP_RECEIVER_CAP_SIZE];
460 struct radeon_gpio_rec {
468 enum radeon_hpd_id hpd;
470 struct radeon_gpio_rec gpio;
473 struct radeon_router {
475 struct radeon_i2c_bus_rec i2c_info;
480 u8 ddc_mux_control_pin;
485 u8 cd_mux_control_pin;
489 enum radeon_connector_audio {
490 RADEON_AUDIO_DISABLE = 0,
491 RADEON_AUDIO_ENABLE = 1,
492 RADEON_AUDIO_AUTO = 2
495 enum radeon_connector_dither {
496 RADEON_FMT_DITHER_DISABLE = 0,
497 RADEON_FMT_DITHER_ENABLE = 1,
500 struct radeon_connector {
501 struct drm_connector base;
502 uint32_t connector_id;
504 struct radeon_i2c_chan *ddc_bus;
505 /* some systems have an hdmi and vga port with a shared ddc line */
508 /* we need to mind the EDID between detect
509 and get modes due to analog/digital/tvencoder */
512 bool dac_load_detect;
513 bool detected_by_load; /* if the connection status was determined by load */
514 uint16_t connector_object_id;
515 struct radeon_hpd hpd;
516 struct radeon_router router;
517 struct radeon_i2c_chan *router_bus;
518 enum radeon_connector_audio audio;
519 enum radeon_connector_dither dither;
520 int pixelclock_for_modeset;
523 struct radeon_framebuffer {
524 struct drm_framebuffer base;
525 struct drm_gem_object *obj;
528 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
529 ((em) == ATOM_ENCODER_MODE_DP_MST))
531 struct atom_clock_dividers {
537 u32 whole_fb_div : 12;
538 u32 frac_fb_div : 14;
540 u32 frac_fb_div : 14;
541 u32 whole_fb_div : 12;
548 bool enable_post_div;
557 struct atom_mpll_param {
581 #define MEM_TYPE_GDDR5 0x50
582 #define MEM_TYPE_GDDR4 0x40
583 #define MEM_TYPE_GDDR3 0x30
584 #define MEM_TYPE_DDR2 0x20
585 #define MEM_TYPE_GDDR1 0x10
586 #define MEM_TYPE_DDR3 0xb0
587 #define MEM_TYPE_MASK 0xf0
589 struct atom_memory_info {
594 #define MAX_AC_TIMING_ENTRIES 16
596 struct atom_memory_clock_range_table
600 u32 mclk[MAX_AC_TIMING_ENTRIES];
603 #define VBIOS_MC_REGISTER_ARRAY_SIZE 32
604 #define VBIOS_MAX_AC_TIMING_ENTRIES 20
606 struct atom_mc_reg_entry {
608 u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE];
611 struct atom_mc_register_address {
616 struct atom_mc_reg_table {
619 struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
620 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE];
623 #define MAX_VOLTAGE_ENTRIES 32
625 struct atom_voltage_table_entry
631 struct atom_voltage_table
636 struct atom_voltage_table_entry entries[MAX_VOLTAGE_ENTRIES];
641 radeon_add_atom_connector(struct drm_device *dev,
642 uint32_t connector_id,
643 uint32_t supported_device,
645 struct radeon_i2c_bus_rec *i2c_bus,
646 uint32_t igp_lane_info,
647 uint16_t connector_object_id,
648 struct radeon_hpd *hpd,
649 struct radeon_router *router);
651 radeon_add_legacy_connector(struct drm_device *dev,
652 uint32_t connector_id,
653 uint32_t supported_device,
655 struct radeon_i2c_bus_rec *i2c_bus,
656 uint16_t connector_object_id,
657 struct radeon_hpd *hpd);
659 radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device,
661 extern void radeon_link_encoder_connector(struct drm_device *dev);
663 extern enum radeon_tv_std
664 radeon_combios_get_tv_info(struct radeon_device *rdev);
665 extern enum radeon_tv_std
666 radeon_atombios_get_tv_info(struct radeon_device *rdev);
667 extern void radeon_atombios_get_default_voltages(struct radeon_device *rdev,
668 u16 *vddc, u16 *vddci, u16 *mvdd);
671 radeon_combios_connected_scratch_regs(struct drm_connector *connector,
672 struct drm_encoder *encoder,
675 radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
676 struct drm_encoder *encoder,
679 extern struct drm_connector *
680 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
681 extern struct drm_connector *
682 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder);
683 extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
686 extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
687 extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);
688 extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);
689 extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
690 extern int radeon_get_monitor_bpc(struct drm_connector *connector);
692 extern void radeon_connector_hotplug(struct drm_connector *connector);
693 extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
694 struct drm_display_mode *mode);
695 extern void radeon_dp_set_link_config(struct drm_connector *connector,
696 const struct drm_display_mode *mode);
697 extern void radeon_dp_link_train(struct drm_encoder *encoder,
698 struct drm_connector *connector);
699 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
700 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
701 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
702 extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
703 struct drm_connector *connector);
704 extern void radeon_dp_set_rx_power_state(struct drm_connector *connector,
706 extern void radeon_dp_aux_init(struct radeon_connector *radeon_connector);
707 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
708 extern void radeon_atom_encoder_init(struct radeon_device *rdev);
709 extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
710 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
711 int action, uint8_t lane_num,
713 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
714 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
715 void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
717 extern void radeon_i2c_init(struct radeon_device *rdev);
718 extern void radeon_i2c_fini(struct radeon_device *rdev);
719 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
720 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
721 extern void radeon_i2c_add(struct radeon_device *rdev,
722 struct radeon_i2c_bus_rec *rec,
724 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
725 struct radeon_i2c_bus_rec *i2c_bus);
726 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
727 struct radeon_i2c_bus_rec *rec,
729 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
730 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
734 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
738 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
739 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
740 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux);
741 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
743 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
745 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
746 struct radeon_atom_ss *ss,
748 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
749 struct radeon_atom_ss *ss,
752 extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
754 uint32_t *dot_clock_p,
756 uint32_t *frac_fb_div_p,
758 uint32_t *post_div_p);
760 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
768 extern void radeon_setup_encoder_clones(struct drm_device *dev);
770 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
771 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
772 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
773 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
774 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
775 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
776 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
777 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
778 extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
779 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
781 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
782 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
783 struct drm_framebuffer *old_fb);
784 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
785 struct drm_framebuffer *fb,
787 enum mode_set_atomic state);
788 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
789 struct drm_display_mode *mode,
790 struct drm_display_mode *adjusted_mode,
792 struct drm_framebuffer *old_fb);
793 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
795 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
796 struct drm_framebuffer *old_fb);
797 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
798 struct drm_framebuffer *fb,
800 enum mode_set_atomic state);
801 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
802 struct drm_framebuffer *fb,
803 int x, int y, int atomic);
804 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
805 struct drm_file *file_priv,
809 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
812 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
814 int *vpos, int *hpos, ktime_t *stime,
817 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
819 radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
820 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
821 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
822 extern struct radeon_encoder_atom_dig *
823 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
824 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
825 struct radeon_encoder_int_tmds *tmds);
826 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
827 struct radeon_encoder_int_tmds *tmds);
828 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
829 struct radeon_encoder_int_tmds *tmds);
830 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
831 struct radeon_encoder_ext_tmds *tmds);
832 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
833 struct radeon_encoder_ext_tmds *tmds);
834 extern struct radeon_encoder_primary_dac *
835 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
836 extern struct radeon_encoder_tv_dac *
837 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
838 extern struct radeon_encoder_lvds *
839 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
840 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
841 extern struct radeon_encoder_tv_dac *
842 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
843 extern struct radeon_encoder_primary_dac *
844 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
845 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
846 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
847 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
848 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
849 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
850 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
851 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
852 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
854 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
856 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
858 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
860 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
861 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
862 u16 blue, int regno);
863 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
864 u16 *blue, int regno);
865 int radeon_framebuffer_init(struct drm_device *dev,
866 struct radeon_framebuffer *rfb,
867 struct drm_mode_fb_cmd2 *mode_cmd,
868 struct drm_gem_object *obj);
870 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
871 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
872 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
873 void radeon_atombios_init_crtc(struct drm_device *dev,
874 struct radeon_crtc *radeon_crtc);
875 void radeon_legacy_init_crtc(struct drm_device *dev,
876 struct radeon_crtc *radeon_crtc);
878 void radeon_get_clock_info(struct drm_device *dev);
880 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
881 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
883 void radeon_enc_destroy(struct drm_encoder *encoder);
884 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
885 void radeon_combios_asic_init(struct drm_device *dev);
886 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
887 const struct drm_display_mode *mode,
888 struct drm_display_mode *adjusted_mode);
889 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
890 struct drm_display_mode *adjusted_mode);
891 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
894 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
895 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
896 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
897 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
898 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
899 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
900 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
901 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
902 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
903 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
904 struct drm_display_mode *mode,
905 struct drm_display_mode *adjusted_mode);
908 void avivo_program_fmt(struct drm_encoder *encoder);
909 void dce3_program_fmt(struct drm_encoder *encoder);
910 void dce4_program_fmt(struct drm_encoder *encoder);
911 void dce8_program_fmt(struct drm_encoder *encoder);
914 int radeon_fbdev_init(struct radeon_device *rdev);
915 void radeon_fbdev_fini(struct radeon_device *rdev);
916 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
917 int radeon_fbdev_total_size(struct radeon_device *rdev);
918 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
920 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
922 void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id);
923 void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
925 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);