2 * Copyright 2009 VMware, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Michel Dänzer
25 #include <drm/radeon_drm.h>
26 #include "radeon_reg.h"
30 /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
31 void radeon_test_moves(struct radeon_device *rdev)
33 struct radeon_bo *vram_obj = NULL;
34 struct radeon_bo **gtt_obj = NULL;
35 struct radeon_fence *fence = NULL;
36 uint64_t gtt_addr, vram_addr;
43 * (Total GTT - IB pool - writeback page - ring buffers) / test size
45 n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024;
46 for (i = 0; i < RADEON_NUM_RINGS; ++i)
47 n -= rdev->ring[i].ring_size;
49 n -= RADEON_GPU_PAGE_SIZE;
50 if (rdev->ih.ring_obj)
51 n -= rdev->ih.ring_size;
54 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
56 DRM_ERROR("Failed to allocate %d pointers\n", n);
61 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
64 DRM_ERROR("Failed to create VRAM object\n");
67 r = radeon_bo_reserve(vram_obj, false);
70 r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
72 DRM_ERROR("Failed to pin VRAM object\n");
75 for (i = 0; i < n; i++) {
76 void *gtt_map, *vram_map;
77 void **gtt_start, **gtt_end;
78 void **vram_start, **vram_end;
80 r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
81 RADEON_GEM_DOMAIN_GTT, NULL, gtt_obj + i);
83 DRM_ERROR("Failed to create GTT object %d\n", i);
87 r = radeon_bo_reserve(gtt_obj[i], false);
90 r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, >t_addr);
92 DRM_ERROR("Failed to pin GTT object %d\n", i);
96 r = radeon_bo_kmap(gtt_obj[i], >t_map);
98 DRM_ERROR("Failed to map GTT object %d\n", i);
102 for (gtt_start = gtt_map, gtt_end = gtt_map + size;
105 *gtt_start = gtt_start;
107 radeon_bo_kunmap(gtt_obj[i]);
109 r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
111 DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
115 r = radeon_fence_wait(fence, false);
117 DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
121 radeon_fence_unref(&fence);
123 r = radeon_bo_kmap(vram_obj, &vram_map);
125 DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
129 for (gtt_start = gtt_map, gtt_end = gtt_map + size,
130 vram_start = vram_map, vram_end = vram_map + size;
131 vram_start < vram_end;
132 gtt_start++, vram_start++) {
133 if (*vram_start != gtt_start) {
134 DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
135 "expected 0x%p (GTT/VRAM offset "
136 "0x%16llx/0x%16llx)\n",
137 i, *vram_start, gtt_start,
139 (gtt_addr - rdev->mc.gtt_start +
140 (void*)gtt_start - gtt_map),
142 (vram_addr - rdev->mc.vram_start +
143 (void*)gtt_start - gtt_map));
144 radeon_bo_kunmap(vram_obj);
147 *vram_start = vram_start;
150 radeon_bo_kunmap(vram_obj);
152 r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
154 DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
158 r = radeon_fence_wait(fence, false);
160 DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
164 radeon_fence_unref(&fence);
166 r = radeon_bo_kmap(gtt_obj[i], >t_map);
168 DRM_ERROR("Failed to map GTT object after copy %d\n", i);
172 for (gtt_start = gtt_map, gtt_end = gtt_map + size,
173 vram_start = vram_map, vram_end = vram_map + size;
175 gtt_start++, vram_start++) {
176 if (*gtt_start != vram_start) {
177 DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
178 "expected 0x%p (VRAM/GTT offset "
179 "0x%16llx/0x%16llx)\n",
180 i, *gtt_start, vram_start,
182 (vram_addr - rdev->mc.vram_start +
183 (void*)vram_start - vram_map),
185 (gtt_addr - rdev->mc.gtt_start +
186 (void*)vram_start - vram_map));
187 radeon_bo_kunmap(gtt_obj[i]);
192 radeon_bo_kunmap(gtt_obj[i]);
194 DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
195 gtt_addr - rdev->mc.gtt_start);
200 if (radeon_bo_is_reserved(vram_obj)) {
201 radeon_bo_unpin(vram_obj);
202 radeon_bo_unreserve(vram_obj);
204 radeon_bo_unref(&vram_obj);
207 for (i = 0; i < n; i++) {
209 if (radeon_bo_is_reserved(gtt_obj[i])) {
210 radeon_bo_unpin(gtt_obj[i]);
211 radeon_bo_unreserve(gtt_obj[i]);
213 radeon_bo_unref(>t_obj[i]);
219 radeon_fence_unref(&fence);
222 printk(KERN_WARNING "Error while testing BO move.\n");
226 void radeon_test_ring_sync(struct radeon_device *rdev,
227 struct radeon_ring *ringA,
228 struct radeon_ring *ringB)
230 struct radeon_fence *fence1 = NULL, *fence2 = NULL;
231 struct radeon_semaphore *semaphore = NULL;
232 int ridxA = radeon_ring_index(rdev, ringA);
233 int ridxB = radeon_ring_index(rdev, ringB);
236 r = radeon_semaphore_create(rdev, &semaphore);
238 DRM_ERROR("Failed to create semaphore\n");
242 r = radeon_ring_lock(rdev, ringA, 64);
244 DRM_ERROR("Failed to lock ring A %d\n", ridxA);
247 radeon_semaphore_emit_wait(rdev, ridxA, semaphore);
248 r = radeon_fence_emit(rdev, &fence1, ridxA);
250 DRM_ERROR("Failed to emit fence 1\n");
251 radeon_ring_unlock_undo(rdev, ringA);
254 radeon_semaphore_emit_wait(rdev, ridxA, semaphore);
255 r = radeon_fence_emit(rdev, &fence2, ridxA);
257 DRM_ERROR("Failed to emit fence 2\n");
258 radeon_ring_unlock_undo(rdev, ringA);
261 radeon_ring_unlock_commit(rdev, ringA);
265 if (radeon_fence_signaled(fence1)) {
266 DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n");
270 r = radeon_ring_lock(rdev, ringB, 64);
272 DRM_ERROR("Failed to lock ring B %p\n", ringB);
275 radeon_semaphore_emit_signal(rdev, ridxB, semaphore);
276 radeon_ring_unlock_commit(rdev, ringB);
278 r = radeon_fence_wait(fence1, false);
280 DRM_ERROR("Failed to wait for sync fence 1\n");
286 if (radeon_fence_signaled(fence2)) {
287 DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n");
291 r = radeon_ring_lock(rdev, ringB, 64);
293 DRM_ERROR("Failed to lock ring B %p\n", ringB);
296 radeon_semaphore_emit_signal(rdev, ridxB, semaphore);
297 radeon_ring_unlock_commit(rdev, ringB);
299 r = radeon_fence_wait(fence2, false);
301 DRM_ERROR("Failed to wait for sync fence 1\n");
306 radeon_semaphore_free(rdev, &semaphore, NULL);
309 radeon_fence_unref(&fence1);
312 radeon_fence_unref(&fence2);
315 printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
318 void radeon_test_ring_sync2(struct radeon_device *rdev,
319 struct radeon_ring *ringA,
320 struct radeon_ring *ringB,
321 struct radeon_ring *ringC)
323 struct radeon_fence *fenceA = NULL, *fenceB = NULL;
324 struct radeon_semaphore *semaphore = NULL;
325 int ridxA = radeon_ring_index(rdev, ringA);
326 int ridxB = radeon_ring_index(rdev, ringB);
327 int ridxC = radeon_ring_index(rdev, ringC);
331 r = radeon_semaphore_create(rdev, &semaphore);
333 DRM_ERROR("Failed to create semaphore\n");
337 r = radeon_ring_lock(rdev, ringA, 64);
339 DRM_ERROR("Failed to lock ring A %d\n", ridxA);
342 radeon_semaphore_emit_wait(rdev, ridxA, semaphore);
343 r = radeon_fence_emit(rdev, &fenceA, ridxA);
345 DRM_ERROR("Failed to emit sync fence 1\n");
346 radeon_ring_unlock_undo(rdev, ringA);
349 radeon_ring_unlock_commit(rdev, ringA);
351 r = radeon_ring_lock(rdev, ringB, 64);
353 DRM_ERROR("Failed to lock ring B %d\n", ridxB);
356 radeon_semaphore_emit_wait(rdev, ridxB, semaphore);
357 r = radeon_fence_emit(rdev, &fenceB, ridxB);
359 DRM_ERROR("Failed to create sync fence 2\n");
360 radeon_ring_unlock_undo(rdev, ringB);
363 radeon_ring_unlock_commit(rdev, ringB);
367 if (radeon_fence_signaled(fenceA)) {
368 DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
371 if (radeon_fence_signaled(fenceB)) {
372 DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
376 r = radeon_ring_lock(rdev, ringC, 64);
378 DRM_ERROR("Failed to lock ring B %p\n", ringC);
381 radeon_semaphore_emit_signal(rdev, ridxC, semaphore);
382 radeon_ring_unlock_commit(rdev, ringC);
384 for (i = 0; i < 30; ++i) {
386 sigA = radeon_fence_signaled(fenceA);
387 sigB = radeon_fence_signaled(fenceB);
392 if (!sigA && !sigB) {
393 DRM_ERROR("Neither fence A nor B has been signaled\n");
395 } else if (sigA && sigB) {
396 DRM_ERROR("Both fence A and B has been signaled\n");
400 DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B');
402 r = radeon_ring_lock(rdev, ringC, 64);
404 DRM_ERROR("Failed to lock ring B %p\n", ringC);
407 radeon_semaphore_emit_signal(rdev, ridxC, semaphore);
408 radeon_ring_unlock_commit(rdev, ringC);
412 r = radeon_fence_wait(fenceA, false);
414 DRM_ERROR("Failed to wait for sync fence A\n");
417 r = radeon_fence_wait(fenceB, false);
419 DRM_ERROR("Failed to wait for sync fence B\n");
424 radeon_semaphore_free(rdev, &semaphore, NULL);
427 radeon_fence_unref(&fenceA);
430 radeon_fence_unref(&fenceB);
433 printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
436 void radeon_test_syncing(struct radeon_device *rdev)
440 for (i = 1; i < RADEON_NUM_RINGS; ++i) {
441 struct radeon_ring *ringA = &rdev->ring[i];
445 for (j = 0; j < i; ++j) {
446 struct radeon_ring *ringB = &rdev->ring[j];
450 DRM_INFO("Testing syncing between rings %d and %d...\n", i, j);
451 radeon_test_ring_sync(rdev, ringA, ringB);
453 DRM_INFO("Testing syncing between rings %d and %d...\n", j, i);
454 radeon_test_ring_sync(rdev, ringB, ringA);
456 for (k = 0; k < j; ++k) {
457 struct radeon_ring *ringC = &rdev->ring[k];
461 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k);
462 radeon_test_ring_sync2(rdev, ringA, ringB, ringC);
464 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j);
465 radeon_test_ring_sync2(rdev, ringA, ringC, ringB);
467 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k);
468 radeon_test_ring_sync2(rdev, ringB, ringA, ringC);
470 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i);
471 radeon_test_ring_sync2(rdev, ringB, ringC, ringA);
473 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j);
474 radeon_test_ring_sync2(rdev, ringC, ringA, ringB);
476 DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i);
477 radeon_test_ring_sync2(rdev, ringC, ringB, ringA);