drivers/gpu/drm/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32 #include <ttm/ttm_bo_api.h>
  33 #include <ttm/ttm_bo_driver.h>
  34 #include <ttm/ttm_placement.h>
  35 #include <ttm/ttm_module.h>
  36 #include <ttm/ttm_page_alloc.h>
  37 #include <drm/drmP.h>
  38 #include <drm/radeon_drm.h>
  39 #include <linux/seq_file.h>
  40 #include <linux/slab.h>
  41 #include <linux/swiotlb.h>
  42 #include <linux/swap.h>
  43 #include <linux/pagemap.h>
  44 #include <linux/debugfs.h>
  45 #include "radeon_reg.h"
  46 #include "radeon.h"
  47
  48 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
  49
  50 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  51 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
  52
  53 static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  54 {
  55         struct radeon_mman *mman;
  56         struct radeon_device *rdev;
  57
  58         mman = container_of(bdev, struct radeon_mman, bdev);
  59         rdev = container_of(mman, struct radeon_device, mman);
  60         return rdev;
  61 }
  62
  63
  64 /*
  65  * Global memory.
  66  */
  67 static int radeon_ttm_mem_global_init(struct drm_global_reference *ref)
  68 {
  69         return ttm_mem_global_init(ref->object);
  70 }
  71
  72 static void radeon_ttm_mem_global_release(struct drm_global_reference *ref)
  73 {
  74         ttm_mem_global_release(ref->object);
  75 }
  76
  77 static int radeon_ttm_global_init(struct radeon_device *rdev)
  78 {
  79         struct drm_global_reference *global_ref;
  80         int r;
  81
  82         rdev->mman.mem_global_referenced = false;
  83         global_ref = &rdev->mman.mem_global_ref;
  84         global_ref->global_type = DRM_GLOBAL_TTM_MEM;
  85         global_ref->size = sizeof(struct ttm_mem_global);
  86         global_ref->init = &radeon_ttm_mem_global_init;
  87         global_ref->release = &radeon_ttm_mem_global_release;
  88         r = drm_global_item_ref(global_ref);
  89         if (r != 0) {
  90                 DRM_ERROR("Failed setting up TTM memory accounting "
  91                           "subsystem.\n");
  92                 return r;
  93         }
  94
  95         rdev->mman.bo_global_ref.mem_glob =
  96                 rdev->mman.mem_global_ref.object;
  97         global_ref = &rdev->mman.bo_global_ref.ref;
  98         global_ref->global_type = DRM_GLOBAL_TTM_BO;
  99         global_ref->size = sizeof(struct ttm_bo_global);
 100         global_ref->init = &ttm_bo_global_init;
 101         global_ref->release = &ttm_bo_global_release;
 102         r = drm_global_item_ref(global_ref);
 103         if (r != 0) {
 104                 DRM_ERROR("Failed setting up TTM BO subsystem.\n");
 105                 drm_global_item_unref(&rdev->mman.mem_global_ref);
 106                 return r;
 107         }
 108
 109         rdev->mman.mem_global_referenced = true;
 110         return 0;
 111 }
 112
 113 static void radeon_ttm_global_fini(struct radeon_device *rdev)
 114 {
 115         if (rdev->mman.mem_global_referenced) {
 116                 drm_global_item_unref(&rdev->mman.bo_global_ref.ref);
 117                 drm_global_item_unref(&rdev->mman.mem_global_ref);
 118                 rdev->mman.mem_global_referenced = false;
 119         }
 120 }
 121
 122 static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
 123 {
 124         return 0;
 125 }
 126
 127 static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
 128                                 struct ttm_mem_type_manager *man)
 129 {
 130         struct radeon_device *rdev;
 131
 132         rdev = radeon_get_rdev(bdev);
 133
 134         switch (type) {
 135         case TTM_PL_SYSTEM:
 136                 /* System memory */
 137                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 138                 man->available_caching = TTM_PL_MASK_CACHING;
 139                 man->default_caching = TTM_PL_FLAG_CACHED;
 140                 break;
 141         case TTM_PL_TT:
 142                 man->func = &ttm_bo_manager_func;
 143                 man->gpu_offset = rdev->mc.gtt_start;
 144                 man->available_caching = TTM_PL_MASK_CACHING;
 145                 man->default_caching = TTM_PL_FLAG_CACHED;
 146                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
 147 #if __OS_HAS_AGP
 148                 if (rdev->flags & RADEON_IS_AGP) {
 149                         if (!rdev->ddev->agp) {
 150                                 DRM_ERROR("AGP is not enabled for memory type %u\n",
 151                                           (unsigned)type);
 152                                 return -EINVAL;
 153                         }
 154                         if (!rdev->ddev->agp->cant_use_aperture)
 155                                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 156                         man->available_caching = TTM_PL_FLAG_UNCACHED |
 157                                                  TTM_PL_FLAG_WC;
 158                         man->default_caching = TTM_PL_FLAG_WC;
 159                 }
 160 #endif
 161                 break;
 162         case TTM_PL_VRAM:
 163                 /* "On-card" video ram */
 164                 man->func = &ttm_bo_manager_func;
 165                 man->gpu_offset = rdev->mc.vram_start;
 166                 man->flags = TTM_MEMTYPE_FLAG_FIXED |
 167                              TTM_MEMTYPE_FLAG_MAPPABLE;
 168                 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
 169                 man->default_caching = TTM_PL_FLAG_WC;
 170                 break;
 171         default:
 172                 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
 173                 return -EINVAL;
 174         }
 175         return 0;
 176 }
 177
 178 static void radeon_evict_flags(struct ttm_buffer_object *bo,
 179                                 struct ttm_placement *placement)
 180 {
 181         struct radeon_bo *rbo;
 182         static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
 183
 184         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
 185                 placement->fpfn = 0;
 186                 placement->lpfn = 0;
 187                 placement->placement = &placements;
 188                 placement->busy_placement = &placements;
 189                 placement->num_placement = 1;
 190                 placement->num_busy_placement = 1;
 191                 return;
 192         }
 193         rbo = container_of(bo, struct radeon_bo, tbo);
 194         switch (bo->mem.mem_type) {
 195         case TTM_PL_VRAM:
 196                 if (rbo->rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready == false)
 197                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 198                 else
 199                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 200                 break;
 201         case TTM_PL_TT:
 202         default:
 203                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 204         }
 205         *placement = rbo->placement;
 206 }
 207
 208 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 209 {
 210         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
 211
 212         return drm_vma_node_verify_access(&rbo->gem_base.vma_node, filp);
 213 }
 214
 215 static void radeon_move_null(struct ttm_buffer_object *bo,
 216                              struct ttm_mem_reg *new_mem)
 217 {
 218         struct ttm_mem_reg *old_mem = &bo->mem;
 219
 220         BUG_ON(old_mem->mm_node != NULL);
 221         *old_mem = *new_mem;
 222         new_mem->mm_node = NULL;
 223 }
 224
 225 static int radeon_move_blit(struct ttm_buffer_object *bo,
 226                         bool evict, bool no_wait_gpu,
 227                         struct ttm_mem_reg *new_mem,
 228                         struct ttm_mem_reg *old_mem)
 229 {
 230         struct radeon_device *rdev;
 231         uint64_t old_start, new_start;
 232         struct radeon_fence *fence;
 233         int r, ridx;
 234
 235         rdev = radeon_get_rdev(bo->bdev);
 236         ridx = radeon_copy_ring_index(rdev);
 237         old_start = old_mem->start << PAGE_SHIFT;
 238         new_start = new_mem->start << PAGE_SHIFT;
 239
 240         switch (old_mem->mem_type) {
 241         case TTM_PL_VRAM:
 242                 old_start += rdev->mc.vram_start;
 243                 break;
 244         case TTM_PL_TT:
 245                 old_start += rdev->mc.gtt_start;
 246                 break;
 247         default:
 248                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 249                 return -EINVAL;
 250         }
 251         switch (new_mem->mem_type) {
 252         case TTM_PL_VRAM:
 253                 new_start += rdev->mc.vram_start;
 254                 break;
 255         case TTM_PL_TT:
 256                 new_start += rdev->mc.gtt_start;
 257                 break;
 258         default:
 259                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 260                 return -EINVAL;
 261         }
 262         if (!rdev->ring[ridx].ready) {
 263                 DRM_ERROR("Trying to move memory with ring turned off.\n");
 264                 return -EINVAL;
 265         }
 266
 267         BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
 268
 269         /* sync other rings */
 270         fence = bo->sync_obj;
 271         r = radeon_copy(rdev, old_start, new_start,
 272                         new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE), /* GPU pages */
 273                         &fence);
 274         /* FIXME: handle copy error */
 275         r = ttm_bo_move_accel_cleanup(bo, (void *)fence,
 276                                       evict, no_wait_gpu, new_mem);
 277         radeon_fence_unref(&fence);
 278         return r;
 279 }
 280
 281 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
 282                                 bool evict, bool interruptible,
 283                                 bool no_wait_gpu,
 284                                 struct ttm_mem_reg *new_mem)
 285 {
 286         struct radeon_device *rdev;
 287         struct ttm_mem_reg *old_mem = &bo->mem;
 288         struct ttm_mem_reg tmp_mem;
 289         u32 placements;
 290         struct ttm_placement placement;
 291         int r;
 292
 293         rdev = radeon_get_rdev(bo->bdev);
 294         tmp_mem = *new_mem;
 295         tmp_mem.mm_node = NULL;
 296         placement.fpfn = 0;
 297         placement.lpfn = 0;
 298         placement.num_placement = 1;
 299         placement.placement = &placements;
 300         placement.num_busy_placement = 1;
 301         placement.busy_placement = &placements;
 302         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 303         r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
 304                              interruptible, no_wait_gpu);
 305         if (unlikely(r)) {
 306                 return r;
 307         }
 308
 309         r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
 310         if (unlikely(r)) {
 311                 goto out_cleanup;
 312         }
 313
 314         r = ttm_tt_bind(bo->ttm, &tmp_mem);
 315         if (unlikely(r)) {
 316                 goto out_cleanup;
 317         }
 318         r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem);
 319         if (unlikely(r)) {
 320                 goto out_cleanup;
 321         }
 322         r = ttm_bo_move_ttm(bo, true, no_wait_gpu, new_mem);
 323 out_cleanup:
 324         ttm_bo_mem_put(bo, &tmp_mem);
 325         return r;
 326 }
 327
 328 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
 329                                 bool evict, bool interruptible,
 330                                 bool no_wait_gpu,
 331                                 struct ttm_mem_reg *new_mem)
 332 {
 333         struct radeon_device *rdev;
 334         struct ttm_mem_reg *old_mem = &bo->mem;
 335         struct ttm_mem_reg tmp_mem;
 336         struct ttm_placement placement;
 337         u32 placements;
 338         int r;
 339
 340         rdev = radeon_get_rdev(bo->bdev);
 341         tmp_mem = *new_mem;
 342         tmp_mem.mm_node = NULL;
 343         placement.fpfn = 0;
 344         placement.lpfn = 0;
 345         placement.num_placement = 1;
 346         placement.placement = &placements;
 347         placement.num_busy_placement = 1;
 348         placement.busy_placement = &placements;
 349         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 350         r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
 351                              interruptible, no_wait_gpu);
 352         if (unlikely(r)) {
 353                 return r;
 354         }
 355         r = ttm_bo_move_ttm(bo, true, no_wait_gpu, &tmp_mem);
 356         if (unlikely(r)) {
 357                 goto out_cleanup;
 358         }
 359         r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem);
 360         if (unlikely(r)) {
 361                 goto out_cleanup;
 362         }
 363 out_cleanup:
 364         ttm_bo_mem_put(bo, &tmp_mem);
 365         return r;
 366 }
 367
 368 static int radeon_bo_move(struct ttm_buffer_object *bo,
 369                         bool evict, bool interruptible,
 370                         bool no_wait_gpu,
 371                         struct ttm_mem_reg *new_mem)
 372 {
 373         struct radeon_device *rdev;
 374         struct ttm_mem_reg *old_mem = &bo->mem;
 375         int r;
 376
 377         rdev = radeon_get_rdev(bo->bdev);
 378         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 379                 radeon_move_null(bo, new_mem);
 380                 return 0;
 381         }
 382         if ((old_mem->mem_type == TTM_PL_TT &&
 383              new_mem->mem_type == TTM_PL_SYSTEM) ||
 384             (old_mem->mem_type == TTM_PL_SYSTEM &&
 385              new_mem->mem_type == TTM_PL_TT)) {
 386                 /* bind is enough */
 387                 radeon_move_null(bo, new_mem);
 388                 return 0;
 389         }
 390         if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
 391             rdev->asic->copy.copy == NULL) {
 392                 /* use memcpy */
 393                 goto memcpy;
 394         }
 395
 396         if (old_mem->mem_type == TTM_PL_VRAM &&
 397             new_mem->mem_type == TTM_PL_SYSTEM) {
 398                 r = radeon_move_vram_ram(bo, evict, interruptible,
 399                                         no_wait_gpu, new_mem);
 400         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
 401                    new_mem->mem_type == TTM_PL_VRAM) {
 402                 r = radeon_move_ram_vram(bo, evict, interruptible,
 403                                             no_wait_gpu, new_mem);
 404         } else {
 405                 r = radeon_move_blit(bo, evict, no_wait_gpu, new_mem, old_mem);
 406         }
 407
 408         if (r) {
 409 memcpy:
 410                 r = ttm_bo_move_memcpy(bo, evict, no_wait_gpu, new_mem);
 411                 if (r) {
 412                         return r;
 413                 }
 414         }
 415
 416         /* update statistics */
 417         atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved);
 418         return 0;
 419 }
 420
 421 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 422 {
 423         struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
 424         struct radeon_device *rdev = radeon_get_rdev(bdev);
 425
 426         mem->bus.addr = NULL;
 427         mem->bus.offset = 0;
 428         mem->bus.size = mem->num_pages << PAGE_SHIFT;
 429         mem->bus.base = 0;
 430         mem->bus.is_iomem = false;
 431         if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
 432                 return -EINVAL;
 433         switch (mem->mem_type) {
 434         case TTM_PL_SYSTEM:
 435                 /* system memory */
 436                 return 0;
 437         case TTM_PL_TT:
 438 #if __OS_HAS_AGP
 439                 if (rdev->flags & RADEON_IS_AGP) {
 440                         /* RADEON_IS_AGP is set only if AGP is active */
 441                         mem->bus.offset = mem->start << PAGE_SHIFT;
 442                         mem->bus.base = rdev->mc.agp_base;
 443                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
 444                 }
 445 #endif
 446                 break;
 447         case TTM_PL_VRAM:
 448                 mem->bus.offset = mem->start << PAGE_SHIFT;
 449                 /* check if it's visible */
 450                 if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size)
 451                         return -EINVAL;
 452                 mem->bus.base = rdev->mc.aper_base;
 453                 mem->bus.is_iomem = true;
 454 #ifdef __alpha__
 455                 /*
 456                  * Alpha: use bus.addr to hold the ioremap() return,
 457                  * so we can modify bus.base below.
 458                  */
 459                 if (mem->placement & TTM_PL_FLAG_WC)
 460                         mem->bus.addr =
 461                                 ioremap_wc(mem->bus.base + mem->bus.offset,
 462                                            mem->bus.size);
 463                 else
 464                         mem->bus.addr =
 465                                 ioremap_nocache(mem->bus.base + mem->bus.offset,
 466                                                 mem->bus.size);
 467
 468                 /*
 469                  * Alpha: Use just the bus offset plus
 470                  * the hose/domain memory base for bus.base.
 471                  * It then can be used to build PTEs for VRAM
 472                  * access, as done in ttm_bo_vm_fault().
 473                  */
 474                 mem->bus.base = (mem->bus.base & 0x0ffffffffUL) +
 475                         rdev->ddev->hose->dense_mem_base;
 476 #endif
 477                 break;
 478         default:
 479                 return -EINVAL;
 480         }
 481         return 0;
 482 }
 483
 484 static void radeon_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 485 {
 486 }
 487
 488 static int radeon_sync_obj_wait(void *sync_obj, bool lazy, bool interruptible)
 489 {
 490         return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible);
 491 }
 492
 493 static int radeon_sync_obj_flush(void *sync_obj)
 494 {
 495         return 0;
 496 }
 497
 498 static void radeon_sync_obj_unref(void **sync_obj)
 499 {
 500         radeon_fence_unref((struct radeon_fence **)sync_obj);
 501 }
 502
 503 static void *radeon_sync_obj_ref(void *sync_obj)
 504 {
 505         return radeon_fence_ref((struct radeon_fence *)sync_obj);
 506 }
 507
 508 static bool radeon_sync_obj_signaled(void *sync_obj)
 509 {
 510         return radeon_fence_signaled((struct radeon_fence *)sync_obj);
 511 }
 512
 513 /*
 514  * TTM backend functions.
 515  */
 516 struct radeon_ttm_tt {
 517         struct ttm_dma_tt               ttm;
 518         struct radeon_device            *rdev;
 519         u64                             offset;
 520
 521         uint64_t                        userptr;
 522         struct mm_struct                *usermm;
 523         uint32_t                        userflags;
 524 };
 525
 526 /* prepare the sg table with the user pages */
 527 static int radeon_ttm_tt_pin_userptr(struct ttm_tt *ttm)
 528 {
 529         struct radeon_device *rdev = radeon_get_rdev(ttm->bdev);
 530         struct radeon_ttm_tt *gtt = (void *)ttm;
 531         unsigned pinned = 0, nents;
 532         int r;
 533
 534         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 535         enum dma_data_direction direction = write ?
 536                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 537
 538         if (current->mm != gtt->usermm)
 539                 return -EPERM;
 540
 541         if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
 542                 /* check that we only pin down anonymous memory
 543                    to prevent problems with writeback */
 544                 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
 545                 struct vm_area_struct *vma;
 546                 vma = find_vma(gtt->usermm, gtt->userptr);
 547                 if (!vma || vma->vm_file || vma->vm_end < end)
 548                         return -EPERM;
 549         }
 550
 551         do {
 552                 unsigned num_pages = ttm->num_pages - pinned;
 553                 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
 554                 struct page **pages = ttm->pages + pinned;
 555
 556                 r = get_user_pages(current, current->mm, userptr, num_pages,
 557                                    write, 0, pages, NULL);
 558                 if (r < 0)
 559                         goto release_pages;
 560
 561                 pinned += r;
 562
 563         } while (pinned < ttm->num_pages);
 564
 565         r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
 566                                       ttm->num_pages << PAGE_SHIFT,
 567                                       GFP_KERNEL);
 568         if (r)
 569                 goto release_sg;
 570
 571         r = -ENOMEM;
 572         nents = dma_map_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction);
 573         if (nents != ttm->sg->nents)
 574                 goto release_sg;
 575
 576         drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 577                                          gtt->ttm.dma_address, ttm->num_pages);
 578
 579         return 0;
 580
 581 release_sg:
 582         kfree(ttm->sg);
 583
 584 release_pages:
 585         release_pages(ttm->pages, pinned, 0);
 586         return r;
 587 }
 588
 589 static void radeon_ttm_tt_unpin_userptr(struct ttm_tt *ttm)
 590 {
 591         struct radeon_device *rdev = radeon_get_rdev(ttm->bdev);
 592         struct radeon_ttm_tt *gtt = (void *)ttm;
 593         struct scatterlist *sg;
 594         int i;
 595
 596         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 597         enum dma_data_direction direction = write ?
 598                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 599
 600         /* free the sg table and pages again */
 601         dma_unmap_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction);
 602
 603         for_each_sg(ttm->sg->sgl, sg, ttm->sg->nents, i) {
 604                 struct page *page = sg_page(sg);
 605
 606                 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
 607                         set_page_dirty(page);
 608
 609                 mark_page_accessed(page);
 610                 page_cache_release(page);
 611         }
 612
 613         sg_free_table(ttm->sg);
 614 }
 615
 616 static int radeon_ttm_backend_bind(struct ttm_tt *ttm,
 617                                    struct ttm_mem_reg *bo_mem)
 618 {
 619         struct radeon_ttm_tt *gtt = (void*)ttm;
 620         uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
 621                 RADEON_GART_PAGE_WRITE;
 622         int r;
 623
 624         if (gtt->userptr) {
 625                 radeon_ttm_tt_pin_userptr(ttm);
 626                 flags &= ~RADEON_GART_PAGE_WRITE;
 627         }
 628
 629         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
 630         if (!ttm->num_pages) {
 631                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
 632                      ttm->num_pages, bo_mem, ttm);
 633         }
 634         if (ttm->caching_state == tt_cached)
 635                 flags |= RADEON_GART_PAGE_SNOOP;
 636         r = radeon_gart_bind(gtt->rdev, gtt->offset, ttm->num_pages,
 637                              ttm->pages, gtt->ttm.dma_address, flags);
 638         if (r) {
 639                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
 640                           ttm->num_pages, (unsigned)gtt->offset);
 641                 return r;
 642         }
 643         return 0;
 644 }
 645
 646 static int radeon_ttm_backend_unbind(struct ttm_tt *ttm)
 647 {
 648         struct radeon_ttm_tt *gtt = (void *)ttm;
 649
 650         radeon_gart_unbind(gtt->rdev, gtt->offset, ttm->num_pages);
 651
 652         if (gtt->userptr)
 653                 radeon_ttm_tt_unpin_userptr(ttm);
 654
 655         return 0;
 656 }
 657
 658 static void radeon_ttm_backend_destroy(struct ttm_tt *ttm)
 659 {
 660         struct radeon_ttm_tt *gtt = (void *)ttm;
 661
 662         ttm_dma_tt_fini(&gtt->ttm);
 663         kfree(gtt);
 664 }
 665
 666 static struct ttm_backend_func radeon_backend_func = {
 667         .bind = &radeon_ttm_backend_bind,
 668         .unbind = &radeon_ttm_backend_unbind,
 669         .destroy = &radeon_ttm_backend_destroy,
 670 };
 671
 672 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_bo_device *bdev,
 673                                     unsigned long size, uint32_t page_flags,
 674                                     struct page *dummy_read_page)
 675 {
 676         struct radeon_device *rdev;
 677         struct radeon_ttm_tt *gtt;
 678
 679         rdev = radeon_get_rdev(bdev);
 680 #if __OS_HAS_AGP
 681         if (rdev->flags & RADEON_IS_AGP) {
 682                 return ttm_agp_tt_create(bdev, rdev->ddev->agp->bridge,
 683                                          size, page_flags, dummy_read_page);
 684         }
 685 #endif
 686
 687         gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
 688         if (gtt == NULL) {
 689                 return NULL;
 690         }
 691         gtt->ttm.ttm.func = &radeon_backend_func;
 692         gtt->rdev = rdev;
 693         if (ttm_dma_tt_init(&gtt->ttm, bdev, size, page_flags, dummy_read_page)) {
 694                 kfree(gtt);
 695                 return NULL;
 696         }
 697         return &gtt->ttm.ttm;
 698 }
 699
 700 static int radeon_ttm_tt_populate(struct ttm_tt *ttm)
 701 {
 702         struct radeon_device *rdev;
 703         struct radeon_ttm_tt *gtt = (void *)ttm;
 704         unsigned i;
 705         int r;
 706         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 707
 708         if (ttm->state != tt_unpopulated)
 709                 return 0;
 710
 711         if (gtt->userptr) {
 712                 ttm->sg = kcalloc(1, sizeof(struct sg_table), GFP_KERNEL);
 713                 if (!ttm->sg)
 714                         return -ENOMEM;
 715
 716                 ttm->page_flags |= TTM_PAGE_FLAG_SG;
 717                 ttm->state = tt_unbound;
 718                 return 0;
 719         }
 720
 721         if (slave && ttm->sg) {
 722                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 723                                                  gtt->ttm.dma_address, ttm->num_pages);
 724                 ttm->state = tt_unbound;
 725                 return 0;
 726         }
 727
 728         rdev = radeon_get_rdev(ttm->bdev);
 729 #if __OS_HAS_AGP
 730         if (rdev->flags & RADEON_IS_AGP) {
 731                 return ttm_agp_tt_populate(ttm);
 732         }
 733 #endif
 734
 735 #ifdef CONFIG_SWIOTLB
 736         if (swiotlb_nr_tbl()) {
 737                 return ttm_dma_populate(&gtt->ttm, rdev->dev);
 738         }
 739 #endif
 740
 741         r = ttm_pool_populate(ttm);
 742         if (r) {
 743                 return r;
 744         }
 745
 746         for (i = 0; i < ttm->num_pages; i++) {
 747                 gtt->ttm.dma_address[i] = pci_map_page(rdev->pdev, ttm->pages[i],
 748                                                        0, PAGE_SIZE,
 749                                                        PCI_DMA_BIDIRECTIONAL);
 750                 if (pci_dma_mapping_error(rdev->pdev, gtt->ttm.dma_address[i])) {
 751                         while (--i) {
 752                                 pci_unmap_page(rdev->pdev, gtt->ttm.dma_address[i],
 753                                                PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 754                                 gtt->ttm.dma_address[i] = 0;
 755                         }
 756                         ttm_pool_unpopulate(ttm);
 757                         return -EFAULT;
 758                 }
 759         }
 760         return 0;
 761 }
 762
 763 static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm)
 764 {
 765         struct radeon_device *rdev;
 766         struct radeon_ttm_tt *gtt = (void *)ttm;
 767         unsigned i;
 768         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 769
 770         if (gtt->userptr) {
 771                 kfree(ttm->sg);
 772                 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
 773                 return;
 774         }
 775
 776         if (slave)
 777                 return;
 778
 779         rdev = radeon_get_rdev(ttm->bdev);
 780 #if __OS_HAS_AGP
 781         if (rdev->flags & RADEON_IS_AGP) {
 782                 ttm_agp_tt_unpopulate(ttm);
 783                 return;
 784         }
 785 #endif
 786
 787 #ifdef CONFIG_SWIOTLB
 788         if (swiotlb_nr_tbl()) {
 789                 ttm_dma_unpopulate(&gtt->ttm, rdev->dev);
 790                 return;
 791         }
 792 #endif
 793
 794         for (i = 0; i < ttm->num_pages; i++) {
 795                 if (gtt->ttm.dma_address[i]) {
 796                         pci_unmap_page(rdev->pdev, gtt->ttm.dma_address[i],
 797                                        PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 798                 }
 799         }
 800
 801         ttm_pool_unpopulate(ttm);
 802 }
 803
 804 int radeon_ttm_tt_set_userptr(struct ttm_tt *ttm, uint64_t addr,
 805                               uint32_t flags)
 806 {
 807         struct radeon_ttm_tt *gtt = (void *)ttm;
 808
 809         if (gtt == NULL)
 810                 return -EINVAL;
 811
 812         gtt->userptr = addr;
 813         gtt->usermm = current->mm;
 814         gtt->userflags = flags;
 815         return 0;
 816 }
 817
 818 bool radeon_ttm_tt_has_userptr(struct ttm_tt *ttm)
 819 {
 820         struct radeon_ttm_tt *gtt = (void *)ttm;
 821
 822         if (gtt == NULL)
 823                 return false;
 824
 825         return !!gtt->userptr;
 826 }
 827
 828 bool radeon_ttm_tt_is_readonly(struct ttm_tt *ttm)
 829 {
 830         struct radeon_ttm_tt *gtt = (void *)ttm;
 831
 832         if (gtt == NULL)
 833                 return false;
 834
 835         return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 836 }
 837
 838 static struct ttm_bo_driver radeon_bo_driver = {
 839         .ttm_tt_create = &radeon_ttm_tt_create,
 840         .ttm_tt_populate = &radeon_ttm_tt_populate,
 841         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
 842         .invalidate_caches = &radeon_invalidate_caches,
 843         .init_mem_type = &radeon_init_mem_type,
 844         .evict_flags = &radeon_evict_flags,
 845         .move = &radeon_bo_move,
 846         .verify_access = &radeon_verify_access,
 847         .sync_obj_signaled = &radeon_sync_obj_signaled,
 848         .sync_obj_wait = &radeon_sync_obj_wait,
 849         .sync_obj_flush = &radeon_sync_obj_flush,
 850         .sync_obj_unref = &radeon_sync_obj_unref,
 851         .sync_obj_ref = &radeon_sync_obj_ref,
 852         .move_notify = &radeon_bo_move_notify,
 853         .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
 854         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 855         .io_mem_free = &radeon_ttm_io_mem_free,
 856 };
 857
 858 int radeon_ttm_init(struct radeon_device *rdev)
 859 {
 860         int r;
 861
 862         r = radeon_ttm_global_init(rdev);
 863         if (r) {
 864                 return r;
 865         }
 866         /* No others user of address space so set it to 0 */
 867         r = ttm_bo_device_init(&rdev->mman.bdev,
 868                                rdev->mman.bo_global_ref.ref.object,
 869                                &radeon_bo_driver,
 870                                rdev->ddev->anon_inode->i_mapping,
 871                                DRM_FILE_PAGE_OFFSET,
 872                                rdev->need_dma32);
 873         if (r) {
 874                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 875                 return r;
 876         }
 877         rdev->mman.initialized = true;
 878         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
 879                                 rdev->mc.real_vram_size >> PAGE_SHIFT);
 880         if (r) {
 881                 DRM_ERROR("Failed initializing VRAM heap.\n");
 882                 return r;
 883         }
 884         /* Change the size here instead of the init above so only lpfn is affected */
 885         radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
 886
 887         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
 888                              RADEON_GEM_DOMAIN_VRAM, 0,
 889                              NULL, &rdev->stollen_vga_memory);
 890         if (r) {
 891                 return r;
 892         }
 893         r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 894         if (r)
 895                 return r;
 896         r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 897         radeon_bo_unreserve(rdev->stollen_vga_memory);
 898         if (r) {
 899                 radeon_bo_unref(&rdev->stollen_vga_memory);
 900                 return r;
 901         }
 902         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 903                  (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
 904         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
 905                                 rdev->mc.gtt_size >> PAGE_SHIFT);
 906         if (r) {
 907                 DRM_ERROR("Failed initializing GTT heap.\n");
 908                 return r;
 909         }
 910         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 911                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 912
 913         r = radeon_ttm_debugfs_init(rdev);
 914         if (r) {
 915                 DRM_ERROR("Failed to init debugfs\n");
 916                 return r;
 917         }
 918         return 0;
 919 }
 920
 921 void radeon_ttm_fini(struct radeon_device *rdev)
 922 {
 923         int r;
 924
 925         if (!rdev->mman.initialized)
 926                 return;
 927         radeon_ttm_debugfs_fini(rdev);
 928         if (rdev->stollen_vga_memory) {
 929                 r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 930                 if (r == 0) {
 931                         radeon_bo_unpin(rdev->stollen_vga_memory);
 932                         radeon_bo_unreserve(rdev->stollen_vga_memory);
 933                 }
 934                 radeon_bo_unref(&rdev->stollen_vga_memory);
 935         }
 936         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 937         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
 938         ttm_bo_device_release(&rdev->mman.bdev);
 939         radeon_gart_fini(rdev);
 940         radeon_ttm_global_fini(rdev);
 941         rdev->mman.initialized = false;
 942         DRM_INFO("radeon: ttm finalized\n");
 943 }
 944
 945 /* this should only be called at bootup or when userspace
 946  * isn't running */
 947 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
 948 {
 949         struct ttm_mem_type_manager *man;
 950
 951         if (!rdev->mman.initialized)
 952                 return;
 953
 954         man = &rdev->mman.bdev.man[TTM_PL_VRAM];
 955         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
 956         man->size = size >> PAGE_SHIFT;
 957 }
 958
 959 static struct vm_operations_struct radeon_ttm_vm_ops;
 960 static const struct vm_operations_struct *ttm_vm_ops = NULL;
 961
 962 static int radeon_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 963 {
 964         struct ttm_buffer_object *bo;
 965         struct radeon_device *rdev;
 966         int r;
 967
 968         bo = (struct ttm_buffer_object *)vma->vm_private_data;
 969         if (bo == NULL) {
 970                 return VM_FAULT_NOPAGE;
 971         }
 972         rdev = radeon_get_rdev(bo->bdev);
 973         down_read(&rdev->pm.mclk_lock);
 974         r = ttm_vm_ops->fault(vma, vmf);
 975         up_read(&rdev->pm.mclk_lock);
 976         return r;
 977 }
 978
 979 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
 980 {
 981         struct drm_file *file_priv;
 982         struct radeon_device *rdev;
 983         int r;
 984
 985         if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) {
 986                 return drm_mmap(filp, vma);
 987         }
 988
 989         file_priv = filp->private_data;
 990         rdev = file_priv->minor->dev->dev_private;
 991         if (rdev == NULL) {
 992                 return -EINVAL;
 993         }
 994         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
 995         if (unlikely(r != 0)) {
 996                 return r;
 997         }
 998         if (unlikely(ttm_vm_ops == NULL)) {
 999                 ttm_vm_ops = vma->vm_ops;
1000                 radeon_ttm_vm_ops = *ttm_vm_ops;
1001                 radeon_ttm_vm_ops.fault = &radeon_ttm_fault;
1002         }
1003         vma->vm_ops = &radeon_ttm_vm_ops;
1004         return 0;
1005 }
1006
1007 #if defined(CONFIG_DEBUG_FS)
1008
1009 static int radeon_mm_dump_table(struct seq_file *m, void *data)
1010 {
1011         struct drm_info_node *node = (struct drm_info_node *)m->private;
1012         unsigned ttm_pl = *(int *)node->info_ent->data;
1013         struct drm_device *dev = node->minor->dev;
1014         struct radeon_device *rdev = dev->dev_private;
1015         struct drm_mm *mm = (struct drm_mm *)rdev->mman.bdev.man[ttm_pl].priv;
1016         int ret;
1017         struct ttm_bo_global *glob = rdev->mman.bdev.glob;
1018
1019         spin_lock(&glob->lru_lock);
1020         ret = drm_mm_dump_table(m, mm);
1021         spin_unlock(&glob->lru_lock);
1022         return ret;
1023 }
1024
1025 static int ttm_pl_vram = TTM_PL_VRAM;
1026 static int ttm_pl_tt = TTM_PL_TT;
1027
1028 static struct drm_info_list radeon_ttm_debugfs_list[] = {
1029         {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
1030         {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
1031         {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL},
1032 #ifdef CONFIG_SWIOTLB
1033         {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL}
1034 #endif
1035 };
1036
1037 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
1038 {
1039         struct radeon_device *rdev = inode->i_private;
1040         i_size_write(inode, rdev->mc.mc_vram_size);
1041         filep->private_data = inode->i_private;
1042         return 0;
1043 }
1044
1045 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
1046                                     size_t size, loff_t *pos)
1047 {
1048         struct radeon_device *rdev = f->private_data;
1049         ssize_t result = 0;
1050         int r;
1051
1052         if (size & 0x3 || *pos & 0x3)
1053                 return -EINVAL;
1054
1055         while (size) {
1056                 unsigned long flags;
1057                 uint32_t value;
1058
1059                 if (*pos >= rdev->mc.mc_vram_size)
1060                         return result;
1061
1062                 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
1063                 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
1064                 if (rdev->family >= CHIP_CEDAR)
1065                         WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
1066                 value = RREG32(RADEON_MM_DATA);
1067                 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
1068
1069                 r = put_user(value, (uint32_t *)buf);
1070                 if (r)
1071                         return r;
1072
1073                 result += 4;
1074                 buf += 4;
1075                 *pos += 4;
1076                 size -= 4;
1077         }
1078
1079         return result;
1080 }
1081
1082 static const struct file_operations radeon_ttm_vram_fops = {
1083         .owner = THIS_MODULE,
1084         .open = radeon_ttm_vram_open,
1085         .read = radeon_ttm_vram_read,
1086         .llseek = default_llseek
1087 };
1088
1089 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
1090 {
1091         struct radeon_device *rdev = inode->i_private;
1092         i_size_write(inode, rdev->mc.gtt_size);
1093         filep->private_data = inode->i_private;
1094         return 0;
1095 }
1096
1097 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
1098                                    size_t size, loff_t *pos)
1099 {
1100         struct radeon_device *rdev = f->private_data;
1101         ssize_t result = 0;
1102         int r;
1103
1104         while (size) {
1105                 loff_t p = *pos / PAGE_SIZE;
1106                 unsigned off = *pos & ~PAGE_MASK;
1107                 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
1108                 struct page *page;
1109                 void *ptr;
1110
1111                 if (p >= rdev->gart.num_cpu_pages)
1112                         return result;
1113
1114                 page = rdev->gart.pages[p];
1115                 if (page) {
1116                         ptr = kmap(page);
1117                         ptr += off;
1118
1119                         r = copy_to_user(buf, ptr, cur_size);
1120                         kunmap(rdev->gart.pages[p]);
1121                 } else
1122                         r = clear_user(buf, cur_size);
1123
1124                 if (r)
1125                         return -EFAULT;
1126
1127                 result += cur_size;
1128                 buf += cur_size;
1129                 *pos += cur_size;
1130                 size -= cur_size;
1131         }
1132
1133         return result;
1134 }
1135
1136 static const struct file_operations radeon_ttm_gtt_fops = {
1137         .owner = THIS_MODULE,
1138         .open = radeon_ttm_gtt_open,
1139         .read = radeon_ttm_gtt_read,
1140         .llseek = default_llseek
1141 };
1142
1143 #endif
1144
1145 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
1146 {
1147 #if defined(CONFIG_DEBUG_FS)
1148         unsigned count;
1149
1150         struct drm_minor *minor = rdev->ddev->primary;
1151         struct dentry *ent, *root = minor->debugfs_root;
1152
1153         ent = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO, root,
1154                                   rdev, &radeon_ttm_vram_fops);
1155         if (IS_ERR(ent))
1156                 return PTR_ERR(ent);
1157         rdev->mman.vram = ent;
1158
1159         ent = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO, root,
1160                                   rdev, &radeon_ttm_gtt_fops);
1161         if (IS_ERR(ent))
1162                 return PTR_ERR(ent);
1163         rdev->mman.gtt = ent;
1164
1165         count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1166
1167 #ifdef CONFIG_SWIOTLB
1168         if (!swiotlb_nr_tbl())
1169                 --count;
1170 #endif
1171
1172         return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1173 #else
1174
1175         return 0;
1176 #endif
1177 }
1178
1179 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1180 {
1181 #if defined(CONFIG_DEBUG_FS)
1182
1183         debugfs_remove(rdev->mman.vram);
1184         rdev->mman.vram = NULL;
1185
1186         debugfs_remove(rdev->mman.gtt);
1187         rdev->mman.gtt = NULL;
1188 #endif
1189 }