drivers/gpu/drm/rockchip/rockchip_lvds.c

   1 /*
   2  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
   3  * Author:
   4  *      Mark Yao <mark.yao@rock-chips.com>
   5  *
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <drm/drmP.h>
  17 #include <drm/drm_atomic_helper.h>
  18 #include <drm/drm_crtc_helper.h>
  19 #include <drm/drm_dp_helper.h>
  20 #include <drm/drm_panel.h>
  21 #include <drm/drm_of.h>
  22
  23 #include <linux/component.h>
  24 #include <linux/clk.h>
  25 #include <linux/mfd/syscon.h>
  26 #include <linux/of_graph.h>
  27 #include <linux/pm_runtime.h>
  28 #include <linux/regmap.h>
  29 #include <linux/reset.h>
  30
  31 #include <video/display_timing.h>
  32
  33 #include "rockchip_drm_drv.h"
  34 #include "rockchip_drm_vop.h"
  35 #include "rockchip_lvds.h"
  36
  37 #define DISPLAY_OUTPUT_RGB              0
  38 #define DISPLAY_OUTPUT_LVDS             1
  39 #define DISPLAY_OUTPUT_DUAL_LVDS        2
  40
  41 #define connector_to_lvds(c) \
  42                 container_of(c, struct rockchip_lvds, connector)
  43
  44 #define encoder_to_lvds(c) \
  45                 container_of(c, struct rockchip_lvds, encoder)
  46 #define LVDS_CHIP(lvds) ((lvds)->soc_data->chip_type)
  47
  48 /*
  49  * @grf_offset: offset inside the grf regmap for setting the rockchip lvds
  50  */
  51 struct rockchip_lvds_soc_data {
  52         int chip_type;
  53         int grf_soc_con5;
  54         int grf_soc_con6;
  55         int grf_soc_con7;
  56         int grf_soc_con15;
  57
  58         bool has_vop_sel;
  59 };
  60
  61 struct rockchip_lvds {
  62         void *base;
  63         struct device *dev;
  64         void __iomem *regs;
  65         void __iomem *regs_ctrl;
  66         struct regmap *grf;
  67         struct clk *pclk;
  68         struct clk *pclk_ctrl;
  69         const struct rockchip_lvds_soc_data *soc_data;
  70
  71         int output;
  72         int format;
  73
  74         struct drm_device *drm_dev;
  75         struct drm_panel *panel;
  76         struct drm_bridge *bridge;
  77         struct drm_connector connector;
  78         struct drm_encoder encoder;
  79
  80         struct mutex suspend_lock;
  81         int suspend;
  82         struct dev_pin_info *pins;
  83         struct drm_display_mode mode;
  84 };
  85
  86 static inline void lvds_writel(struct rockchip_lvds *lvds, u32 offset, u32 val)
  87 {
  88         writel_relaxed(val, lvds->regs + offset);
  89         if ((lvds->output == DISPLAY_OUTPUT_DUAL_LVDS) &&
  90             (LVDS_CHIP(lvds) == RK3288_LVDS))
  91                 writel_relaxed(val, lvds->regs + offset + 0x100);
  92 }
  93
  94 static inline void lvds_msk_reg(struct rockchip_lvds *lvds, u32 offset,
  95                                 u32 msk, u32 val)
  96 {
  97         u32 temp;
  98
  99         temp = readl_relaxed(lvds->regs + offset) & (0xFF - (msk));
 100         writel_relaxed(temp | ((val) & (msk)), lvds->regs + offset);
 101 }
 102
 103 static inline void lvds_dsi_writel(struct rockchip_lvds *lvds,
 104                                    u32 offset, u32 val)
 105 {
 106         writel_relaxed(val, lvds->regs_ctrl + offset);
 107 }
 108
 109 static inline u32 lvds_phy_lockon(struct rockchip_lvds *lvds)
 110 {
 111         u32 val = 0;
 112
 113         val = readl_relaxed(lvds->regs_ctrl + MIPIC_PHY_STATUS);
 114         return (val & m_PHY_LOCK_STATUS) ? 1 : 0;
 115 }
 116
 117 static inline int lvds_name_to_format(const char *s)
 118 {
 119         if (!s)
 120                 return -EINVAL;
 121
 122         if (strncmp(s, "jeida", 6) == 0)
 123                 return LVDS_FORMAT_JEIDA;
 124         else if (strncmp(s, "vesa", 5) == 0)
 125                 return LVDS_FORMAT_VESA;
 126
 127         return -EINVAL;
 128 }
 129
 130 static inline int lvds_name_to_output(const char *s)
 131 {
 132         if (!s)
 133                 return -EINVAL;
 134
 135         if (strncmp(s, "rgb", 3) == 0)
 136                 return DISPLAY_OUTPUT_RGB;
 137         else if (strncmp(s, "lvds", 4) == 0)
 138                 return DISPLAY_OUTPUT_LVDS;
 139         else if (strncmp(s, "duallvds", 8) == 0)
 140                 return DISPLAY_OUTPUT_DUAL_LVDS;
 141
 142         return -EINVAL;
 143 }
 144
 145 static int rk3288_lvds_poweron(struct rockchip_lvds *lvds)
 146 {
 147         if (lvds->output == DISPLAY_OUTPUT_RGB) {
 148                 lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
 149                             RK3288_LVDS_CH0_REG0_TTL_EN |
 150                             RK3288_LVDS_CH0_REG0_LANECK_EN |
 151                             RK3288_LVDS_CH0_REG0_LANE4_EN |
 152                             RK3288_LVDS_CH0_REG0_LANE3_EN |
 153                             RK3288_LVDS_CH0_REG0_LANE2_EN |
 154                             RK3288_LVDS_CH0_REG0_LANE1_EN |
 155                             RK3288_LVDS_CH0_REG0_LANE0_EN);
 156                 lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
 157                             RK3288_LVDS_PLL_FBDIV_REG2(0x46));
 158
 159                 lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
 160                             RK3288_LVDS_PLL_FBDIV_REG3(0x46));
 161                 lvds_writel(lvds, RK3288_LVDS_CH0_REG4,
 162                             RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE |
 163                             RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE |
 164                             RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE |
 165                             RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE |
 166                             RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE |
 167                             RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE);
 168                 lvds_writel(lvds, RK3288_LVDS_CH0_REG5,
 169                             RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA |
 170                             RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA |
 171                             RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA |
 172                             RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA |
 173                             RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA |
 174                             RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA);
 175                 lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
 176                             RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
 177                 lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
 178                             RK3288_LVDS_CH0_REG20_LSB);
 179         } else {
 180                 lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
 181                             RK3288_LVDS_CH0_REG0_LVDS_EN |
 182                             RK3288_LVDS_CH0_REG0_LANECK_EN |
 183                             RK3288_LVDS_CH0_REG0_LANE4_EN |
 184                             RK3288_LVDS_CH0_REG0_LANE3_EN |
 185                             RK3288_LVDS_CH0_REG0_LANE2_EN |
 186                             RK3288_LVDS_CH0_REG0_LANE1_EN |
 187                             RK3288_LVDS_CH0_REG0_LANE0_EN);
 188                 lvds_writel(lvds, RK3288_LVDS_CH0_REG1,
 189                             RK3288_LVDS_CH0_REG1_LANECK_BIAS |
 190                             RK3288_LVDS_CH0_REG1_LANE4_BIAS |
 191                             RK3288_LVDS_CH0_REG1_LANE3_BIAS |
 192                             RK3288_LVDS_CH0_REG1_LANE2_BIAS |
 193                             RK3288_LVDS_CH0_REG1_LANE1_BIAS |
 194                             RK3288_LVDS_CH0_REG1_LANE0_BIAS);
 195                 lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
 196                             RK3288_LVDS_CH0_REG2_RESERVE_ON |
 197                             RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE |
 198                             RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE |
 199                             RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE |
 200                             RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE |
 201                             RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE |
 202                             RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE |
 203                             RK3288_LVDS_PLL_FBDIV_REG2(0x46));
 204                 lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
 205                             RK3288_LVDS_PLL_FBDIV_REG3(0x46));
 206                 lvds_writel(lvds, RK3288_LVDS_CH0_REG4, 0x00);
 207                 lvds_writel(lvds, RK3288_LVDS_CH0_REG5, 0x00);
 208                 lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
 209                             RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
 210                 lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
 211                             RK3288_LVDS_CH0_REG20_LSB);
 212         }
 213
 214         writel(RK3288_LVDS_CFG_REGC_PLL_ENABLE,
 215                lvds->regs + RK3288_LVDS_CFG_REGC);
 216         writel(RK3288_LVDS_CFG_REG21_TX_ENABLE,
 217                lvds->regs + RK3288_LVDS_CFG_REG21);
 218
 219         return 0;
 220 }
 221
 222 static int rk336x_lvds_poweron(struct rockchip_lvds *lvds)
 223 {
 224         u32 delay_times = 20;
 225         u32 val;
 226
 227         if (lvds->output == DISPLAY_OUTPUT_RGB) {
 228                 /* enable lane */
 229                 lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
 230                 val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
 231                         v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
 232                 lvds_writel(lvds, MIPIPHY_REGEB, val);
 233
 234                 /* set ttl mode and reset phy config */
 235                 val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
 236                         v_MSB_SEL(1) | v_DIG_INTER_RST(1);
 237                 lvds_writel(lvds, MIPIPHY_REGE0, val);
 238
 239                 lvds_msk_reg(lvds, MIPIPHY_REGE3,
 240                              m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
 241                              v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
 242
 243                 /* set clock lane enable */
 244                 lvds_dsi_writel(lvds, MIPIC_PHY_RSTZ, m_PHY_ENABLE_CLK);
 245         } else {
 246                 /* digital internal disable */
 247                 lvds_msk_reg(lvds, MIPIPHY_REGE1,
 248                              m_DIG_INTER_EN, v_DIG_INTER_EN(0));
 249
 250                 /* set pll prediv and fbdiv */
 251                 lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
 252                 lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
 253
 254                 lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
 255
 256                 /* set lvds mode and reset phy config */
 257                 lvds_msk_reg(lvds, MIPIPHY_REGE0,
 258                              m_MSB_SEL | m_DIG_INTER_RST,
 259                              v_MSB_SEL(1) | v_DIG_INTER_RST(1));
 260
 261                 /* set VOCM 900 mv and V-DIFF 350 mv */
 262                 lvds_msk_reg(lvds, MIPIPHY_REGE4, m_VOCM | m_DIFF_V,
 263                              v_VOCM(0) | v_DIFF_V(2));
 264                 /* power up lvds pll and ldo */
 265                 lvds_msk_reg(lvds, MIPIPHY_REG1,
 266                              m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
 267                              v_SYNC_RST(0) | v_LDO_PWR_DOWN(0) |
 268                              v_PLL_PWR_DOWN(0));
 269                 /* enable lvds lane and power on pll */
 270                 lvds_writel(lvds, MIPIPHY_REGEB,
 271                             v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
 272                             v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0));
 273
 274                 /* enable lvds */
 275                 lvds_msk_reg(lvds, MIPIPHY_REGE3,
 276                              m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
 277                              v_MIPI_EN(0) | v_LVDS_EN(1) | v_TTL_EN(0));
 278
 279                 /* delay for waitting pll lock on */
 280                 while (delay_times--) {
 281                         if (lvds_phy_lockon(lvds))
 282                                 break;
 283                         usleep_range(100, 200);
 284                 }
 285
 286                 if (delay_times <= 0)
 287                         dev_err(lvds->dev,
 288                                 "wait phy lockon failed, please check hardware\n");
 289
 290                 lvds_msk_reg(lvds, MIPIPHY_REGE1,
 291                              m_DIG_INTER_EN, v_DIG_INTER_EN(1));
 292         }
 293
 294         return 0;
 295 }
 296
 297 static int rockchip_lvds_poweron(struct rockchip_lvds *lvds)
 298 {
 299         int ret;
 300
 301         if (lvds->pclk) {
 302                 ret = clk_enable(lvds->pclk);
 303                 if (ret < 0) {
 304                         dev_err(lvds->dev, "failed to enable lvds pclk %d\n", ret);
 305                         return ret;
 306                 }
 307         }
 308         if (lvds->pclk_ctrl) {
 309                 ret = clk_enable(lvds->pclk_ctrl);
 310                 if (ret < 0) {
 311                         dev_err(lvds->dev, "failed to enable lvds pclk_ctrl %d\n", ret);
 312                         return ret;
 313                 }
 314         }
 315
 316         ret = pm_runtime_get_sync(lvds->dev);
 317         if (ret < 0) {
 318                 dev_err(lvds->dev, "failed to get pm runtime: %d\n", ret);
 319                 return ret;
 320         }
 321         if (LVDS_CHIP(lvds) == RK3288_LVDS)
 322                 rk3288_lvds_poweron(lvds);
 323         else if (LVDS_CHIP(lvds) == RK336X_LVDS)
 324                 rk336x_lvds_poweron(lvds);
 325
 326         return 0;
 327 }
 328
 329 static void rockchip_lvds_poweroff(struct rockchip_lvds *lvds)
 330 {
 331         int ret;
 332         u32 val;
 333
 334         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 335                 writel(RK3288_LVDS_CFG_REG21_TX_DISABLE,
 336                        lvds->regs + RK3288_LVDS_CFG_REG21);
 337                 writel(RK3288_LVDS_CFG_REGC_PLL_DISABLE,
 338                        lvds->regs + RK3288_LVDS_CFG_REGC);
 339                 ret = regmap_write(lvds->grf,
 340                                    lvds->soc_data->grf_soc_con7, 0xffff8000);
 341                 if (ret != 0)
 342                         dev_err(lvds->dev, "Could not write to GRF: %d\n", ret);
 343
 344                 pm_runtime_put(lvds->dev);
 345                 if (lvds->pclk)
 346                         clk_disable(lvds->pclk);
 347         } else if (LVDS_CHIP(lvds) == RK336X_LVDS) {
 348                 val = v_RK336X_LVDSMODE_EN(0) | v_RK336X_MIPIPHY_TTL_EN(0);
 349                 ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val);
 350                 if (ret != 0) {
 351                         dev_err(lvds->dev, "Could not write to GRF: %d\n", ret);
 352                         return;
 353                 }
 354
 355                 /* disable lvds lane and power off pll */
 356                 lvds_writel(lvds, MIPIPHY_REGEB,
 357                             v_LANE0_EN(0) | v_LANE1_EN(0) | v_LANE2_EN(0) |
 358                             v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1));
 359
 360                 /* power down lvds pll and bandgap */
 361                 lvds_msk_reg(lvds, MIPIPHY_REG1,
 362                              m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
 363                              v_SYNC_RST(1) | v_LDO_PWR_DOWN(1) | v_PLL_PWR_DOWN(1));
 364
 365                 /* disable lvds */
 366                 lvds_msk_reg(lvds, MIPIPHY_REGE3, m_LVDS_EN | m_TTL_EN,
 367                              v_LVDS_EN(0) | v_TTL_EN(0));
 368                 pm_runtime_put(lvds->dev);
 369                 if (lvds->pclk)
 370                         clk_disable(lvds->pclk);
 371                 if (lvds->pclk_ctrl)
 372                         clk_disable(lvds->pclk_ctrl);
 373         }
 374 }
 375
 376 static enum drm_connector_status
 377 rockchip_lvds_connector_detect(struct drm_connector *connector, bool force)
 378 {
 379         return connector_status_connected;
 380 }
 381
 382 static void rockchip_lvds_connector_destroy(struct drm_connector *connector)
 383 {
 384         drm_connector_cleanup(connector);
 385 }
 386
 387 static const struct drm_connector_funcs rockchip_lvds_connector_funcs = {
 388         .dpms = drm_atomic_helper_connector_dpms,
 389         .detect = rockchip_lvds_connector_detect,
 390         .fill_modes = drm_helper_probe_single_connector_modes,
 391         .destroy = rockchip_lvds_connector_destroy,
 392         .reset = drm_atomic_helper_connector_reset,
 393         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 394         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 395 };
 396
 397 static int rockchip_lvds_connector_get_modes(struct drm_connector *connector)
 398 {
 399         struct rockchip_lvds *lvds = connector_to_lvds(connector);
 400         struct drm_panel *panel = lvds->panel;
 401
 402         return panel->funcs->get_modes(panel);
 403 }
 404
 405 static struct drm_encoder *
 406 rockchip_lvds_connector_best_encoder(struct drm_connector *connector)
 407 {
 408         struct rockchip_lvds *lvds = connector_to_lvds(connector);
 409
 410         return &lvds->encoder;
 411 }
 412
 413 static enum drm_mode_status rockchip_lvds_connector_mode_valid(
 414                 struct drm_connector *connector,
 415                 struct drm_display_mode *mode)
 416 {
 417         return MODE_OK;
 418 }
 419
 420 static
 421 int rockchip_lvds_connector_loader_protect(struct drm_connector *connector,
 422                                            bool on)
 423 {
 424         struct rockchip_lvds *lvds = connector_to_lvds(connector);
 425
 426         if (lvds->panel)
 427                 drm_panel_loader_protect(lvds->panel, on);
 428
 429         return 0;
 430 }
 431
 432 static const
 433 struct drm_connector_helper_funcs rockchip_lvds_connector_helper_funcs = {
 434         .get_modes = rockchip_lvds_connector_get_modes,
 435         .mode_valid = rockchip_lvds_connector_mode_valid,
 436         .best_encoder = rockchip_lvds_connector_best_encoder,
 437         .loader_protect = rockchip_lvds_connector_loader_protect,
 438 };
 439
 440 static void rockchip_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
 441 {
 442         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 443         int ret;
 444
 445         mutex_lock(&lvds->suspend_lock);
 446
 447         switch (mode) {
 448         case DRM_MODE_DPMS_ON:
 449                 if (!lvds->suspend)
 450                         goto out;
 451
 452                 drm_panel_prepare(lvds->panel);
 453                 ret = rockchip_lvds_poweron(lvds);
 454                 if (ret < 0) {
 455                         drm_panel_unprepare(lvds->panel);
 456                         goto out;
 457                 }
 458                 drm_panel_enable(lvds->panel);
 459
 460                 lvds->suspend = false;
 461                 break;
 462         case DRM_MODE_DPMS_STANDBY:
 463         case DRM_MODE_DPMS_SUSPEND:
 464         case DRM_MODE_DPMS_OFF:
 465                 if (lvds->suspend)
 466                         goto out;
 467
 468                 drm_panel_disable(lvds->panel);
 469                 rockchip_lvds_poweroff(lvds);
 470                 drm_panel_unprepare(lvds->panel);
 471
 472                 lvds->suspend = true;
 473                 break;
 474         default:
 475                 break;
 476         }
 477
 478 out:
 479         mutex_unlock(&lvds->suspend_lock);
 480 }
 481
 482 static bool
 483 rockchip_lvds_encoder_mode_fixup(struct drm_encoder *encoder,
 484                                 const struct drm_display_mode *mode,
 485                                 struct drm_display_mode *adjusted_mode)
 486 {
 487         return true;
 488 }
 489
 490 static void rockchip_lvds_encoder_mode_set(struct drm_encoder *encoder,
 491                                           struct drm_display_mode *mode,
 492                                           struct drm_display_mode *adjusted)
 493 {
 494         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 495
 496         drm_mode_copy(&lvds->mode, adjusted);
 497 }
 498
 499 static void rockchip_lvds_grf_config(struct drm_encoder *encoder,
 500                                      struct drm_display_mode *mode)
 501 {
 502         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 503         u32 h_bp = mode->htotal - mode->hsync_start;
 504         u8 pin_hsync = (mode->flags & DRM_MODE_FLAG_PHSYNC) ? 1 : 0;
 505         u8 pin_dclk = (mode->flags & DRM_MODE_FLAG_PCSYNC) ? 1 : 0;
 506         u32 val;
 507         int ret;
 508
 509         /* iomux to LCD data/sync mode */
 510         if (lvds->output == DISPLAY_OUTPUT_RGB)
 511                 if (lvds->pins && !IS_ERR(lvds->pins->default_state))
 512                         pinctrl_select_state(lvds->pins->p,
 513                                              lvds->pins->default_state);
 514         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 515                 val = lvds->format;
 516                 if (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)
 517                         val |= LVDS_DUAL | LVDS_CH0_EN | LVDS_CH1_EN;
 518                 else if (lvds->output == DISPLAY_OUTPUT_LVDS)
 519                         val |= LVDS_CH0_EN;
 520                 else if (lvds->output == DISPLAY_OUTPUT_RGB)
 521                         val |= LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN;
 522
 523                 if (h_bp & 0x01)
 524                         val |= LVDS_START_PHASE_RST_1;
 525
 526                 val |= (pin_dclk << 8) | (pin_hsync << 9);
 527                 val |= (0xffff << 16);
 528                 ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val);
 529                 if (ret != 0) {
 530                         dev_err(lvds->dev, "Could not write to GRF: %d\n", ret);
 531                         return;
 532                 }
 533         } else if (LVDS_CHIP(lvds) == RK336X_LVDS) {
 534                 if (lvds->output == DISPLAY_OUTPUT_RGB) {
 535                         /* enable lvds mode */
 536                         val = v_RK336X_LVDSMODE_EN(0) |
 537                                 v_RK336X_MIPIPHY_TTL_EN(1) |
 538                                 v_RK336X_MIPIPHY_LANE0_EN(1) |
 539                                 v_RK336X_MIPIDPI_FORCEX_EN(1);
 540                         ret = regmap_write(lvds->grf,
 541                                            lvds->soc_data->grf_soc_con7, val);
 542                         if (ret != 0) {
 543                                 dev_err(lvds->dev,
 544                                         "Could not write to GRF: %d\n", ret);
 545                                 return;
 546                         }
 547                         val = v_RK336X_FORCE_JETAG(0);
 548                         ret = regmap_write(lvds->grf,
 549                                            lvds->soc_data->grf_soc_con15, val);
 550                         if (ret != 0) {
 551                                 dev_err(lvds->dev,
 552                                         "Could not write to GRF: %d\n", ret);
 553                                 return;
 554                         }
 555                 } else if (lvds->output == DISPLAY_OUTPUT_LVDS) {
 556                         /* enable lvds mode */
 557                         val = v_RK336X_LVDSMODE_EN(1) |
 558                               v_RK336X_MIPIPHY_TTL_EN(0);
 559                         /* config lvds_format */
 560                         val |= v_RK336X_LVDS_OUTPUT_FORMAT(lvds->format);
 561                         /* LSB receive mode */
 562                         val |= v_RK336X_LVDS_MSBSEL(LVDS_MSB_D7);
 563                         val |= v_RK336X_MIPIPHY_LANE0_EN(1) |
 564                                v_RK336X_MIPIDPI_FORCEX_EN(1);
 565                         ret = regmap_write(lvds->grf,
 566                                            lvds->soc_data->grf_soc_con7, val);
 567                         if (ret != 0) {
 568                                 dev_err(lvds->dev,
 569                                         "Could not write to GRF: %d\n", ret);
 570                                 return;
 571                         }
 572                 }
 573         }
 574 }
 575
 576 static int rockchip_lvds_set_vop_source(struct rockchip_lvds *lvds,
 577                                         struct drm_encoder *encoder)
 578 {
 579         u32 val;
 580         int ret;
 581
 582         if (!lvds->soc_data->has_vop_sel)
 583                 return 0;
 584
 585         ret = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder);
 586         if (ret < 0)
 587                 return ret;
 588
 589         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 590                 if (ret)
 591                         val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT |
 592                               (RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16);
 593                 else
 594                         val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
 595
 596                 ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con6, val);
 597                 if (ret < 0)
 598                         return ret;
 599         } else {
 600                 if (ret)
 601                         val = RK3366_LVDS_VOP_SEL_LIT;
 602                 else
 603                         val = RK3366_LVDS_VOP_SEL_BIG;
 604                 regmap_write(lvds->grf, RK3366_GRF_SOC_CON0, val);
 605         }
 606
 607         return 0;
 608 }
 609
 610 static int
 611 rockchip_lvds_encoder_atomic_check(struct drm_encoder *encoder,
 612                                    struct drm_crtc_state *crtc_state,
 613                                    struct drm_connector_state *conn_state)
 614 {
 615         struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
 616         struct drm_connector *connector = conn_state->connector;
 617         struct drm_display_info *info = &connector->display_info;
 618
 619         s->output_mode = ROCKCHIP_OUT_MODE_P888;
 620         s->output_type = DRM_MODE_CONNECTOR_LVDS;
 621         if (info->num_bus_formats)
 622                 s->bus_format = info->bus_formats[0];
 623
 624         return 0;
 625 }
 626
 627 static void rockchip_lvds_encoder_enable(struct drm_encoder *encoder)
 628 {
 629         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 630
 631         rockchip_lvds_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
 632         rockchip_lvds_grf_config(encoder, &lvds->mode);
 633         rockchip_lvds_set_vop_source(lvds, encoder);
 634 }
 635
 636 static void rockchip_lvds_encoder_disable(struct drm_encoder *encoder)
 637 {
 638         rockchip_lvds_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
 639 }
 640
 641 static int rockchip_lvds_encoder_loader_protect(struct drm_encoder *encoder,
 642                                                 bool on)
 643 {
 644         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 645
 646         if (on)
 647                 pm_runtime_get_sync(lvds->dev);
 648         else
 649                 pm_runtime_put(lvds->dev);
 650
 651         return 0;
 652 }
 653
 654 static const
 655 struct drm_encoder_helper_funcs rockchip_lvds_encoder_helper_funcs = {
 656         .mode_fixup = rockchip_lvds_encoder_mode_fixup,
 657         .mode_set = rockchip_lvds_encoder_mode_set,
 658         .enable = rockchip_lvds_encoder_enable,
 659         .disable = rockchip_lvds_encoder_disable,
 660         .atomic_check = rockchip_lvds_encoder_atomic_check,
 661         .loader_protect = rockchip_lvds_encoder_loader_protect,
 662 };
 663
 664 static void rockchip_lvds_encoder_destroy(struct drm_encoder *encoder)
 665 {
 666         drm_encoder_cleanup(encoder);
 667 }
 668
 669 static const struct drm_encoder_funcs rockchip_lvds_encoder_funcs = {
 670         .destroy = rockchip_lvds_encoder_destroy,
 671 };
 672
 673 static struct rockchip_lvds_soc_data rk3288_lvds_data = {
 674         .chip_type = RK3288_LVDS,
 675         .grf_soc_con6 = 0x025c,
 676         .grf_soc_con7 = 0x0260,
 677         .has_vop_sel = true,
 678 };
 679
 680 static struct rockchip_lvds_soc_data rk3366_lvds_data = {
 681         .chip_type = RK336X_LVDS,
 682         .grf_soc_con7  = RK3366_GRF_SOC_CON5,
 683         .grf_soc_con15 = RK3366_GRF_SOC_CON6,
 684         .has_vop_sel = true,
 685 };
 686
 687 static struct rockchip_lvds_soc_data rk3368_lvds_data = {
 688         .chip_type = RK336X_LVDS,
 689         .grf_soc_con7  = RK3368_GRF_SOC_CON7,
 690         .grf_soc_con15 = RK3368_GRF_SOC_CON15,
 691         .has_vop_sel = false,
 692 };
 693
 694 static const struct of_device_id rockchip_lvds_dt_ids[] = {
 695         {
 696                 .compatible = "rockchip,rk3288-lvds",
 697                 .data = &rk3288_lvds_data
 698         },
 699         {
 700                 .compatible = "rockchip,rk3366-lvds",
 701                 .data = &rk3366_lvds_data
 702         },
 703         {
 704                 .compatible = "rockchip,rk3368-lvds",
 705                 .data = &rk3368_lvds_data
 706         },
 707         {}
 708 };
 709 MODULE_DEVICE_TABLE(of, rockchip_lvds_dt_ids);
 710
 711 static int rockchip_lvds_bind(struct device *dev, struct device *master,
 712                              void *data)
 713 {
 714         struct rockchip_lvds *lvds = dev_get_drvdata(dev);
 715         struct drm_device *drm_dev = data;
 716         struct drm_encoder *encoder;
 717         struct drm_connector *connector;
 718         struct device_node *remote = NULL;
 719         struct device_node  *port, *endpoint;
 720         int ret, i;
 721         const char *name;
 722         lvds->drm_dev = drm_dev;
 723
 724         port = of_graph_get_port_by_id(dev->of_node, 1);
 725         if (!port) {
 726                 dev_err(dev, "can't found port point, please init lvds panel port!\n");
 727                 return -EINVAL;
 728         }
 729
 730         for_each_child_of_node(port, endpoint) {
 731                 remote = of_graph_get_remote_port_parent(endpoint);
 732                 if (!remote) {
 733                         dev_err(dev, "can't found panel node, please init!\n");
 734                         ret = -EINVAL;
 735                         goto err_put_port;
 736                 }
 737                 if (!of_device_is_available(remote)) {
 738                         of_node_put(remote);
 739                         remote = NULL;
 740                         continue;
 741                 }
 742                 break;
 743         }
 744         if (!remote) {
 745                 dev_err(dev, "can't found remote node, please init!\n");
 746                 ret = -EINVAL;
 747                 goto err_put_port;
 748         }
 749
 750         lvds->panel = of_drm_find_panel(remote);
 751         if (!lvds->panel)
 752                 lvds->bridge = of_drm_find_bridge(remote);
 753
 754         if (!lvds->panel && !lvds->bridge) {
 755                 DRM_ERROR("failed to find panel and bridge node\n");
 756                 ret  = -EPROBE_DEFER;
 757                 goto err_put_remote;
 758         }
 759
 760         if (of_property_read_string(remote, "rockchip,output", &name))
 761                 /* default set it as output rgb */
 762                 lvds->output = DISPLAY_OUTPUT_RGB;
 763         else
 764                 lvds->output = lvds_name_to_output(name);
 765
 766         if (lvds->output < 0) {
 767                 dev_err(dev, "invalid output type [%s]\n", name);
 768                 ret = lvds->output;
 769                 goto err_put_remote;
 770         }
 771
 772         if (of_property_read_string(remote, "rockchip,data-mapping",
 773                                     &name))
 774                 /* default set it as format jeida */
 775                 lvds->format = LVDS_FORMAT_JEIDA;
 776         else
 777                 lvds->format = lvds_name_to_format(name);
 778
 779         if (lvds->format < 0) {
 780                 dev_err(dev, "invalid data-mapping format [%s]\n", name);
 781                 ret = lvds->format;
 782                 goto err_put_remote;
 783         }
 784
 785         if (of_property_read_u32(remote, "rockchip,data-width", &i)) {
 786                 lvds->format |= LVDS_24BIT;
 787         } else {
 788                 if (i == 24) {
 789                         lvds->format |= LVDS_24BIT;
 790                 } else if (i == 18) {
 791                         lvds->format |= LVDS_18BIT;
 792                 } else {
 793                         dev_err(dev,
 794                                 "rockchip-lvds unsupport data-width[%d]\n", i);
 795                         ret = -EINVAL;
 796                         goto err_put_remote;
 797                 }
 798         }
 799
 800         encoder = &lvds->encoder;
 801         encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
 802                                                              dev->of_node);
 803
 804         ret = drm_encoder_init(drm_dev, encoder, &rockchip_lvds_encoder_funcs,
 805                                DRM_MODE_ENCODER_LVDS, NULL);
 806         if (ret < 0) {
 807                 DRM_ERROR("failed to initialize encoder with drm\n");
 808                 goto err_put_remote;
 809         }
 810
 811         drm_encoder_helper_add(encoder, &rockchip_lvds_encoder_helper_funcs);
 812         encoder->port = dev->of_node;
 813
 814         if (lvds->panel) {
 815                 connector = &lvds->connector;
 816                 connector->dpms = DRM_MODE_DPMS_OFF;
 817                 ret = drm_connector_init(drm_dev, connector,
 818                                          &rockchip_lvds_connector_funcs,
 819                                          DRM_MODE_CONNECTOR_LVDS);
 820                 if (ret < 0) {
 821                         DRM_ERROR("failed to initialize connector with drm\n");
 822                         goto err_free_encoder;
 823                 }
 824
 825                 drm_connector_helper_add(connector,
 826                                          &rockchip_lvds_connector_helper_funcs);
 827
 828                 ret = drm_mode_connector_attach_encoder(connector, encoder);
 829                 if (ret < 0) {
 830                         DRM_ERROR("failed to attach connector and encoder\n");
 831                         goto err_free_connector;
 832                 }
 833
 834                 ret = drm_panel_attach(lvds->panel, connector);
 835                 if (ret < 0) {
 836                         DRM_ERROR("failed to attach connector and encoder\n");
 837                         goto err_free_connector;
 838                 }
 839                 lvds->connector.port = dev->of_node;
 840         } else {
 841                 lvds->bridge->encoder = encoder;
 842                 ret = drm_bridge_attach(drm_dev, lvds->bridge);
 843                 if (ret) {
 844                         DRM_ERROR("Failed to attach bridge to drm\n");
 845                         goto err_free_encoder;
 846                 }
 847                 encoder->bridge = lvds->bridge;
 848         }
 849
 850         pm_runtime_enable(dev);
 851         of_node_put(remote);
 852         of_node_put(port);
 853
 854         return 0;
 855
 856 err_free_connector:
 857         drm_connector_cleanup(connector);
 858 err_free_encoder:
 859         drm_encoder_cleanup(encoder);
 860 err_put_remote:
 861         of_node_put(remote);
 862 err_put_port:
 863         of_node_put(port);
 864
 865         return ret;
 866 }
 867
 868 static void rockchip_lvds_unbind(struct device *dev, struct device *master,
 869                                 void *data)
 870 {
 871         struct rockchip_lvds *lvds = dev_get_drvdata(dev);
 872
 873         rockchip_lvds_encoder_dpms(&lvds->encoder, DRM_MODE_DPMS_OFF);
 874
 875         drm_panel_detach(lvds->panel);
 876
 877         drm_connector_cleanup(&lvds->connector);
 878         drm_encoder_cleanup(&lvds->encoder);
 879
 880         pm_runtime_disable(dev);
 881 }
 882
 883 static const struct component_ops rockchip_lvds_component_ops = {
 884         .bind = rockchip_lvds_bind,
 885         .unbind = rockchip_lvds_unbind,
 886 };
 887
 888 static int rockchip_lvds_probe(struct platform_device *pdev)
 889 {
 890         struct device *dev = &pdev->dev;
 891         struct rockchip_lvds *lvds;
 892         const struct of_device_id *match;
 893         struct resource *res;
 894         int ret;
 895
 896         if (!dev->of_node)
 897                 return -ENODEV;
 898
 899         lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL);
 900         if (!lvds)
 901                 return -ENOMEM;
 902
 903         lvds->dev = dev;
 904         lvds->suspend = true;
 905         match = of_match_node(rockchip_lvds_dt_ids, dev->of_node);
 906         lvds->soc_data = match->data;
 907
 908         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 909                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 910                 lvds->regs = devm_ioremap_resource(&pdev->dev, res);
 911                 if (IS_ERR(lvds->regs))
 912                         return PTR_ERR(lvds->regs);
 913         } else if (LVDS_CHIP(lvds) == RK336X_LVDS) {
 914                 /* lvds regs on MIPIPHY_REG */
 915                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 916                                                    "mipi_lvds_phy");
 917                 lvds->regs = devm_ioremap_resource(&pdev->dev, res);
 918                 if (IS_ERR(lvds->regs)) {
 919                         dev_err(&pdev->dev, "ioremap lvds phy reg failed\n");
 920                         return PTR_ERR(lvds->regs);
 921                 }
 922
 923                 /* pll lock on status reg that is MIPICTRL Register */
 924                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 925                                                    "mipi_lvds_ctl");
 926                 lvds->regs_ctrl = devm_ioremap_resource(&pdev->dev, res);
 927                 if (IS_ERR(lvds->regs_ctrl)) {
 928                         dev_err(&pdev->dev, "ioremap lvds ctl reg failed\n");
 929                         return PTR_ERR(lvds->regs_ctrl);
 930                 }
 931                 /* mipi ctrl clk for read lvds phy lock state */
 932                 lvds->pclk_ctrl = devm_clk_get(&pdev->dev, "pclk_lvds_ctl");
 933                 if (IS_ERR(lvds->pclk_ctrl)) {
 934                         dev_err(dev, "could not get pclk_ctrl\n");
 935                         lvds->pclk_ctrl = NULL;
 936                 }
 937         }
 938         lvds->pclk = devm_clk_get(&pdev->dev, "pclk_lvds");
 939         if (IS_ERR(lvds->pclk)) {
 940                 dev_err(dev, "could not get pclk_lvds\n");
 941                 return PTR_ERR(lvds->pclk);
 942         }
 943
 944         lvds->pins = devm_kzalloc(lvds->dev, sizeof(*lvds->pins),
 945                                   GFP_KERNEL);
 946         if (!lvds->pins)
 947                 return -ENOMEM;
 948
 949         lvds->pins->p = devm_pinctrl_get(lvds->dev);
 950         if (IS_ERR(lvds->pins->p)) {
 951                 dev_info(lvds->dev, "no pinctrl handle\n");
 952                 devm_kfree(lvds->dev, lvds->pins);
 953                 lvds->pins = NULL;
 954         } else {
 955                 lvds->pins->default_state =
 956                         pinctrl_lookup_state(lvds->pins->p, "lcdc");
 957                 if (IS_ERR(lvds->pins->default_state)) {
 958                         dev_info(lvds->dev, "no lcdc pinctrl state\n");
 959                         devm_kfree(lvds->dev, lvds->pins);
 960                         lvds->pins = NULL;
 961                 }
 962         }
 963
 964         lvds->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
 965                                                     "rockchip,grf");
 966         if (IS_ERR(lvds->grf)) {
 967                 dev_err(dev, "missing rockchip,grf property\n");
 968                 return PTR_ERR(lvds->grf);
 969         }
 970
 971         dev_set_drvdata(dev, lvds);
 972         mutex_init(&lvds->suspend_lock);
 973
 974         if (lvds->pclk) {
 975                 ret = clk_prepare(lvds->pclk);
 976                 if (ret < 0) {
 977                         dev_err(dev, "failed to prepare pclk_lvds\n");
 978                         return ret;
 979                 }
 980         }
 981         if (lvds->pclk_ctrl) {
 982                 ret = clk_prepare(lvds->pclk_ctrl);
 983                 if (ret < 0) {
 984                         dev_err(dev, "failed to prepare pclk_ctrl lvds\n");
 985                         return ret;
 986                 }
 987         }
 988         ret = component_add(&pdev->dev, &rockchip_lvds_component_ops);
 989         if (ret < 0) {
 990                 if (lvds->pclk)
 991                         clk_unprepare(lvds->pclk);
 992                 if (lvds->pclk_ctrl)
 993                         clk_unprepare(lvds->pclk_ctrl);
 994         }
 995
 996         return ret;
 997 }
 998
 999 static int rockchip_lvds_remove(struct platform_device *pdev)
1000 {
1001         struct rockchip_lvds *lvds = dev_get_drvdata(&pdev->dev);
1002
1003         component_del(&pdev->dev, &rockchip_lvds_component_ops);
1004         if (lvds->pclk)
1005                 clk_unprepare(lvds->pclk);
1006         if (lvds->pclk_ctrl)
1007                 clk_unprepare(lvds->pclk_ctrl);
1008         return 0;
1009 }
1010
1011 struct platform_driver rockchip_lvds_driver = {
1012         .probe = rockchip_lvds_probe,
1013         .remove = rockchip_lvds_remove,
1014         .driver = {
1015                    .name = "rockchip-lvds",
1016                    .of_match_table = of_match_ptr(rockchip_lvds_dt_ids),
1017         },
1018 };
1019 module_platform_driver(rockchip_lvds_driver);
1020
1021 MODULE_AUTHOR("Mark Yao <mark.yao@rock-chips.com>");
1022 MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
1023 MODULE_DESCRIPTION("ROCKCHIP LVDS Driver");
1024 MODULE_LICENSE("GPL v2");