drivers/gpu/drm/rockchip/rockchip_lvds.c

   1 /*
   2  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
   3  * Author:
   4  *      Mark Yao <mark.yao@rock-chips.com>
   5  *
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <drm/drmP.h>
  17 #include <drm/drm_atomic_helper.h>
  18 #include <drm/drm_crtc_helper.h>
  19 #include <drm/drm_dp_helper.h>
  20 #include <drm/drm_panel.h>
  21 #include <drm/drm_of.h>
  22
  23 #include <linux/component.h>
  24 #include <linux/clk.h>
  25 #include <linux/mfd/syscon.h>
  26 #include <linux/of_graph.h>
  27 #include <linux/pm_runtime.h>
  28 #include <linux/regmap.h>
  29 #include <linux/reset.h>
  30
  31 #include <video/display_timing.h>
  32
  33 #include "rockchip_drm_drv.h"
  34 #include "rockchip_drm_vop.h"
  35 #include "rockchip_lvds.h"
  36
  37 #define DISPLAY_OUTPUT_RGB              0
  38 #define DISPLAY_OUTPUT_LVDS             1
  39 #define DISPLAY_OUTPUT_DUAL_LVDS        2
  40
  41 #define connector_to_lvds(c) \
  42                 container_of(c, struct rockchip_lvds, connector)
  43
  44 #define encoder_to_lvds(c) \
  45                 container_of(c, struct rockchip_lvds, encoder)
  46 #define LVDS_CHIP(lvds) ((lvds)->soc_data->chip_type)
  47
  48 /*
  49  * @grf_offset: offset inside the grf regmap for setting the rockchip lvds
  50  */
  51 struct rockchip_lvds_soc_data {
  52         int chip_type;
  53         int grf_soc_con5;
  54         int grf_soc_con6;
  55         int grf_soc_con7;
  56         int grf_soc_con15;
  57
  58         bool has_vop_sel;
  59 };
  60
  61 struct rockchip_lvds {
  62         void *base;
  63         struct device *dev;
  64         void __iomem *regs;
  65         void __iomem *regs_ctrl;
  66         struct regmap *grf;
  67         struct clk *pclk;
  68         struct clk *pclk_ctrl;
  69         const struct rockchip_lvds_soc_data *soc_data;
  70
  71         int output;
  72         int format;
  73
  74         struct drm_device *drm_dev;
  75         struct drm_panel *panel;
  76         struct drm_bridge *bridge;
  77         struct drm_connector connector;
  78         struct drm_encoder encoder;
  79
  80         struct mutex suspend_lock;
  81         int suspend;
  82         struct dev_pin_info *pins;
  83         struct drm_display_mode mode;
  84 };
  85
  86 static inline void lvds_writel(struct rockchip_lvds *lvds, u32 offset, u32 val)
  87 {
  88         writel_relaxed(val, lvds->regs + offset);
  89         if ((lvds->output == DISPLAY_OUTPUT_DUAL_LVDS) &&
  90             (LVDS_CHIP(lvds) == RK3288_LVDS))
  91                 writel_relaxed(val, lvds->regs + offset + 0x100);
  92 }
  93
  94 static inline void lvds_msk_reg(struct rockchip_lvds *lvds, u32 offset,
  95                                 u32 msk, u32 val)
  96 {
  97         u32 temp;
  98
  99         temp = readl_relaxed(lvds->regs + offset) & (0xFF - (msk));
 100         writel_relaxed(temp | ((val) & (msk)), lvds->regs + offset);
 101 }
 102
 103 static inline void lvds_dsi_writel(struct rockchip_lvds *lvds,
 104                                    u32 offset, u32 val)
 105 {
 106         writel_relaxed(val, lvds->regs_ctrl + offset);
 107 }
 108
 109 static inline u32 lvds_phy_lockon(struct rockchip_lvds *lvds)
 110 {
 111         u32 val = 0;
 112
 113         val = readl_relaxed(lvds->regs_ctrl + 0x10);
 114         return (val & 0x01);
 115 }
 116
 117 static inline int lvds_name_to_format(const char *s)
 118 {
 119         if (!s)
 120                 return -EINVAL;
 121
 122         if (strncmp(s, "jeida", 6) == 0)
 123                 return LVDS_FORMAT_JEIDA;
 124         else if (strncmp(s, "vesa", 5) == 0)
 125                 return LVDS_FORMAT_VESA;
 126
 127         return -EINVAL;
 128 }
 129
 130 static inline int lvds_name_to_output(const char *s)
 131 {
 132         if (!s)
 133                 return -EINVAL;
 134
 135         if (strncmp(s, "rgb", 3) == 0)
 136                 return DISPLAY_OUTPUT_RGB;
 137         else if (strncmp(s, "lvds", 4) == 0)
 138                 return DISPLAY_OUTPUT_LVDS;
 139         else if (strncmp(s, "duallvds", 8) == 0)
 140                 return DISPLAY_OUTPUT_DUAL_LVDS;
 141
 142         return -EINVAL;
 143 }
 144
 145 static int rk3288_lvds_poweron(struct rockchip_lvds *lvds)
 146 {
 147         if (lvds->output == DISPLAY_OUTPUT_RGB) {
 148                 lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
 149                             RK3288_LVDS_CH0_REG0_TTL_EN |
 150                             RK3288_LVDS_CH0_REG0_LANECK_EN |
 151                             RK3288_LVDS_CH0_REG0_LANE4_EN |
 152                             RK3288_LVDS_CH0_REG0_LANE3_EN |
 153                             RK3288_LVDS_CH0_REG0_LANE2_EN |
 154                             RK3288_LVDS_CH0_REG0_LANE1_EN |
 155                             RK3288_LVDS_CH0_REG0_LANE0_EN);
 156                 lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
 157                             RK3288_LVDS_PLL_FBDIV_REG2(0x46));
 158
 159                 lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
 160                             RK3288_LVDS_PLL_FBDIV_REG3(0x46));
 161                 lvds_writel(lvds, RK3288_LVDS_CH0_REG4,
 162                             RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE |
 163                             RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE |
 164                             RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE |
 165                             RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE |
 166                             RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE |
 167                             RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE);
 168                 lvds_writel(lvds, RK3288_LVDS_CH0_REG5,
 169                             RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA |
 170                             RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA |
 171                             RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA |
 172                             RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA |
 173                             RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA |
 174                             RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA);
 175                 lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
 176                             RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
 177                 lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
 178                             RK3288_LVDS_CH0_REG20_LSB);
 179         } else {
 180                 lvds_writel(lvds, RK3288_LVDS_CH0_REG0,
 181                             RK3288_LVDS_CH0_REG0_LVDS_EN |
 182                             RK3288_LVDS_CH0_REG0_LANECK_EN |
 183                             RK3288_LVDS_CH0_REG0_LANE4_EN |
 184                             RK3288_LVDS_CH0_REG0_LANE3_EN |
 185                             RK3288_LVDS_CH0_REG0_LANE2_EN |
 186                             RK3288_LVDS_CH0_REG0_LANE1_EN |
 187                             RK3288_LVDS_CH0_REG0_LANE0_EN);
 188                 lvds_writel(lvds, RK3288_LVDS_CH0_REG1,
 189                             RK3288_LVDS_CH0_REG1_LANECK_BIAS |
 190                             RK3288_LVDS_CH0_REG1_LANE4_BIAS |
 191                             RK3288_LVDS_CH0_REG1_LANE3_BIAS |
 192                             RK3288_LVDS_CH0_REG1_LANE2_BIAS |
 193                             RK3288_LVDS_CH0_REG1_LANE1_BIAS |
 194                             RK3288_LVDS_CH0_REG1_LANE0_BIAS);
 195                 lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
 196                             RK3288_LVDS_CH0_REG2_RESERVE_ON |
 197                             RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE |
 198                             RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE |
 199                             RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE |
 200                             RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE |
 201                             RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE |
 202                             RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE |
 203                             RK3288_LVDS_PLL_FBDIV_REG2(0x46));
 204                 lvds_writel(lvds, RK3288_LVDS_CH0_REG3,
 205                             RK3288_LVDS_PLL_FBDIV_REG3(0x46));
 206                 lvds_writel(lvds, RK3288_LVDS_CH0_REG4, 0x00);
 207                 lvds_writel(lvds, RK3288_LVDS_CH0_REG5, 0x00);
 208                 lvds_writel(lvds, RK3288_LVDS_CH0_REGD,
 209                             RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
 210                 lvds_writel(lvds, RK3288_LVDS_CH0_REG20,
 211                             RK3288_LVDS_CH0_REG20_LSB);
 212         }
 213
 214         writel(RK3288_LVDS_CFG_REGC_PLL_ENABLE,
 215                lvds->regs + RK3288_LVDS_CFG_REGC);
 216         writel(RK3288_LVDS_CFG_REG21_TX_ENABLE,
 217                lvds->regs + RK3288_LVDS_CFG_REG21);
 218
 219         return 0;
 220 }
 221
 222 static int rk336x_lvds_poweron(struct rockchip_lvds *lvds)
 223 {
 224         u32 delay_times = 20;
 225         u32 val;
 226
 227         if (lvds->output == DISPLAY_OUTPUT_RGB) {
 228                 /* enable lane */
 229                 lvds_writel(lvds, MIPIPHY_REG0, 0x7f);
 230                 val = v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
 231                         v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(1);
 232                 lvds_writel(lvds, MIPIPHY_REGEB, val);
 233
 234                 /* set ttl mode and reset phy config */
 235                 val = v_LVDS_MODE_EN(0) | v_TTL_MODE_EN(1) | v_MIPI_MODE_EN(0) |
 236                         v_MSB_SEL(1) | v_DIG_INTER_RST(1);
 237                 lvds_writel(lvds, MIPIPHY_REGE0, val);
 238
 239                 lvds_msk_reg(lvds, MIPIPHY_REGE3,
 240                              m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
 241                              v_MIPI_EN(0) | v_LVDS_EN(0) | v_TTL_EN(1));
 242         } else {
 243                 /* digital internal disable */
 244                 lvds_msk_reg(lvds, MIPIPHY_REGE1,
 245                              m_DIG_INTER_EN, v_DIG_INTER_EN(0));
 246
 247                 /* set pll prediv and fbdiv */
 248                 lvds_writel(lvds, MIPIPHY_REG3, v_PREDIV(2) | v_FBDIV_MSB(0));
 249                 lvds_writel(lvds, MIPIPHY_REG4, v_FBDIV_LSB(28));
 250
 251                 lvds_writel(lvds, MIPIPHY_REGE8, 0xfc);
 252
 253                 /* set lvds mode and reset phy config */
 254                 lvds_msk_reg(lvds, MIPIPHY_REGE0,
 255                              m_MSB_SEL | m_DIG_INTER_RST,
 256                              v_MSB_SEL(1) | v_DIG_INTER_RST(1));
 257
 258                 /* set VOCM 900 mv and V-DIFF 350 mv */
 259                 lvds_msk_reg(lvds, MIPIPHY_REGE4, m_VOCM | m_DIFF_V,
 260                              v_VOCM(0) | v_DIFF_V(2));
 261                 /* power up lvds pll and ldo */
 262                 lvds_msk_reg(lvds, MIPIPHY_REG1,
 263                              m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
 264                              v_SYNC_RST(0) | v_LDO_PWR_DOWN(0) |
 265                              v_PLL_PWR_DOWN(0));
 266                 /* enable lvds lane and power on pll */
 267                 lvds_writel(lvds, MIPIPHY_REGEB,
 268                             v_LANE0_EN(1) | v_LANE1_EN(1) | v_LANE2_EN(1) |
 269                             v_LANE3_EN(1) | v_LANECLK_EN(1) | v_PLL_PWR_OFF(0));
 270
 271                 /* enable lvds */
 272                 lvds_msk_reg(lvds, MIPIPHY_REGE3,
 273                              m_MIPI_EN | m_LVDS_EN | m_TTL_EN,
 274                              v_MIPI_EN(0) | v_LVDS_EN(1) | v_TTL_EN(0));
 275
 276                 /* delay for waitting pll lock on */
 277                 while (delay_times--) {
 278                         if (lvds_phy_lockon(lvds))
 279                                 break;
 280                         usleep_range(100, 200);
 281                 }
 282
 283                 if (delay_times <= 0)
 284                         dev_err(lvds->dev,
 285                                 "wait phy lockon failed, please check hardware\n");
 286
 287                 lvds_msk_reg(lvds, MIPIPHY_REGE1,
 288                              m_DIG_INTER_EN, v_DIG_INTER_EN(1));
 289         }
 290
 291         return 0;
 292 }
 293
 294 static int rockchip_lvds_poweron(struct rockchip_lvds *lvds)
 295 {
 296         int ret;
 297
 298         if (lvds->pclk) {
 299                 ret = clk_enable(lvds->pclk);
 300                 if (ret < 0) {
 301                         dev_err(lvds->dev, "failed to enable lvds pclk %d\n", ret);
 302                         return ret;
 303                 }
 304         }
 305         if (lvds->pclk_ctrl) {
 306                 ret = clk_enable(lvds->pclk_ctrl);
 307                 if (ret < 0) {
 308                         dev_err(lvds->dev, "failed to enable lvds pclk_ctrl %d\n", ret);
 309                         return ret;
 310                 }
 311         }
 312
 313         ret = pm_runtime_get_sync(lvds->dev);
 314         if (ret < 0) {
 315                 dev_err(lvds->dev, "failed to get pm runtime: %d\n", ret);
 316                 return ret;
 317         }
 318         if (LVDS_CHIP(lvds) == RK3288_LVDS)
 319                 rk3288_lvds_poweron(lvds);
 320         else if (LVDS_CHIP(lvds) == RK336X_LVDS)
 321                 rk336x_lvds_poweron(lvds);
 322
 323         return 0;
 324 }
 325
 326 static void rockchip_lvds_poweroff(struct rockchip_lvds *lvds)
 327 {
 328         int ret;
 329         u32 val;
 330
 331         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 332                 writel(RK3288_LVDS_CFG_REG21_TX_DISABLE,
 333                        lvds->regs + RK3288_LVDS_CFG_REG21);
 334                 writel(RK3288_LVDS_CFG_REGC_PLL_DISABLE,
 335                        lvds->regs + RK3288_LVDS_CFG_REGC);
 336                 ret = regmap_write(lvds->grf,
 337                                    lvds->soc_data->grf_soc_con7, 0xffff8000);
 338                 if (ret != 0)
 339                         dev_err(lvds->dev, "Could not write to GRF: %d\n", ret);
 340
 341                 pm_runtime_put(lvds->dev);
 342                 if (lvds->pclk)
 343                         clk_disable(lvds->pclk);
 344         } else if (LVDS_CHIP(lvds) == RK336X_LVDS) {
 345                 val = v_RK336X_LVDSMODE_EN(0) | v_RK336X_MIPIPHY_TTL_EN(0);
 346                 ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val);
 347                 if (ret != 0) {
 348                         dev_err(lvds->dev, "Could not write to GRF: %d\n", ret);
 349                         return;
 350                 }
 351
 352                 /* disable lvds lane and power off pll */
 353                 lvds_writel(lvds, MIPIPHY_REGEB,
 354                             v_LANE0_EN(0) | v_LANE1_EN(0) | v_LANE2_EN(0) |
 355                             v_LANE3_EN(0) | v_LANECLK_EN(0) | v_PLL_PWR_OFF(1));
 356
 357                 /* power down lvds pll and bandgap */
 358                 lvds_msk_reg(lvds, MIPIPHY_REG1,
 359                              m_SYNC_RST | m_LDO_PWR_DOWN | m_PLL_PWR_DOWN,
 360                              v_SYNC_RST(1) | v_LDO_PWR_DOWN(1) | v_PLL_PWR_DOWN(1));
 361
 362                 /* disable lvds */
 363                 lvds_msk_reg(lvds, MIPIPHY_REGE3, m_LVDS_EN | m_TTL_EN,
 364                              v_LVDS_EN(0) | v_TTL_EN(0));
 365                 pm_runtime_put(lvds->dev);
 366                 if (lvds->pclk)
 367                         clk_disable(lvds->pclk);
 368                 if (lvds->pclk_ctrl)
 369                         clk_disable(lvds->pclk_ctrl);
 370         }
 371 }
 372
 373 static enum drm_connector_status
 374 rockchip_lvds_connector_detect(struct drm_connector *connector, bool force)
 375 {
 376         return connector_status_connected;
 377 }
 378
 379 static void rockchip_lvds_connector_destroy(struct drm_connector *connector)
 380 {
 381         drm_connector_cleanup(connector);
 382 }
 383
 384 static struct drm_connector_funcs rockchip_lvds_connector_funcs = {
 385         .dpms = drm_atomic_helper_connector_dpms,
 386         .detect = rockchip_lvds_connector_detect,
 387         .fill_modes = drm_helper_probe_single_connector_modes,
 388         .destroy = rockchip_lvds_connector_destroy,
 389         .reset = drm_atomic_helper_connector_reset,
 390         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 391         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 392 };
 393
 394 static int rockchip_lvds_connector_get_modes(struct drm_connector *connector)
 395 {
 396         struct rockchip_lvds *lvds = connector_to_lvds(connector);
 397         struct drm_panel *panel = lvds->panel;
 398
 399         return panel->funcs->get_modes(panel);
 400 }
 401
 402 static struct drm_encoder *
 403 rockchip_lvds_connector_best_encoder(struct drm_connector *connector)
 404 {
 405         struct rockchip_lvds *lvds = connector_to_lvds(connector);
 406
 407         return &lvds->encoder;
 408 }
 409
 410 static enum drm_mode_status rockchip_lvds_connector_mode_valid(
 411                 struct drm_connector *connector,
 412                 struct drm_display_mode *mode)
 413 {
 414         return MODE_OK;
 415 }
 416
 417 static
 418 int rockchip_lvds_connector_loader_protect(struct drm_connector *connector,
 419                                            bool on)
 420 {
 421         struct rockchip_lvds *lvds = connector_to_lvds(connector);
 422
 423         if (lvds->panel)
 424                 drm_panel_loader_protect(lvds->panel, on);
 425
 426         return 0;
 427 }
 428
 429 static
 430 struct drm_connector_helper_funcs rockchip_lvds_connector_helper_funcs = {
 431         .get_modes = rockchip_lvds_connector_get_modes,
 432         .mode_valid = rockchip_lvds_connector_mode_valid,
 433         .best_encoder = rockchip_lvds_connector_best_encoder,
 434         .loader_protect = rockchip_lvds_connector_loader_protect,
 435 };
 436
 437 static void rockchip_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
 438 {
 439         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 440         int ret;
 441
 442         mutex_lock(&lvds->suspend_lock);
 443
 444         switch (mode) {
 445         case DRM_MODE_DPMS_ON:
 446                 if (!lvds->suspend)
 447                         goto out;
 448
 449                 drm_panel_prepare(lvds->panel);
 450                 ret = rockchip_lvds_poweron(lvds);
 451                 if (ret < 0) {
 452                         drm_panel_unprepare(lvds->panel);
 453                         goto out;
 454                 }
 455                 drm_panel_enable(lvds->panel);
 456
 457                 lvds->suspend = false;
 458                 break;
 459         case DRM_MODE_DPMS_STANDBY:
 460         case DRM_MODE_DPMS_SUSPEND:
 461         case DRM_MODE_DPMS_OFF:
 462                 if (lvds->suspend)
 463                         goto out;
 464
 465                 drm_panel_disable(lvds->panel);
 466                 rockchip_lvds_poweroff(lvds);
 467                 drm_panel_unprepare(lvds->panel);
 468
 469                 lvds->suspend = true;
 470                 break;
 471         default:
 472                 break;
 473         }
 474
 475 out:
 476         mutex_unlock(&lvds->suspend_lock);
 477 }
 478
 479 static bool
 480 rockchip_lvds_encoder_mode_fixup(struct drm_encoder *encoder,
 481                                 const struct drm_display_mode *mode,
 482                                 struct drm_display_mode *adjusted_mode)
 483 {
 484         return true;
 485 }
 486
 487 static void rockchip_lvds_encoder_mode_set(struct drm_encoder *encoder,
 488                                           struct drm_display_mode *mode,
 489                                           struct drm_display_mode *adjusted)
 490 {
 491         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 492
 493         drm_mode_copy(&lvds->mode, adjusted);
 494 }
 495
 496 static void rockchip_lvds_grf_config(struct drm_encoder *encoder,
 497                                      struct drm_display_mode *mode)
 498 {
 499         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 500         u32 h_bp = mode->htotal - mode->hsync_start;
 501         u8 pin_hsync = (mode->flags & DRM_MODE_FLAG_PHSYNC) ? 1 : 0;
 502         u8 pin_dclk = (mode->flags & DRM_MODE_FLAG_PCSYNC) ? 1 : 0;
 503         u32 val;
 504         int ret;
 505
 506         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 507                 val = lvds->format;
 508                 if (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)
 509                         val |= LVDS_DUAL | LVDS_CH0_EN | LVDS_CH1_EN;
 510                 else if (lvds->output == DISPLAY_OUTPUT_LVDS)
 511                         val |= LVDS_CH0_EN;
 512                 else if (lvds->output == DISPLAY_OUTPUT_RGB)
 513                         val |= LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN;
 514
 515                 if (h_bp & 0x01)
 516                         val |= LVDS_START_PHASE_RST_1;
 517
 518                 val |= (pin_dclk << 8) | (pin_hsync << 9);
 519                 val |= (0xffff << 16);
 520                 ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val);
 521                 if (ret != 0) {
 522                         dev_err(lvds->dev, "Could not write to GRF: %d\n", ret);
 523                         return;
 524                 }
 525         } else if (LVDS_CHIP(lvds) == RK336X_LVDS) {
 526                 if (lvds->output == DISPLAY_OUTPUT_RGB) {
 527                         /* iomux to lcdc */
 528                         if (lvds->pins && !IS_ERR(lvds->pins->default_state))
 529                                 pinctrl_select_state(lvds->pins->p,
 530                                                      lvds->pins->default_state);
 531
 532                         lvds_dsi_writel(lvds, 0x0, 0x4);/*set clock lane enable*/
 533                         /* enable lvds mode */
 534                         val = v_RK336X_LVDSMODE_EN(0) |
 535                                 v_RK336X_MIPIPHY_TTL_EN(1) |
 536                                 v_RK336X_MIPIPHY_LANE0_EN(1) |
 537                                 v_RK336X_MIPIDPI_FORCEX_EN(1);
 538                         ret = regmap_write(lvds->grf,
 539                                            lvds->soc_data->grf_soc_con7, val);
 540                         if (ret != 0) {
 541                                 dev_err(lvds->dev,
 542                                         "Could not write to GRF: %d\n", ret);
 543                                 return;
 544                         }
 545                         val = v_RK336X_FORCE_JETAG(0);
 546                         ret = regmap_write(lvds->grf,
 547                                            lvds->soc_data->grf_soc_con15, val);
 548                         if (ret != 0) {
 549                                 dev_err(lvds->dev,
 550                                         "Could not write to GRF: %d\n", ret);
 551                                 return;
 552                         }
 553                 } else if (lvds->output == DISPLAY_OUTPUT_LVDS) {
 554                         /* enable lvds mode */
 555                         val = v_RK336X_LVDSMODE_EN(1) |
 556                               v_RK336X_MIPIPHY_TTL_EN(0);
 557                         /* config lvds_format */
 558                         val |= v_RK336X_LVDS_OUTPUT_FORMAT(lvds->format);
 559                         /* LSB receive mode */
 560                         val |= v_RK336X_LVDS_MSBSEL(LVDS_MSB_D7);
 561                         val |= v_RK336X_MIPIPHY_LANE0_EN(1) |
 562                                v_RK336X_MIPIDPI_FORCEX_EN(1);
 563                         ret = regmap_write(lvds->grf,
 564                                            lvds->soc_data->grf_soc_con7, val);
 565                         if (ret != 0) {
 566                                 dev_err(lvds->dev,
 567                                         "Could not write to GRF: %d\n", ret);
 568                                 return;
 569                         }
 570                 }
 571         }
 572 }
 573
 574 static int rockchip_lvds_set_vop_source(struct rockchip_lvds *lvds,
 575                                         struct drm_encoder *encoder)
 576 {
 577         u32 val;
 578         int ret;
 579
 580         if (!lvds->soc_data->has_vop_sel)
 581                 return 0;
 582
 583         ret = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder);
 584         if (ret < 0)
 585                 return ret;
 586
 587         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 588                 if (ret)
 589                         val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT |
 590                               (RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16);
 591                 else
 592                         val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
 593
 594                 ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con6, val);
 595                 if (ret < 0)
 596                         return ret;
 597         } else {
 598                 if (ret)
 599                         val = RK3366_LVDS_VOP_SEL_LIT;
 600                 else
 601                         val = RK3366_LVDS_VOP_SEL_BIG;
 602                 regmap_write(lvds->grf, RK3366_GRF_SOC_CON0, val);
 603         }
 604
 605         return 0;
 606 }
 607
 608 static int
 609 rockchip_lvds_encoder_atomic_check(struct drm_encoder *encoder,
 610                                    struct drm_crtc_state *crtc_state,
 611                                    struct drm_connector_state *conn_state)
 612 {
 613         struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
 614         struct drm_connector *connector = conn_state->connector;
 615         struct drm_display_info *info = &connector->display_info;
 616
 617         s->output_mode = ROCKCHIP_OUT_MODE_P888;
 618         s->output_type = DRM_MODE_CONNECTOR_LVDS;
 619         if (info->num_bus_formats)
 620                 s->bus_format = info->bus_formats[0];
 621
 622         return 0;
 623 }
 624
 625 static void rockchip_lvds_encoder_enable(struct drm_encoder *encoder)
 626 {
 627         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 628
 629         rockchip_lvds_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
 630         rockchip_lvds_grf_config(encoder, &lvds->mode);
 631         rockchip_lvds_set_vop_source(lvds, encoder);
 632 }
 633
 634 static void rockchip_lvds_encoder_disable(struct drm_encoder *encoder)
 635 {
 636         rockchip_lvds_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
 637 }
 638
 639 static int rockchip_lvds_encoder_loader_protect(struct drm_encoder *encoder,
 640                                                 bool on)
 641 {
 642         struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
 643
 644         if (on)
 645                 pm_runtime_get_sync(lvds->dev);
 646         else
 647                 pm_runtime_put(lvds->dev);
 648
 649         return 0;
 650 }
 651
 652 static struct drm_encoder_helper_funcs rockchip_lvds_encoder_helper_funcs = {
 653         .mode_fixup = rockchip_lvds_encoder_mode_fixup,
 654         .mode_set = rockchip_lvds_encoder_mode_set,
 655         .enable = rockchip_lvds_encoder_enable,
 656         .disable = rockchip_lvds_encoder_disable,
 657         .atomic_check = rockchip_lvds_encoder_atomic_check,
 658         .loader_protect = rockchip_lvds_encoder_loader_protect,
 659 };
 660
 661 static void rockchip_lvds_encoder_destroy(struct drm_encoder *encoder)
 662 {
 663         drm_encoder_cleanup(encoder);
 664 }
 665
 666 static struct drm_encoder_funcs rockchip_lvds_encoder_funcs = {
 667         .destroy = rockchip_lvds_encoder_destroy,
 668 };
 669
 670 static struct rockchip_lvds_soc_data rk3288_lvds_data = {
 671         .chip_type = RK3288_LVDS,
 672         .grf_soc_con6 = 0x025c,
 673         .grf_soc_con7 = 0x0260,
 674         .has_vop_sel = true,
 675 };
 676
 677 static struct rockchip_lvds_soc_data rk3366_lvds_data = {
 678         .chip_type = RK336X_LVDS,
 679         .grf_soc_con7  = RK3366_GRF_SOC_CON5,
 680         .grf_soc_con15 = RK3366_GRF_SOC_CON6,
 681         .has_vop_sel = true,
 682 };
 683
 684 static struct rockchip_lvds_soc_data rk3368_lvds_data = {
 685         .chip_type = RK336X_LVDS,
 686         .grf_soc_con7  = RK3368_GRF_SOC_CON7,
 687         .grf_soc_con15 = RK3368_GRF_SOC_CON15,
 688         .has_vop_sel = false,
 689 };
 690
 691 static const struct of_device_id rockchip_lvds_dt_ids[] = {
 692         {
 693                 .compatible = "rockchip,rk3288-lvds",
 694                 .data = &rk3288_lvds_data
 695         },
 696         {
 697                 .compatible = "rockchip,rk3366-lvds",
 698                 .data = &rk3366_lvds_data
 699         },
 700         {
 701                 .compatible = "rockchip,rk3368-lvds",
 702                 .data = &rk3368_lvds_data
 703         },
 704         {}
 705 };
 706 MODULE_DEVICE_TABLE(of, rockchip_lvds_dt_ids);
 707
 708 static int rockchip_lvds_bind(struct device *dev, struct device *master,
 709                              void *data)
 710 {
 711         struct rockchip_lvds *lvds = dev_get_drvdata(dev);
 712         struct drm_device *drm_dev = data;
 713         struct drm_encoder *encoder;
 714         struct drm_connector *connector;
 715         struct device_node *remote = NULL;
 716         struct device_node  *port, *endpoint;
 717         int ret, i;
 718         const char *name;
 719         lvds->drm_dev = drm_dev;
 720
 721         port = of_graph_get_port_by_id(dev->of_node, 1);
 722         if (!port) {
 723                 dev_err(dev, "can't found port point, please init lvds panel port!\n");
 724                 return -EINVAL;
 725         }
 726
 727         for_each_child_of_node(port, endpoint) {
 728                 remote = of_graph_get_remote_port_parent(endpoint);
 729                 if (!remote) {
 730                         dev_err(dev, "can't found panel node, please init!\n");
 731                         ret = -EINVAL;
 732                         goto err_put_port;
 733                 }
 734                 if (!of_device_is_available(remote)) {
 735                         of_node_put(remote);
 736                         remote = NULL;
 737                         continue;
 738                 }
 739                 break;
 740         }
 741         if (!remote) {
 742                 dev_err(dev, "can't found remote node, please init!\n");
 743                 ret = -EINVAL;
 744                 goto err_put_port;
 745         }
 746
 747         lvds->panel = of_drm_find_panel(remote);
 748         if (!lvds->panel)
 749                 lvds->bridge = of_drm_find_bridge(remote);
 750
 751         if (!lvds->panel && !lvds->bridge) {
 752                 DRM_ERROR("failed to find panel and bridge node\n");
 753                 ret  = -EPROBE_DEFER;
 754                 goto err_put_remote;
 755         }
 756
 757         if (of_property_read_string(remote, "rockchip,output", &name))
 758                 /* default set it as output rgb */
 759                 lvds->output = DISPLAY_OUTPUT_RGB;
 760         else
 761                 lvds->output = lvds_name_to_output(name);
 762
 763         if (lvds->output < 0) {
 764                 dev_err(dev, "invalid output type [%s]\n", name);
 765                 ret = lvds->output;
 766                 goto err_put_remote;
 767         }
 768
 769         if (of_property_read_string(remote, "rockchip,data-mapping",
 770                                     &name))
 771                 /* default set it as format jeida */
 772                 lvds->format = LVDS_FORMAT_JEIDA;
 773         else
 774                 lvds->format = lvds_name_to_format(name);
 775
 776         if (lvds->format < 0) {
 777                 dev_err(dev, "invalid data-mapping format [%s]\n", name);
 778                 ret = lvds->format;
 779                 goto err_put_remote;
 780         }
 781
 782         if (of_property_read_u32(remote, "rockchip,data-width", &i)) {
 783                 lvds->format |= LVDS_24BIT;
 784         } else {
 785                 if (i == 24) {
 786                         lvds->format |= LVDS_24BIT;
 787                 } else if (i == 18) {
 788                         lvds->format |= LVDS_18BIT;
 789                 } else {
 790                         dev_err(dev,
 791                                 "rockchip-lvds unsupport data-width[%d]\n", i);
 792                         ret = -EINVAL;
 793                         goto err_put_remote;
 794                 }
 795         }
 796
 797         encoder = &lvds->encoder;
 798         encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
 799                                                              dev->of_node);
 800
 801         ret = drm_encoder_init(drm_dev, encoder, &rockchip_lvds_encoder_funcs,
 802                                DRM_MODE_ENCODER_LVDS, NULL);
 803         if (ret < 0) {
 804                 DRM_ERROR("failed to initialize encoder with drm\n");
 805                 goto err_put_remote;
 806         }
 807
 808         drm_encoder_helper_add(encoder, &rockchip_lvds_encoder_helper_funcs);
 809         encoder->port = dev->of_node;
 810
 811         if (lvds->panel) {
 812                 connector = &lvds->connector;
 813                 connector->dpms = DRM_MODE_DPMS_OFF;
 814                 ret = drm_connector_init(drm_dev, connector,
 815                                          &rockchip_lvds_connector_funcs,
 816                                          DRM_MODE_CONNECTOR_LVDS);
 817                 if (ret < 0) {
 818                         DRM_ERROR("failed to initialize connector with drm\n");
 819                         goto err_free_encoder;
 820                 }
 821
 822                 drm_connector_helper_add(connector,
 823                                          &rockchip_lvds_connector_helper_funcs);
 824
 825                 ret = drm_mode_connector_attach_encoder(connector, encoder);
 826                 if (ret < 0) {
 827                         DRM_ERROR("failed to attach connector and encoder\n");
 828                         goto err_free_connector;
 829                 }
 830
 831                 ret = drm_panel_attach(lvds->panel, connector);
 832                 if (ret < 0) {
 833                         DRM_ERROR("failed to attach connector and encoder\n");
 834                         goto err_free_connector;
 835                 }
 836                 lvds->connector.port = dev->of_node;
 837         } else {
 838                 lvds->bridge->encoder = encoder;
 839                 ret = drm_bridge_attach(drm_dev, lvds->bridge);
 840                 if (ret) {
 841                         DRM_ERROR("Failed to attach bridge to drm\n");
 842                         goto err_free_encoder;
 843                 }
 844                 encoder->bridge = lvds->bridge;
 845         }
 846
 847         pm_runtime_enable(dev);
 848         of_node_put(remote);
 849         of_node_put(port);
 850
 851         return 0;
 852
 853 err_free_connector:
 854         drm_connector_cleanup(connector);
 855 err_free_encoder:
 856         drm_encoder_cleanup(encoder);
 857 err_put_remote:
 858         of_node_put(remote);
 859 err_put_port:
 860         of_node_put(port);
 861
 862         return ret;
 863 }
 864
 865 static void rockchip_lvds_unbind(struct device *dev, struct device *master,
 866                                 void *data)
 867 {
 868         struct rockchip_lvds *lvds = dev_get_drvdata(dev);
 869
 870         rockchip_lvds_encoder_dpms(&lvds->encoder, DRM_MODE_DPMS_OFF);
 871
 872         drm_panel_detach(lvds->panel);
 873
 874         drm_connector_cleanup(&lvds->connector);
 875         drm_encoder_cleanup(&lvds->encoder);
 876
 877         pm_runtime_disable(dev);
 878 }
 879
 880 static const struct component_ops rockchip_lvds_component_ops = {
 881         .bind = rockchip_lvds_bind,
 882         .unbind = rockchip_lvds_unbind,
 883 };
 884
 885 static int rockchip_lvds_probe(struct platform_device *pdev)
 886 {
 887         struct device *dev = &pdev->dev;
 888         struct rockchip_lvds *lvds;
 889         const struct of_device_id *match;
 890         struct resource *res;
 891         int ret;
 892
 893         if (!dev->of_node)
 894                 return -ENODEV;
 895
 896         lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL);
 897         if (!lvds)
 898                 return -ENOMEM;
 899
 900         lvds->dev = dev;
 901         lvds->suspend = true;
 902         match = of_match_node(rockchip_lvds_dt_ids, dev->of_node);
 903         lvds->soc_data = match->data;
 904
 905         if (LVDS_CHIP(lvds) == RK3288_LVDS) {
 906                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 907                 lvds->regs = devm_ioremap_resource(&pdev->dev, res);
 908                 if (IS_ERR(lvds->regs))
 909                         return PTR_ERR(lvds->regs);
 910         } else if (LVDS_CHIP(lvds) == RK336X_LVDS) {
 911                 /* lvds regs on MIPIPHY_REG */
 912                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 913                                                    "mipi_lvds_phy");
 914                 lvds->regs = devm_ioremap_resource(&pdev->dev, res);
 915                 if (IS_ERR(lvds->regs)) {
 916                         dev_err(&pdev->dev, "ioremap lvds phy reg failed\n");
 917                         return PTR_ERR(lvds->regs);
 918                 }
 919
 920                 /* pll lock on status reg that is MIPICTRL Register */
 921                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 922                                                    "mipi_lvds_ctl");
 923                 lvds->regs_ctrl = devm_ioremap_resource(&pdev->dev, res);
 924                 if (IS_ERR(lvds->regs_ctrl)) {
 925                         dev_err(&pdev->dev, "ioremap lvds ctl reg failed\n");
 926                         return PTR_ERR(lvds->regs_ctrl);
 927                 }
 928                 /* mipi ctrl clk for read lvds phy lock state */
 929                 lvds->pclk_ctrl = devm_clk_get(&pdev->dev, "pclk_lvds_ctl");
 930                 if (IS_ERR(lvds->pclk_ctrl)) {
 931                         dev_err(dev, "could not get pclk_ctrl\n");
 932                         lvds->pclk_ctrl = NULL;
 933                 }
 934                 lvds->pins = devm_kzalloc(lvds->dev, sizeof(*lvds->pins),
 935                                           GFP_KERNEL);
 936                 if (!lvds->pins)
 937                         return -ENOMEM;
 938
 939                 lvds->pins->p = devm_pinctrl_get(lvds->dev);
 940                 if (IS_ERR(lvds->pins->p)) {
 941                         dev_info(lvds->dev, "no pinctrl handle\n");
 942                         devm_kfree(lvds->dev, lvds->pins);
 943                         lvds->pins = NULL;
 944                 } else {
 945                         lvds->pins->default_state =
 946                                 pinctrl_lookup_state(lvds->pins->p, "lcdc");
 947                         if (IS_ERR(lvds->pins->default_state)) {
 948                                 dev_info(lvds->dev, "no default pinctrl state\n");
 949                                 devm_kfree(lvds->dev, lvds->pins);
 950                                 lvds->pins = NULL;
 951                         }
 952                 }
 953         }
 954         lvds->pclk = devm_clk_get(&pdev->dev, "pclk_lvds");
 955         if (IS_ERR(lvds->pclk)) {
 956                 dev_err(dev, "could not get pclk_lvds\n");
 957                 return PTR_ERR(lvds->pclk);
 958         }
 959         lvds->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
 960                                                     "rockchip,grf");
 961         if (IS_ERR(lvds->grf)) {
 962                 dev_err(dev, "missing rockchip,grf property\n");
 963                 return PTR_ERR(lvds->grf);
 964         }
 965
 966         dev_set_drvdata(dev, lvds);
 967         mutex_init(&lvds->suspend_lock);
 968
 969         if (lvds->pclk) {
 970                 ret = clk_prepare(lvds->pclk);
 971                 if (ret < 0) {
 972                         dev_err(dev, "failed to prepare pclk_lvds\n");
 973                         return ret;
 974                 }
 975         }
 976         if (lvds->pclk_ctrl) {
 977                 ret = clk_prepare(lvds->pclk_ctrl);
 978                 if (ret < 0) {
 979                         dev_err(dev, "failed to prepare pclk_ctrl lvds\n");
 980                         return ret;
 981                 }
 982         }
 983         ret = component_add(&pdev->dev, &rockchip_lvds_component_ops);
 984         if (ret < 0) {
 985                 if (lvds->pclk)
 986                         clk_unprepare(lvds->pclk);
 987                 if (lvds->pclk_ctrl)
 988                         clk_unprepare(lvds->pclk_ctrl);
 989         }
 990
 991         return ret;
 992 }
 993
 994 static int rockchip_lvds_remove(struct platform_device *pdev)
 995 {
 996         struct rockchip_lvds *lvds = dev_get_drvdata(&pdev->dev);
 997
 998         component_del(&pdev->dev, &rockchip_lvds_component_ops);
 999         if (lvds->pclk)
1000                 clk_unprepare(lvds->pclk);
1001         if (lvds->pclk_ctrl)
1002                 clk_unprepare(lvds->pclk_ctrl);
1003         return 0;
1004 }
1005
1006 struct platform_driver rockchip_lvds_driver = {
1007         .probe = rockchip_lvds_probe,
1008         .remove = rockchip_lvds_remove,
1009         .driver = {
1010                    .name = "rockchip-lvds",
1011                    .of_match_table = of_match_ptr(rockchip_lvds_dt_ids),
1012         },
1013 };
1014 module_platform_driver(rockchip_lvds_driver);
1015
1016 MODULE_AUTHOR("Mark Yao <mark.yao@rock-chips.com>");
1017 MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
1018 MODULE_DESCRIPTION("ROCKCHIP LVDS Driver");
1019 MODULE_LICENSE("GPL v2");