drivers/gpu/drm/sti/sti_hdmi.c

   1 /*
   2  * Copyright (C) STMicroelectronics SA 2014
   3  * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
   4  * License terms:  GNU General Public License (GPL), version 2
   5  */
   6
   7 #include <linux/clk.h>
   8 #include <linux/component.h>
   9 #include <linux/hdmi.h>
  10 #include <linux/module.h>
  11 #include <linux/of_gpio.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/reset.h>
  14
  15 #include <drm/drmP.h>
  16 #include <drm/drm_crtc_helper.h>
  17 #include <drm/drm_edid.h>
  18
  19 #include "sti_hdmi.h"
  20 #include "sti_hdmi_tx3g4c28phy.h"
  21 #include "sti_hdmi_tx3g0c55phy.h"
  22 #include "sti_vtg.h"
  23
  24 #define HDMI_CFG                        0x0000
  25 #define HDMI_INT_EN                     0x0004
  26 #define HDMI_INT_STA                    0x0008
  27 #define HDMI_INT_CLR                    0x000C
  28 #define HDMI_STA                        0x0010
  29 #define HDMI_ACTIVE_VID_XMIN            0x0100
  30 #define HDMI_ACTIVE_VID_XMAX            0x0104
  31 #define HDMI_ACTIVE_VID_YMIN            0x0108
  32 #define HDMI_ACTIVE_VID_YMAX            0x010C
  33 #define HDMI_DFLT_CHL0_DAT              0x0110
  34 #define HDMI_DFLT_CHL1_DAT              0x0114
  35 #define HDMI_DFLT_CHL2_DAT              0x0118
  36 #define HDMI_SW_DI_1_HEAD_WORD          0x0210
  37 #define HDMI_SW_DI_1_PKT_WORD0          0x0214
  38 #define HDMI_SW_DI_1_PKT_WORD1          0x0218
  39 #define HDMI_SW_DI_1_PKT_WORD2          0x021C
  40 #define HDMI_SW_DI_1_PKT_WORD3          0x0220
  41 #define HDMI_SW_DI_1_PKT_WORD4          0x0224
  42 #define HDMI_SW_DI_1_PKT_WORD5          0x0228
  43 #define HDMI_SW_DI_1_PKT_WORD6          0x022C
  44 #define HDMI_SW_DI_CFG                  0x0230
  45 #define HDMI_SW_DI_2_HEAD_WORD          0x0600
  46 #define HDMI_SW_DI_2_PKT_WORD0          0x0604
  47 #define HDMI_SW_DI_2_PKT_WORD1          0x0608
  48 #define HDMI_SW_DI_2_PKT_WORD2          0x060C
  49 #define HDMI_SW_DI_2_PKT_WORD3          0x0610
  50 #define HDMI_SW_DI_2_PKT_WORD4          0x0614
  51 #define HDMI_SW_DI_2_PKT_WORD5          0x0618
  52 #define HDMI_SW_DI_2_PKT_WORD6          0x061C
  53
  54 #define HDMI_IFRAME_SLOT_AVI            1
  55 #define HDMI_IFRAME_SLOT_AUDIO          2
  56
  57 #define  XCAT(prefix, x, suffix)        prefix ## x ## suffix
  58 #define  HDMI_SW_DI_N_HEAD_WORD(x)      XCAT(HDMI_SW_DI_, x, _HEAD_WORD)
  59 #define  HDMI_SW_DI_N_PKT_WORD0(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD0)
  60 #define  HDMI_SW_DI_N_PKT_WORD1(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD1)
  61 #define  HDMI_SW_DI_N_PKT_WORD2(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD2)
  62 #define  HDMI_SW_DI_N_PKT_WORD3(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD3)
  63 #define  HDMI_SW_DI_N_PKT_WORD4(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD4)
  64 #define  HDMI_SW_DI_N_PKT_WORD5(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD5)
  65 #define  HDMI_SW_DI_N_PKT_WORD6(x)      XCAT(HDMI_SW_DI_, x, _PKT_WORD6)
  66
  67 #define HDMI_IFRAME_DISABLED            0x0
  68 #define HDMI_IFRAME_SINGLE_SHOT         0x1
  69 #define HDMI_IFRAME_FIELD               0x2
  70 #define HDMI_IFRAME_FRAME               0x3
  71 #define HDMI_IFRAME_MASK                0x3
  72 #define HDMI_IFRAME_CFG_DI_N(x, n)       ((x) << ((n-1)*4)) /* n from 1 to 6 */
  73
  74 #define HDMI_CFG_DEVICE_EN              BIT(0)
  75 #define HDMI_CFG_HDMI_NOT_DVI           BIT(1)
  76 #define HDMI_CFG_HDCP_EN                BIT(2)
  77 #define HDMI_CFG_ESS_NOT_OESS           BIT(3)
  78 #define HDMI_CFG_H_SYNC_POL_NEG         BIT(4)
  79 #define HDMI_CFG_SINK_TERM_DET_EN       BIT(5)
  80 #define HDMI_CFG_V_SYNC_POL_NEG         BIT(6)
  81 #define HDMI_CFG_422_EN                 BIT(8)
  82 #define HDMI_CFG_FIFO_OVERRUN_CLR       BIT(12)
  83 #define HDMI_CFG_FIFO_UNDERRUN_CLR      BIT(13)
  84 #define HDMI_CFG_SW_RST_EN              BIT(31)
  85
  86 #define HDMI_INT_GLOBAL                 BIT(0)
  87 #define HDMI_INT_SW_RST                 BIT(1)
  88 #define HDMI_INT_PIX_CAP                BIT(3)
  89 #define HDMI_INT_HOT_PLUG               BIT(4)
  90 #define HDMI_INT_DLL_LCK                BIT(5)
  91 #define HDMI_INT_NEW_FRAME              BIT(6)
  92 #define HDMI_INT_GENCTRL_PKT            BIT(7)
  93 #define HDMI_INT_SINK_TERM_PRESENT      BIT(11)
  94
  95 #define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \
  96                         | HDMI_INT_DLL_LCK \
  97                         | HDMI_INT_HOT_PLUG \
  98                         | HDMI_INT_GLOBAL)
  99
 100 #define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \
 101                         | HDMI_INT_GENCTRL_PKT \
 102                         | HDMI_INT_NEW_FRAME \
 103                         | HDMI_INT_DLL_LCK \
 104                         | HDMI_INT_HOT_PLUG \
 105                         | HDMI_INT_PIX_CAP \
 106                         | HDMI_INT_SW_RST \
 107                         | HDMI_INT_GLOBAL)
 108
 109 #define HDMI_STA_SW_RST                 BIT(1)
 110
 111 #define HDMI_INFOFRAME_HEADER_TYPE(x)    (((x) & 0xff) <<  0)
 112 #define HDMI_INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) <<  8)
 113 #define HDMI_INFOFRAME_HEADER_LEN(x)     (((x) & 0x0f) << 16)
 114
 115 struct sti_hdmi_connector {
 116         struct drm_connector drm_connector;
 117         struct drm_encoder *encoder;
 118         struct sti_hdmi *hdmi;
 119 };
 120
 121 #define to_sti_hdmi_connector(x) \
 122         container_of(x, struct sti_hdmi_connector, drm_connector)
 123
 124 u32 hdmi_read(struct sti_hdmi *hdmi, int offset)
 125 {
 126         return readl(hdmi->regs + offset);
 127 }
 128
 129 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset)
 130 {
 131         writel(val, hdmi->regs + offset);
 132 }
 133
 134 /**
 135  * HDMI interrupt handler threaded
 136  *
 137  * @irq: irq number
 138  * @arg: connector structure
 139  */
 140 static irqreturn_t hdmi_irq_thread(int irq, void *arg)
 141 {
 142         struct sti_hdmi *hdmi = arg;
 143
 144         /* Hot plug/unplug IRQ */
 145         if (hdmi->irq_status & HDMI_INT_HOT_PLUG) {
 146                 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
 147                 if (hdmi->drm_dev)
 148                         drm_helper_hpd_irq_event(hdmi->drm_dev);
 149         }
 150
 151         /* Sw reset and PLL lock are exclusive so we can use the same
 152          * event to signal them
 153          */
 154         if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) {
 155                 hdmi->event_received = true;
 156                 wake_up_interruptible(&hdmi->wait_event);
 157         }
 158
 159         return IRQ_HANDLED;
 160 }
 161
 162 /**
 163  * HDMI interrupt handler
 164  *
 165  * @irq: irq number
 166  * @arg: connector structure
 167  */
 168 static irqreturn_t hdmi_irq(int irq, void *arg)
 169 {
 170         struct sti_hdmi *hdmi = arg;
 171
 172         /* read interrupt status */
 173         hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA);
 174
 175         /* clear interrupt status */
 176         hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR);
 177
 178         /* force sync bus write */
 179         hdmi_read(hdmi, HDMI_INT_STA);
 180
 181         return IRQ_WAKE_THREAD;
 182 }
 183
 184 /**
 185  * Set hdmi active area depending on the drm display mode selected
 186  *
 187  * @hdmi: pointer on the hdmi internal structure
 188  */
 189 static void hdmi_active_area(struct sti_hdmi *hdmi)
 190 {
 191         u32 xmin, xmax;
 192         u32 ymin, ymax;
 193
 194         xmin = sti_vtg_get_pixel_number(hdmi->mode, 0);
 195         xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay - 1);
 196         ymin = sti_vtg_get_line_number(hdmi->mode, 0);
 197         ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1);
 198
 199         hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN);
 200         hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX);
 201         hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN);
 202         hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
 203 }
 204
 205 /**
 206  * Overall hdmi configuration
 207  *
 208  * @hdmi: pointer on the hdmi internal structure
 209  */
 210 static void hdmi_config(struct sti_hdmi *hdmi)
 211 {
 212         u32 conf;
 213
 214         DRM_DEBUG_DRIVER("\n");
 215
 216         /* Clear overrun and underrun fifo */
 217         conf = HDMI_CFG_FIFO_OVERRUN_CLR | HDMI_CFG_FIFO_UNDERRUN_CLR;
 218
 219         /* Enable HDMI mode not DVI */
 220         conf |= HDMI_CFG_HDMI_NOT_DVI | HDMI_CFG_ESS_NOT_OESS;
 221
 222         /* Enable sink term detection */
 223         conf |= HDMI_CFG_SINK_TERM_DET_EN;
 224
 225         /* Set Hsync polarity */
 226         if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) {
 227                 DRM_DEBUG_DRIVER("H Sync Negative\n");
 228                 conf |= HDMI_CFG_H_SYNC_POL_NEG;
 229         }
 230
 231         /* Set Vsync polarity */
 232         if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) {
 233                 DRM_DEBUG_DRIVER("V Sync Negative\n");
 234                 conf |= HDMI_CFG_V_SYNC_POL_NEG;
 235         }
 236
 237         /* Enable HDMI */
 238         conf |= HDMI_CFG_DEVICE_EN;
 239
 240         hdmi_write(hdmi, conf, HDMI_CFG);
 241 }
 242
 243 /**
 244  * Helper to concatenate infoframe in 32 bits word
 245  *
 246  * @ptr: pointer on the hdmi internal structure
 247  * @data: infoframe to write
 248  * @size: size to write
 249  */
 250 static inline unsigned int hdmi_infoframe_subpack(const u8 *ptr, size_t size)
 251 {
 252         unsigned long value = 0;
 253         size_t i;
 254
 255         for (i = size; i > 0; i--)
 256                 value = (value << 8) | ptr[i - 1];
 257
 258         return value;
 259 }
 260
 261 /**
 262  * Helper to write info frame
 263  *
 264  * @hdmi: pointer on the hdmi internal structure
 265  * @data: infoframe to write
 266  * @size: size to write
 267  */
 268 static void hdmi_infoframe_write_infopack(struct sti_hdmi *hdmi, const u8 *data)
 269 {
 270         const u8 *ptr = data;
 271         u32 val, slot, mode, i;
 272         u32 head_offset, pack_offset;
 273         size_t size;
 274
 275         switch (*ptr) {
 276         case HDMI_INFOFRAME_TYPE_AVI:
 277                 slot = HDMI_IFRAME_SLOT_AVI;
 278                 mode = HDMI_IFRAME_FIELD;
 279                 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI);
 280                 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI);
 281                 size = HDMI_AVI_INFOFRAME_SIZE;
 282                 break;
 283
 284         case HDMI_INFOFRAME_TYPE_AUDIO:
 285                 slot = HDMI_IFRAME_SLOT_AUDIO;
 286                 mode = HDMI_IFRAME_FRAME;
 287                 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO);
 288                 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO);
 289                 size = HDMI_AUDIO_INFOFRAME_SIZE;
 290                 break;
 291
 292         default:
 293                 DRM_ERROR("unsupported infoframe type: %#x\n", *ptr);
 294                 return;
 295         }
 296
 297         /* Disable transmission slot for updated infoframe */
 298         val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
 299         val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot);
 300         hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
 301
 302         val = HDMI_INFOFRAME_HEADER_TYPE(*ptr++);
 303         val |= HDMI_INFOFRAME_HEADER_VERSION(*ptr++);
 304         val |= HDMI_INFOFRAME_HEADER_LEN(*ptr++);
 305         writel(val, hdmi->regs + head_offset);
 306
 307         /*
 308          * Each subpack contains 4 bytes
 309          * The First Bytes of the first subpacket must contain the checksum
 310          * Packet size in increase by one.
 311          */
 312         for (i = 0; i < size; i += sizeof(u32)) {
 313                 size_t num;
 314
 315                 num = min_t(size_t, size - i, sizeof(u32));
 316                 val = hdmi_infoframe_subpack(ptr, num);
 317                 ptr += sizeof(u32);
 318                 writel(val, hdmi->regs + pack_offset + i);
 319         }
 320
 321         /* Enable transmission slot for updated infoframe */
 322         val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
 323         val |= HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_FIELD, slot);
 324         hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
 325 }
 326
 327 /**
 328  * Prepare and configure the AVI infoframe
 329  *
 330  * AVI infoframe are transmitted at least once per two video field and
 331  * contains information about HDMI transmission mode such as color space,
 332  * colorimetry, ...
 333  *
 334  * @hdmi: pointer on the hdmi internal structure
 335  *
 336  * Return negative value if error occurs
 337  */
 338 static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi)
 339 {
 340         struct drm_display_mode *mode = &hdmi->mode;
 341         struct hdmi_avi_infoframe infoframe;
 342         u8 buffer[HDMI_INFOFRAME_SIZE(AVI)];
 343         int ret;
 344
 345         DRM_DEBUG_DRIVER("\n");
 346
 347         ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe, mode);
 348         if (ret < 0) {
 349                 DRM_ERROR("failed to setup AVI infoframe: %d\n", ret);
 350                 return ret;
 351         }
 352
 353         /* fixed infoframe configuration not linked to the mode */
 354         infoframe.colorspace = HDMI_COLORSPACE_RGB;
 355         infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
 356         infoframe.colorimetry = HDMI_COLORIMETRY_NONE;
 357
 358         ret = hdmi_avi_infoframe_pack(&infoframe, buffer, sizeof(buffer));
 359         if (ret < 0) {
 360                 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
 361                 return ret;
 362         }
 363
 364         hdmi_infoframe_write_infopack(hdmi, buffer);
 365
 366         return 0;
 367 }
 368
 369 /**
 370  * Prepare and configure the AUDIO infoframe
 371  *
 372  * AUDIO infoframe are transmitted once per frame and
 373  * contains information about HDMI transmission mode such as audio codec,
 374  * sample size, ...
 375  *
 376  * @hdmi: pointer on the hdmi internal structure
 377  *
 378  * Return negative value if error occurs
 379  */
 380 static int hdmi_audio_infoframe_config(struct sti_hdmi *hdmi)
 381 {
 382         struct hdmi_audio_infoframe infofame;
 383         u8 buffer[HDMI_INFOFRAME_SIZE(AUDIO)];
 384         int ret;
 385
 386         ret = hdmi_audio_infoframe_init(&infofame);
 387         if (ret < 0) {
 388                 DRM_ERROR("failed to setup audio infoframe: %d\n", ret);
 389                 return ret;
 390         }
 391
 392         infofame.channels = 2;
 393
 394         ret = hdmi_audio_infoframe_pack(&infofame, buffer, sizeof(buffer));
 395         if (ret < 0) {
 396                 DRM_ERROR("failed to pack audio infoframe: %d\n", ret);
 397                 return ret;
 398         }
 399
 400         hdmi_infoframe_write_infopack(hdmi, buffer);
 401
 402         return 0;
 403 }
 404
 405 /**
 406  * Software reset of the hdmi subsystem
 407  *
 408  * @hdmi: pointer on the hdmi internal structure
 409  *
 410  */
 411 #define HDMI_TIMEOUT_SWRESET  100   /*milliseconds */
 412 static void hdmi_swreset(struct sti_hdmi *hdmi)
 413 {
 414         u32 val;
 415
 416         DRM_DEBUG_DRIVER("\n");
 417
 418         /* Enable hdmi_audio clock only during hdmi reset */
 419         if (clk_prepare_enable(hdmi->clk_audio))
 420                 DRM_INFO("Failed to prepare/enable hdmi_audio clk\n");
 421
 422         /* Sw reset */
 423         hdmi->event_received = false;
 424
 425         val = hdmi_read(hdmi, HDMI_CFG);
 426         val |= HDMI_CFG_SW_RST_EN;
 427         hdmi_write(hdmi, val, HDMI_CFG);
 428
 429         /* Wait reset completed */
 430         wait_event_interruptible_timeout(hdmi->wait_event,
 431                                          hdmi->event_received == true,
 432                                          msecs_to_jiffies
 433                                          (HDMI_TIMEOUT_SWRESET));
 434
 435         /*
 436          * HDMI_STA_SW_RST bit is set to '1' when SW_RST bit in HDMI_CFG is
 437          * set to '1' and clk_audio is running.
 438          */
 439         if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0)
 440                 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n");
 441
 442         val = hdmi_read(hdmi, HDMI_CFG);
 443         val &= ~HDMI_CFG_SW_RST_EN;
 444         hdmi_write(hdmi, val, HDMI_CFG);
 445
 446         /* Disable hdmi_audio clock. Not used anymore for drm purpose */
 447         clk_disable_unprepare(hdmi->clk_audio);
 448 }
 449
 450 static void sti_hdmi_disable(struct drm_bridge *bridge)
 451 {
 452         struct sti_hdmi *hdmi = bridge->driver_private;
 453
 454         u32 val = hdmi_read(hdmi, HDMI_CFG);
 455
 456         if (!hdmi->enabled)
 457                 return;
 458
 459         DRM_DEBUG_DRIVER("\n");
 460
 461         /* Disable HDMI */
 462         val &= ~HDMI_CFG_DEVICE_EN;
 463         hdmi_write(hdmi, val, HDMI_CFG);
 464
 465         hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR);
 466
 467         /* Stop the phy */
 468         hdmi->phy_ops->stop(hdmi);
 469
 470         /* Set the default channel data to be a dark red */
 471         hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT);
 472         hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT);
 473         hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT);
 474
 475         /* Disable/unprepare hdmi clock */
 476         clk_disable_unprepare(hdmi->clk_phy);
 477         clk_disable_unprepare(hdmi->clk_tmds);
 478         clk_disable_unprepare(hdmi->clk_pix);
 479
 480         hdmi->enabled = false;
 481 }
 482
 483 static void sti_hdmi_pre_enable(struct drm_bridge *bridge)
 484 {
 485         struct sti_hdmi *hdmi = bridge->driver_private;
 486
 487         DRM_DEBUG_DRIVER("\n");
 488
 489         if (hdmi->enabled)
 490                 return;
 491
 492         /* Prepare/enable clocks */
 493         if (clk_prepare_enable(hdmi->clk_pix))
 494                 DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n");
 495         if (clk_prepare_enable(hdmi->clk_tmds))
 496                 DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n");
 497         if (clk_prepare_enable(hdmi->clk_phy))
 498                 DRM_ERROR("Failed to prepare/enable hdmi_rejec_pll clk\n");
 499
 500         hdmi->enabled = true;
 501
 502         /* Program hdmi serializer and start phy */
 503         if (!hdmi->phy_ops->start(hdmi)) {
 504                 DRM_ERROR("Unable to start hdmi phy\n");
 505                 return;
 506         }
 507
 508         /* Program hdmi active area */
 509         hdmi_active_area(hdmi);
 510
 511         /* Enable working interrupts */
 512         hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN);
 513
 514         /* Program hdmi config */
 515         hdmi_config(hdmi);
 516
 517         /* Program AVI infoframe */
 518         if (hdmi_avi_infoframe_config(hdmi))
 519                 DRM_ERROR("Unable to configure AVI infoframe\n");
 520
 521         /* Program AUDIO infoframe */
 522         if (hdmi_audio_infoframe_config(hdmi))
 523                 DRM_ERROR("Unable to configure AUDIO infoframe\n");
 524
 525         /* Sw reset */
 526         hdmi_swreset(hdmi);
 527 }
 528
 529 static void sti_hdmi_set_mode(struct drm_bridge *bridge,
 530                 struct drm_display_mode *mode,
 531                 struct drm_display_mode *adjusted_mode)
 532 {
 533         struct sti_hdmi *hdmi = bridge->driver_private;
 534         int ret;
 535
 536         DRM_DEBUG_DRIVER("\n");
 537
 538         /* Copy the drm display mode in the connector local structure */
 539         memcpy(&hdmi->mode, mode, sizeof(struct drm_display_mode));
 540
 541         /* Update clock framerate according to the selected mode */
 542         ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000);
 543         if (ret < 0) {
 544                 DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n",
 545                           mode->clock * 1000);
 546                 return;
 547         }
 548         ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000);
 549         if (ret < 0) {
 550                 DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n",
 551                           mode->clock * 1000);
 552                 return;
 553         }
 554 }
 555
 556 static void sti_hdmi_bridge_nope(struct drm_bridge *bridge)
 557 {
 558         /* do nothing */
 559 }
 560
 561 static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = {
 562         .pre_enable = sti_hdmi_pre_enable,
 563         .enable = sti_hdmi_bridge_nope,
 564         .disable = sti_hdmi_disable,
 565         .post_disable = sti_hdmi_bridge_nope,
 566         .mode_set = sti_hdmi_set_mode,
 567 };
 568
 569 static int sti_hdmi_connector_get_modes(struct drm_connector *connector)
 570 {
 571         struct sti_hdmi_connector *hdmi_connector
 572                 = to_sti_hdmi_connector(connector);
 573         struct sti_hdmi *hdmi = hdmi_connector->hdmi;
 574         struct edid *edid;
 575         int count;
 576
 577         DRM_DEBUG_DRIVER("\n");
 578
 579         edid = drm_get_edid(connector, hdmi->ddc_adapt);
 580         if (!edid)
 581                 goto fail;
 582
 583         count = drm_add_edid_modes(connector, edid);
 584         drm_mode_connector_update_edid_property(connector, edid);
 585
 586         kfree(edid);
 587         return count;
 588
 589 fail:
 590         DRM_ERROR("Can not read HDMI EDID\n");
 591         return 0;
 592 }
 593
 594 #define CLK_TOLERANCE_HZ 50
 595
 596 static int sti_hdmi_connector_mode_valid(struct drm_connector *connector,
 597                                         struct drm_display_mode *mode)
 598 {
 599         int target = mode->clock * 1000;
 600         int target_min = target - CLK_TOLERANCE_HZ;
 601         int target_max = target + CLK_TOLERANCE_HZ;
 602         int result;
 603         struct sti_hdmi_connector *hdmi_connector
 604                 = to_sti_hdmi_connector(connector);
 605         struct sti_hdmi *hdmi = hdmi_connector->hdmi;
 606
 607
 608         result = clk_round_rate(hdmi->clk_pix, target);
 609
 610         DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
 611                          target, result);
 612
 613         if ((result < target_min) || (result > target_max)) {
 614                 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target);
 615                 return MODE_BAD;
 616         }
 617
 618         return MODE_OK;
 619 }
 620
 621 struct drm_encoder *sti_hdmi_best_encoder(struct drm_connector *connector)
 622 {
 623         struct sti_hdmi_connector *hdmi_connector
 624                 = to_sti_hdmi_connector(connector);
 625
 626         /* Best encoder is the one associated during connector creation */
 627         return hdmi_connector->encoder;
 628 }
 629
 630 static struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = {
 631         .get_modes = sti_hdmi_connector_get_modes,
 632         .mode_valid = sti_hdmi_connector_mode_valid,
 633         .best_encoder = sti_hdmi_best_encoder,
 634 };
 635
 636 /* get detection status of display device */
 637 static enum drm_connector_status
 638 sti_hdmi_connector_detect(struct drm_connector *connector, bool force)
 639 {
 640         struct sti_hdmi_connector *hdmi_connector
 641                 = to_sti_hdmi_connector(connector);
 642         struct sti_hdmi *hdmi = hdmi_connector->hdmi;
 643
 644         DRM_DEBUG_DRIVER("\n");
 645
 646         if (hdmi->hpd) {
 647                 DRM_DEBUG_DRIVER("hdmi cable connected\n");
 648                 return connector_status_connected;
 649         }
 650
 651         DRM_DEBUG_DRIVER("hdmi cable disconnected\n");
 652         return connector_status_disconnected;
 653 }
 654
 655 static void sti_hdmi_connector_destroy(struct drm_connector *connector)
 656 {
 657         struct sti_hdmi_connector *hdmi_connector
 658                 = to_sti_hdmi_connector(connector);
 659
 660         drm_connector_unregister(connector);
 661         drm_connector_cleanup(connector);
 662         kfree(hdmi_connector);
 663 }
 664
 665 static struct drm_connector_funcs sti_hdmi_connector_funcs = {
 666         .dpms = drm_helper_connector_dpms,
 667         .fill_modes = drm_helper_probe_single_connector_modes,
 668         .detect = sti_hdmi_connector_detect,
 669         .destroy = sti_hdmi_connector_destroy,
 670 };
 671
 672 static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev)
 673 {
 674         struct drm_encoder *encoder;
 675
 676         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 677                 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
 678                         return encoder;
 679         }
 680
 681         return NULL;
 682 }
 683
 684 static int sti_hdmi_bind(struct device *dev, struct device *master, void *data)
 685 {
 686         struct sti_hdmi *hdmi = dev_get_drvdata(dev);
 687         struct drm_device *drm_dev = data;
 688         struct drm_encoder *encoder;
 689         struct sti_hdmi_connector *connector;
 690         struct drm_connector *drm_connector;
 691         struct drm_bridge *bridge;
 692         struct device_node *ddc;
 693         int err;
 694
 695         ddc = of_parse_phandle(dev->of_node, "ddc", 0);
 696         if (ddc) {
 697                 hdmi->ddc_adapt = of_find_i2c_adapter_by_node(ddc);
 698                 if (!hdmi->ddc_adapt) {
 699                         err = -EPROBE_DEFER;
 700                         of_node_put(ddc);
 701                         return err;
 702                 }
 703
 704                 of_node_put(ddc);
 705         }
 706
 707         /* Set the drm device handle */
 708         hdmi->drm_dev = drm_dev;
 709
 710         encoder = sti_hdmi_find_encoder(drm_dev);
 711         if (!encoder)
 712                 goto err_adapt;
 713
 714         connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
 715         if (!connector)
 716                 goto err_adapt;
 717
 718
 719         connector->hdmi = hdmi;
 720
 721         bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
 722         if (!bridge)
 723                 goto err_adapt;
 724
 725         bridge->driver_private = hdmi;
 726         bridge->funcs = &sti_hdmi_bridge_funcs;
 727         drm_bridge_attach(drm_dev, bridge);
 728
 729         encoder->bridge = bridge;
 730         connector->encoder = encoder;
 731
 732         drm_connector = (struct drm_connector *)connector;
 733
 734         drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
 735
 736         drm_connector_init(drm_dev, drm_connector,
 737                         &sti_hdmi_connector_funcs, DRM_MODE_CONNECTOR_HDMIA);
 738         drm_connector_helper_add(drm_connector,
 739                         &sti_hdmi_connector_helper_funcs);
 740
 741         err = drm_connector_register(drm_connector);
 742         if (err)
 743                 goto err_connector;
 744
 745         err = drm_mode_connector_attach_encoder(drm_connector, encoder);
 746         if (err) {
 747                 DRM_ERROR("Failed to attach a connector to a encoder\n");
 748                 goto err_sysfs;
 749         }
 750
 751         /* Enable default interrupts */
 752         hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN);
 753
 754         return 0;
 755
 756 err_sysfs:
 757         drm_connector_unregister(drm_connector);
 758 err_connector:
 759         drm_connector_cleanup(drm_connector);
 760 err_adapt:
 761         put_device(&hdmi->ddc_adapt->dev);
 762         return -EINVAL;
 763 }
 764
 765 static void sti_hdmi_unbind(struct device *dev,
 766                 struct device *master, void *data)
 767 {
 768         /* do nothing */
 769 }
 770
 771 static const struct component_ops sti_hdmi_ops = {
 772         .bind = sti_hdmi_bind,
 773         .unbind = sti_hdmi_unbind,
 774 };
 775
 776 static const struct of_device_id hdmi_of_match[] = {
 777         {
 778                 .compatible = "st,stih416-hdmi",
 779                 .data = &tx3g0c55phy_ops,
 780         }, {
 781                 .compatible = "st,stih407-hdmi",
 782                 .data = &tx3g4c28phy_ops,
 783         }, {
 784                 /* end node */
 785         }
 786 };
 787 MODULE_DEVICE_TABLE(of, hdmi_of_match);
 788
 789 static int sti_hdmi_probe(struct platform_device *pdev)
 790 {
 791         struct device *dev = &pdev->dev;
 792         struct sti_hdmi *hdmi;
 793         struct device_node *np = dev->of_node;
 794         struct resource *res;
 795         int ret;
 796
 797         DRM_INFO("%s\n", __func__);
 798
 799         hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
 800         if (!hdmi)
 801                 return -ENOMEM;
 802
 803         hdmi->dev = pdev->dev;
 804
 805         /* Get resources */
 806         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg");
 807         if (!res) {
 808                 DRM_ERROR("Invalid hdmi resource\n");
 809                 return -ENOMEM;
 810         }
 811         hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
 812         if (!hdmi->regs)
 813                 return -ENOMEM;
 814
 815         if (of_device_is_compatible(np, "st,stih416-hdmi")) {
 816                 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
 817                                                    "syscfg");
 818                 if (!res) {
 819                         DRM_ERROR("Invalid syscfg resource\n");
 820                         return -ENOMEM;
 821                 }
 822                 hdmi->syscfg = devm_ioremap_nocache(dev, res->start,
 823                                                     resource_size(res));
 824                 if (!hdmi->syscfg)
 825                         return -ENOMEM;
 826
 827         }
 828
 829         hdmi->phy_ops = (struct hdmi_phy_ops *)
 830                 of_match_node(hdmi_of_match, np)->data;
 831
 832         /* Get clock resources */
 833         hdmi->clk_pix = devm_clk_get(dev, "pix");
 834         if (IS_ERR(hdmi->clk_pix)) {
 835                 DRM_ERROR("Cannot get hdmi_pix clock\n");
 836                 return PTR_ERR(hdmi->clk_pix);
 837         }
 838
 839         hdmi->clk_tmds = devm_clk_get(dev, "tmds");
 840         if (IS_ERR(hdmi->clk_tmds)) {
 841                 DRM_ERROR("Cannot get hdmi_tmds clock\n");
 842                 return PTR_ERR(hdmi->clk_tmds);
 843         }
 844
 845         hdmi->clk_phy = devm_clk_get(dev, "phy");
 846         if (IS_ERR(hdmi->clk_phy)) {
 847                 DRM_ERROR("Cannot get hdmi_phy clock\n");
 848                 return PTR_ERR(hdmi->clk_phy);
 849         }
 850
 851         hdmi->clk_audio = devm_clk_get(dev, "audio");
 852         if (IS_ERR(hdmi->clk_audio)) {
 853                 DRM_ERROR("Cannot get hdmi_audio clock\n");
 854                 return PTR_ERR(hdmi->clk_audio);
 855         }
 856
 857         hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
 858
 859         init_waitqueue_head(&hdmi->wait_event);
 860
 861         hdmi->irq = platform_get_irq_byname(pdev, "irq");
 862
 863         ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq,
 864                         hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi);
 865         if (ret) {
 866                 DRM_ERROR("Failed to register HDMI interrupt\n");
 867                 return ret;
 868         }
 869
 870         hdmi->reset = devm_reset_control_get(dev, "hdmi");
 871         /* Take hdmi out of reset */
 872         if (!IS_ERR(hdmi->reset))
 873                 reset_control_deassert(hdmi->reset);
 874
 875         platform_set_drvdata(pdev, hdmi);
 876
 877         return component_add(&pdev->dev, &sti_hdmi_ops);
 878 }
 879
 880 static int sti_hdmi_remove(struct platform_device *pdev)
 881 {
 882         struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev);
 883
 884         if (hdmi->ddc_adapt)
 885                 put_device(&hdmi->ddc_adapt->dev);
 886
 887         component_del(&pdev->dev, &sti_hdmi_ops);
 888         return 0;
 889 }
 890
 891 struct platform_driver sti_hdmi_driver = {
 892         .driver = {
 893                 .name = "sti-hdmi",
 894                 .owner = THIS_MODULE,
 895                 .of_match_table = hdmi_of_match,
 896         },
 897         .probe = sti_hdmi_probe,
 898         .remove = sti_hdmi_remove,
 899 };
 900
 901 module_platform_driver(sti_hdmi_driver);
 902
 903 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
 904 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
 905 MODULE_LICENSE("GPL");