drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

   1 /**************************************************************************
   2  *
   3  * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "vmwgfx_kms.h"
  29
  30
  31 /* Might need a hrtimer here? */
  32 #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  33
  34 void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  35 {
  36         if (du->cursor_surface)
  37                 vmw_surface_unreference(&du->cursor_surface);
  38         if (du->cursor_dmabuf)
  39                 vmw_dmabuf_unreference(&du->cursor_dmabuf);
  40         drm_crtc_cleanup(&du->crtc);
  41         drm_encoder_cleanup(&du->encoder);
  42         drm_connector_cleanup(&du->connector);
  43 }
  44
  45 /*
  46  * Display Unit Cursor functions
  47  */
  48
  49 int vmw_cursor_update_image(struct vmw_private *dev_priv,
  50                             u32 *image, u32 width, u32 height,
  51                             u32 hotspotX, u32 hotspotY)
  52 {
  53         struct {
  54                 u32 cmd;
  55                 SVGAFifoCmdDefineAlphaCursor cursor;
  56         } *cmd;
  57         u32 image_size = width * height * 4;
  58         u32 cmd_size = sizeof(*cmd) + image_size;
  59
  60         if (!image)
  61                 return -EINVAL;
  62
  63         cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  64         if (unlikely(cmd == NULL)) {
  65                 DRM_ERROR("Fifo reserve failed.\n");
  66                 return -ENOMEM;
  67         }
  68
  69         memset(cmd, 0, sizeof(*cmd));
  70
  71         memcpy(&cmd[1], image, image_size);
  72
  73         cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  74         cmd->cursor.id = cpu_to_le32(0);
  75         cmd->cursor.width = cpu_to_le32(width);
  76         cmd->cursor.height = cpu_to_le32(height);
  77         cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  78         cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  79
  80         vmw_fifo_commit(dev_priv, cmd_size);
  81
  82         return 0;
  83 }
  84
  85 void vmw_cursor_update_position(struct vmw_private *dev_priv,
  86                                 bool show, int x, int y)
  87 {
  88         __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  89         uint32_t count;
  90
  91         iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  92         iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  93         iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  94         count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  95         iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  96 }
  97
  98 int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
  99                            uint32_t handle, uint32_t width, uint32_t height)
 100 {
 101         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
 102         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 103         struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
 104         struct vmw_surface *surface = NULL;
 105         struct vmw_dma_buffer *dmabuf = NULL;
 106         int ret;
 107
 108         if (handle) {
 109                 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
 110                                                      handle, &surface);
 111                 if (!ret) {
 112                         if (!surface->snooper.image) {
 113                                 DRM_ERROR("surface not suitable for cursor\n");
 114                                 return -EINVAL;
 115                         }
 116                 } else {
 117                         ret = vmw_user_dmabuf_lookup(tfile,
 118                                                      handle, &dmabuf);
 119                         if (ret) {
 120                                 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
 121                                 return -EINVAL;
 122                         }
 123                 }
 124         }
 125
 126         /* takedown old cursor */
 127         if (du->cursor_surface) {
 128                 du->cursor_surface->snooper.crtc = NULL;
 129                 vmw_surface_unreference(&du->cursor_surface);
 130         }
 131         if (du->cursor_dmabuf)
 132                 vmw_dmabuf_unreference(&du->cursor_dmabuf);
 133
 134         /* setup new image */
 135         if (surface) {
 136                 /* vmw_user_surface_lookup takes one reference */
 137                 du->cursor_surface = surface;
 138
 139                 du->cursor_surface->snooper.crtc = crtc;
 140                 du->cursor_age = du->cursor_surface->snooper.age;
 141                 vmw_cursor_update_image(dev_priv, surface->snooper.image,
 142                                         64, 64, du->hotspot_x, du->hotspot_y);
 143         } else if (dmabuf) {
 144                 struct ttm_bo_kmap_obj map;
 145                 unsigned long kmap_offset;
 146                 unsigned long kmap_num;
 147                 void *virtual;
 148                 bool dummy;
 149
 150                 /* vmw_user_surface_lookup takes one reference */
 151                 du->cursor_dmabuf = dmabuf;
 152
 153                 kmap_offset = 0;
 154                 kmap_num = (64*64*4) >> PAGE_SHIFT;
 155
 156                 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
 157                 if (unlikely(ret != 0)) {
 158                         DRM_ERROR("reserve failed\n");
 159                         return -EINVAL;
 160                 }
 161
 162                 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
 163                 if (unlikely(ret != 0))
 164                         goto err_unreserve;
 165
 166                 virtual = ttm_kmap_obj_virtual(&map, &dummy);
 167                 vmw_cursor_update_image(dev_priv, virtual, 64, 64,
 168                                         du->hotspot_x, du->hotspot_y);
 169
 170                 ttm_bo_kunmap(&map);
 171 err_unreserve:
 172                 ttm_bo_unreserve(&dmabuf->base);
 173
 174         } else {
 175                 vmw_cursor_update_position(dev_priv, false, 0, 0);
 176                 return 0;
 177         }
 178
 179         vmw_cursor_update_position(dev_priv, true, du->cursor_x, du->cursor_y);
 180
 181         return 0;
 182 }
 183
 184 int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
 185 {
 186         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
 187         struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
 188         bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
 189
 190         du->cursor_x = x + crtc->x;
 191         du->cursor_y = y + crtc->y;
 192
 193         vmw_cursor_update_position(dev_priv, shown,
 194                                    du->cursor_x, du->cursor_y);
 195
 196         return 0;
 197 }
 198
 199 void vmw_kms_cursor_snoop(struct vmw_surface *srf,
 200                           struct ttm_object_file *tfile,
 201                           struct ttm_buffer_object *bo,
 202                           SVGA3dCmdHeader *header)
 203 {
 204         struct ttm_bo_kmap_obj map;
 205         unsigned long kmap_offset;
 206         unsigned long kmap_num;
 207         SVGA3dCopyBox *box;
 208         unsigned box_count;
 209         void *virtual;
 210         bool dummy;
 211         struct vmw_dma_cmd {
 212                 SVGA3dCmdHeader header;
 213                 SVGA3dCmdSurfaceDMA dma;
 214         } *cmd;
 215         int ret;
 216
 217         cmd = container_of(header, struct vmw_dma_cmd, header);
 218
 219         /* No snooper installed */
 220         if (!srf->snooper.image)
 221                 return;
 222
 223         if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
 224                 DRM_ERROR("face and mipmap for cursors should never != 0\n");
 225                 return;
 226         }
 227
 228         if (cmd->header.size < 64) {
 229                 DRM_ERROR("at least one full copy box must be given\n");
 230                 return;
 231         }
 232
 233         box = (SVGA3dCopyBox *)&cmd[1];
 234         box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
 235                         sizeof(SVGA3dCopyBox);
 236
 237         if (cmd->dma.guest.pitch != (64 * 4) ||
 238             cmd->dma.guest.ptr.offset % PAGE_SIZE ||
 239             box->x != 0    || box->y != 0    || box->z != 0    ||
 240             box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
 241             box->w != 64   || box->h != 64   || box->d != 1    ||
 242             box_count != 1) {
 243                 /* TODO handle none page aligned offsets */
 244                 /* TODO handle partial uploads and pitch != 256 */
 245                 /* TODO handle more then one copy (size != 64) */
 246                 DRM_ERROR("lazy programmer, can't handle weird stuff\n");
 247                 return;
 248         }
 249
 250         kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
 251         kmap_num = (64*64*4) >> PAGE_SHIFT;
 252
 253         ret = ttm_bo_reserve(bo, true, false, false, 0);
 254         if (unlikely(ret != 0)) {
 255                 DRM_ERROR("reserve failed\n");
 256                 return;
 257         }
 258
 259         ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
 260         if (unlikely(ret != 0))
 261                 goto err_unreserve;
 262
 263         virtual = ttm_kmap_obj_virtual(&map, &dummy);
 264
 265         memcpy(srf->snooper.image, virtual, 64*64*4);
 266         srf->snooper.age++;
 267
 268         /* we can't call this function from this function since execbuf has
 269          * reserved fifo space.
 270          *
 271          * if (srf->snooper.crtc)
 272          *      vmw_ldu_crtc_cursor_update_image(dev_priv,
 273          *                                       srf->snooper.image, 64, 64,
 274          *                                       du->hotspot_x, du->hotspot_y);
 275          */
 276
 277         ttm_bo_kunmap(&map);
 278 err_unreserve:
 279         ttm_bo_unreserve(bo);
 280 }
 281
 282 void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
 283 {
 284         struct drm_device *dev = dev_priv->dev;
 285         struct vmw_display_unit *du;
 286         struct drm_crtc *crtc;
 287
 288         mutex_lock(&dev->mode_config.mutex);
 289
 290         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 291                 du = vmw_crtc_to_du(crtc);
 292                 if (!du->cursor_surface ||
 293                     du->cursor_age == du->cursor_surface->snooper.age)
 294                         continue;
 295
 296                 du->cursor_age = du->cursor_surface->snooper.age;
 297                 vmw_cursor_update_image(dev_priv,
 298                                         du->cursor_surface->snooper.image,
 299                                         64, 64, du->hotspot_x, du->hotspot_y);
 300         }
 301
 302         mutex_unlock(&dev->mode_config.mutex);
 303 }
 304
 305 /*
 306  * Generic framebuffer code
 307  */
 308
 309 int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
 310                                   struct drm_file *file_priv,
 311                                   unsigned int *handle)
 312 {
 313         if (handle)
 314                 handle = 0;
 315
 316         return 0;
 317 }
 318
 319 /*
 320  * Surface framebuffer code
 321  */
 322
 323 #define vmw_framebuffer_to_vfbs(x) \
 324         container_of(x, struct vmw_framebuffer_surface, base.base)
 325
 326 struct vmw_framebuffer_surface {
 327         struct vmw_framebuffer base;
 328         struct vmw_surface *surface;
 329         struct vmw_dma_buffer *buffer;
 330         struct list_head head;
 331         struct drm_master *master;
 332 };
 333
 334 void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
 335 {
 336         struct vmw_framebuffer_surface *vfbs =
 337                 vmw_framebuffer_to_vfbs(framebuffer);
 338         struct vmw_master *vmaster = vmw_master(vfbs->master);
 339
 340
 341         mutex_lock(&vmaster->fb_surf_mutex);
 342         list_del(&vfbs->head);
 343         mutex_unlock(&vmaster->fb_surf_mutex);
 344
 345         drm_master_put(&vfbs->master);
 346         drm_framebuffer_cleanup(framebuffer);
 347         vmw_surface_unreference(&vfbs->surface);
 348         ttm_base_object_unref(&vfbs->base.user_obj);
 349
 350         kfree(vfbs);
 351 }
 352
 353 static int do_surface_dirty_sou(struct vmw_private *dev_priv,
 354                                 struct drm_file *file_priv,
 355                                 struct vmw_framebuffer *framebuffer,
 356                                 struct vmw_surface *surf,
 357                                 unsigned flags, unsigned color,
 358                                 struct drm_clip_rect *clips,
 359                                 unsigned num_clips, int inc)
 360 {
 361         int left = clips->x2, right = clips->x1;
 362         int top = clips->y2, bottom = clips->y1;
 363         size_t fifo_size;
 364         int i, ret;
 365
 366         struct {
 367                 SVGA3dCmdHeader header;
 368                 SVGA3dCmdBlitSurfaceToScreen body;
 369         } *cmd;
 370
 371
 372         fifo_size = sizeof(*cmd);
 373         cmd = kzalloc(fifo_size, GFP_KERNEL);
 374         if (unlikely(cmd == NULL)) {
 375                 DRM_ERROR("Temporary fifo memory alloc failed.\n");
 376                 return -ENOMEM;
 377         }
 378
 379         cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
 380         cmd->header.size = cpu_to_le32(sizeof(cmd->body));
 381
 382         cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
 383         cmd->body.destScreenId = SVGA_ID_INVALID; /* virtual coords */
 384
 385         for (i = 0; i < num_clips; i++, clips += inc) {
 386                 left = min_t(int, left, (int)clips->x1);
 387                 right = max_t(int, right, (int)clips->x2);
 388                 top = min_t(int, top, (int)clips->y1);
 389                 bottom = max_t(int, bottom, (int)clips->y2);
 390         }
 391
 392         cmd->body.srcRect.left = left;
 393         cmd->body.srcRect.right = right;
 394         cmd->body.srcRect.top = top;
 395         cmd->body.srcRect.bottom = bottom;
 396
 397         cmd->body.destRect.left = left;
 398         cmd->body.destRect.right = right;
 399         cmd->body.destRect.top = top;
 400         cmd->body.destRect.bottom = bottom;
 401
 402         ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
 403                                   0, NULL);
 404         kfree(cmd);
 405
 406         return ret;
 407 }
 408
 409 int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
 410                                   struct drm_file *file_priv,
 411                                   unsigned flags, unsigned color,
 412                                   struct drm_clip_rect *clips,
 413                                   unsigned num_clips)
 414 {
 415         struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
 416         struct vmw_master *vmaster = vmw_master(file_priv->master);
 417         struct vmw_framebuffer_surface *vfbs =
 418                 vmw_framebuffer_to_vfbs(framebuffer);
 419         struct vmw_surface *surf = vfbs->surface;
 420         struct drm_clip_rect norect;
 421         int ret, inc = 1;
 422
 423         if (unlikely(vfbs->master != file_priv->master))
 424                 return -EINVAL;
 425
 426         /* Require ScreenObject support for 3D */
 427         if (!dev_priv->sou_priv)
 428                 return -EINVAL;
 429
 430         ret = ttm_read_lock(&vmaster->lock, true);
 431         if (unlikely(ret != 0))
 432                 return ret;
 433
 434         if (!num_clips) {
 435                 num_clips = 1;
 436                 clips = &norect;
 437                 norect.x1 = norect.y1 = 0;
 438                 norect.x2 = framebuffer->width;
 439                 norect.y2 = framebuffer->height;
 440         } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
 441                 num_clips /= 2;
 442                 inc = 2; /* skip source rects */
 443         }
 444
 445         ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base, surf,
 446                                    flags, color,
 447                                    clips, num_clips, inc);
 448
 449         ttm_read_unlock(&vmaster->lock);
 450         return 0;
 451 }
 452
 453 static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
 454         .destroy = vmw_framebuffer_surface_destroy,
 455         .dirty = vmw_framebuffer_surface_dirty,
 456         .create_handle = vmw_framebuffer_create_handle,
 457 };
 458
 459 static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
 460                                            struct drm_file *file_priv,
 461                                            struct vmw_surface *surface,
 462                                            struct vmw_framebuffer **out,
 463                                            const struct drm_mode_fb_cmd
 464                                            *mode_cmd)
 465
 466 {
 467         struct drm_device *dev = dev_priv->dev;
 468         struct vmw_framebuffer_surface *vfbs;
 469         enum SVGA3dSurfaceFormat format;
 470         struct vmw_master *vmaster = vmw_master(file_priv->master);
 471         int ret;
 472
 473         /* 3D is only supported on HWv8 hosts which supports screen objects */
 474         if (!dev_priv->sou_priv)
 475                 return -ENOSYS;
 476
 477         /*
 478          * Sanity checks.
 479          */
 480
 481         if (unlikely(surface->mip_levels[0] != 1 ||
 482                      surface->num_sizes != 1 ||
 483                      surface->sizes[0].width < mode_cmd->width ||
 484                      surface->sizes[0].height < mode_cmd->height ||
 485                      surface->sizes[0].depth != 1)) {
 486                 DRM_ERROR("Incompatible surface dimensions "
 487                           "for requested mode.\n");
 488                 return -EINVAL;
 489         }
 490
 491         switch (mode_cmd->depth) {
 492         case 32:
 493                 format = SVGA3D_A8R8G8B8;
 494                 break;
 495         case 24:
 496                 format = SVGA3D_X8R8G8B8;
 497                 break;
 498         case 16:
 499                 format = SVGA3D_R5G6B5;
 500                 break;
 501         case 15:
 502                 format = SVGA3D_A1R5G5B5;
 503                 break;
 504         case 8:
 505                 format = SVGA3D_LUMINANCE8;
 506                 break;
 507         default:
 508                 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
 509                 return -EINVAL;
 510         }
 511
 512         if (unlikely(format != surface->format)) {
 513                 DRM_ERROR("Invalid surface format for requested mode.\n");
 514                 return -EINVAL;
 515         }
 516
 517         vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
 518         if (!vfbs) {
 519                 ret = -ENOMEM;
 520                 goto out_err1;
 521         }
 522
 523         ret = drm_framebuffer_init(dev, &vfbs->base.base,
 524                                    &vmw_framebuffer_surface_funcs);
 525         if (ret)
 526                 goto out_err2;
 527
 528         if (!vmw_surface_reference(surface)) {
 529                 DRM_ERROR("failed to reference surface %p\n", surface);
 530                 goto out_err3;
 531         }
 532
 533         /* XXX get the first 3 from the surface info */
 534         vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
 535         vfbs->base.base.pitch = mode_cmd->pitch;
 536         vfbs->base.base.depth = mode_cmd->depth;
 537         vfbs->base.base.width = mode_cmd->width;
 538         vfbs->base.base.height = mode_cmd->height;
 539         vfbs->surface = surface;
 540         vfbs->base.user_handle = mode_cmd->handle;
 541         vfbs->master = drm_master_get(file_priv->master);
 542
 543         mutex_lock(&vmaster->fb_surf_mutex);
 544         list_add_tail(&vfbs->head, &vmaster->fb_surf);
 545         mutex_unlock(&vmaster->fb_surf_mutex);
 546
 547         *out = &vfbs->base;
 548
 549         return 0;
 550
 551 out_err3:
 552         drm_framebuffer_cleanup(&vfbs->base.base);
 553 out_err2:
 554         kfree(vfbs);
 555 out_err1:
 556         return ret;
 557 }
 558
 559 /*
 560  * Dmabuf framebuffer code
 561  */
 562
 563 #define vmw_framebuffer_to_vfbd(x) \
 564         container_of(x, struct vmw_framebuffer_dmabuf, base.base)
 565
 566 struct vmw_framebuffer_dmabuf {
 567         struct vmw_framebuffer base;
 568         struct vmw_dma_buffer *buffer;
 569 };
 570
 571 void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
 572 {
 573         struct vmw_framebuffer_dmabuf *vfbd =
 574                 vmw_framebuffer_to_vfbd(framebuffer);
 575
 576         drm_framebuffer_cleanup(framebuffer);
 577         vmw_dmabuf_unreference(&vfbd->buffer);
 578         ttm_base_object_unref(&vfbd->base.user_obj);
 579
 580         kfree(vfbd);
 581 }
 582
 583 static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
 584                                struct vmw_framebuffer *framebuffer,
 585                                struct vmw_dma_buffer *buffer,
 586                                unsigned flags, unsigned color,
 587                                struct drm_clip_rect *clips,
 588                                unsigned num_clips, int increment)
 589 {
 590         size_t fifo_size;
 591         int i;
 592
 593         struct {
 594                 uint32_t header;
 595                 SVGAFifoCmdUpdate body;
 596         } *cmd;
 597
 598         fifo_size = sizeof(*cmd) * num_clips;
 599         cmd = vmw_fifo_reserve(dev_priv, fifo_size);
 600         if (unlikely(cmd == NULL)) {
 601                 DRM_ERROR("Fifo reserve failed.\n");
 602                 return -ENOMEM;
 603         }
 604
 605         memset(cmd, 0, fifo_size);
 606         for (i = 0; i < num_clips; i++, clips += increment) {
 607                 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
 608                 cmd[i].body.x = cpu_to_le32(clips->x1);
 609                 cmd[i].body.y = cpu_to_le32(clips->y1);
 610                 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
 611                 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
 612         }
 613
 614         vmw_fifo_commit(dev_priv, fifo_size);
 615         return 0;
 616 }
 617
 618 static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
 619                                struct vmw_private *dev_priv,
 620                                struct vmw_framebuffer *framebuffer,
 621                                struct vmw_dma_buffer *buffer,
 622                                unsigned flags, unsigned color,
 623                                struct drm_clip_rect *clips,
 624                                unsigned num_clips, int increment)
 625 {
 626         size_t fifo_size;
 627         int i, ret;
 628
 629         struct {
 630                 uint32_t header;
 631                 SVGAFifoCmdDefineGMRFB body;
 632         } *cmd;
 633         struct {
 634                 uint32_t header;
 635                 SVGAFifoCmdBlitGMRFBToScreen body;
 636         } *blits;
 637
 638         fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips;
 639         cmd = kmalloc(fifo_size, GFP_KERNEL);
 640         if (unlikely(cmd == NULL)) {
 641                 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
 642                 return -ENOMEM;
 643         }
 644
 645         memset(cmd, 0, fifo_size);
 646         cmd->header = SVGA_CMD_DEFINE_GMRFB;
 647         cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
 648         cmd->body.format.colorDepth = framebuffer->base.depth;
 649         cmd->body.format.reserved = 0;
 650         cmd->body.bytesPerLine = framebuffer->base.pitch;
 651         cmd->body.ptr.gmrId = framebuffer->user_handle;
 652         cmd->body.ptr.offset = 0;
 653
 654         blits = (void *)&cmd[1];
 655         for (i = 0; i < num_clips; i++, clips += increment) {
 656                 blits[i].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
 657                 blits[i].body.srcOrigin.x = clips->x1;
 658                 blits[i].body.srcOrigin.y = clips->y1;
 659                 blits[i].body.destRect.left = clips->x1;
 660                 blits[i].body.destRect.top = clips->y1;
 661                 blits[i].body.destRect.right = clips->x2;
 662                 blits[i].body.destRect.bottom = clips->y2;
 663         }
 664
 665         ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
 666                                   fifo_size, 0, NULL);
 667
 668         kfree(cmd);
 669
 670         return ret;
 671 }
 672
 673 int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
 674                                  struct drm_file *file_priv,
 675                                  unsigned flags, unsigned color,
 676                                  struct drm_clip_rect *clips,
 677                                  unsigned num_clips)
 678 {
 679         struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
 680         struct vmw_master *vmaster = vmw_master(file_priv->master);
 681         struct vmw_framebuffer_dmabuf *vfbd =
 682                 vmw_framebuffer_to_vfbd(framebuffer);
 683         struct vmw_dma_buffer *dmabuf = vfbd->buffer;
 684         struct drm_clip_rect norect;
 685         int ret, increment = 1;
 686
 687         ret = ttm_read_lock(&vmaster->lock, true);
 688         if (unlikely(ret != 0))
 689                 return ret;
 690
 691         if (!num_clips) {
 692                 num_clips = 1;
 693                 clips = &norect;
 694                 norect.x1 = norect.y1 = 0;
 695                 norect.x2 = framebuffer->width;
 696                 norect.y2 = framebuffer->height;
 697         } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
 698                 num_clips /= 2;
 699                 increment = 2;
 700         }
 701
 702         if (dev_priv->ldu_priv) {
 703                 ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base, dmabuf,
 704                                           flags, color,
 705                                           clips, num_clips, increment);
 706         } else {
 707                 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
 708                                           dmabuf, flags, color,
 709                                           clips, num_clips, increment);
 710         }
 711
 712         ttm_read_unlock(&vmaster->lock);
 713         return ret;
 714 }
 715
 716 static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
 717         .destroy = vmw_framebuffer_dmabuf_destroy,
 718         .dirty = vmw_framebuffer_dmabuf_dirty,
 719         .create_handle = vmw_framebuffer_create_handle,
 720 };
 721
 722 /**
 723  * Pin the dmabuffer to the start of vram.
 724  */
 725 static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
 726 {
 727         struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
 728         struct vmw_framebuffer_dmabuf *vfbd =
 729                 vmw_framebuffer_to_vfbd(&vfb->base);
 730         int ret;
 731
 732         /* This code should not be used with screen objects */
 733         BUG_ON(dev_priv->sou_priv);
 734
 735         vmw_overlay_pause_all(dev_priv);
 736
 737         ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
 738
 739         vmw_overlay_resume_all(dev_priv);
 740
 741         WARN_ON(ret != 0);
 742
 743         return 0;
 744 }
 745
 746 static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
 747 {
 748         struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
 749         struct vmw_framebuffer_dmabuf *vfbd =
 750                 vmw_framebuffer_to_vfbd(&vfb->base);
 751
 752         if (!vfbd->buffer) {
 753                 WARN_ON(!vfbd->buffer);
 754                 return 0;
 755         }
 756
 757         return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
 758 }
 759
 760 static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
 761                                           struct vmw_dma_buffer *dmabuf,
 762                                           struct vmw_framebuffer **out,
 763                                           const struct drm_mode_fb_cmd
 764                                           *mode_cmd)
 765
 766 {
 767         struct drm_device *dev = dev_priv->dev;
 768         struct vmw_framebuffer_dmabuf *vfbd;
 769         unsigned int requested_size;
 770         int ret;
 771
 772         requested_size = mode_cmd->height * mode_cmd->pitch;
 773         if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
 774                 DRM_ERROR("Screen buffer object size is too small "
 775                           "for requested mode.\n");
 776                 return -EINVAL;
 777         }
 778
 779         vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
 780         if (!vfbd) {
 781                 ret = -ENOMEM;
 782                 goto out_err1;
 783         }
 784
 785         ret = drm_framebuffer_init(dev, &vfbd->base.base,
 786                                    &vmw_framebuffer_dmabuf_funcs);
 787         if (ret)
 788                 goto out_err2;
 789
 790         if (!vmw_dmabuf_reference(dmabuf)) {
 791                 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
 792                 goto out_err3;
 793         }
 794
 795         vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
 796         vfbd->base.base.pitch = mode_cmd->pitch;
 797         vfbd->base.base.depth = mode_cmd->depth;
 798         vfbd->base.base.width = mode_cmd->width;
 799         vfbd->base.base.height = mode_cmd->height;
 800         if (!dev_priv->sou_priv) {
 801                 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
 802                 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
 803         }
 804         vfbd->base.dmabuf = true;
 805         vfbd->buffer = dmabuf;
 806         vfbd->base.user_handle = mode_cmd->handle;
 807         *out = &vfbd->base;
 808
 809         return 0;
 810
 811 out_err3:
 812         drm_framebuffer_cleanup(&vfbd->base.base);
 813 out_err2:
 814         kfree(vfbd);
 815 out_err1:
 816         return ret;
 817 }
 818
 819 /*
 820  * Generic Kernel modesetting functions
 821  */
 822
 823 static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
 824                                                  struct drm_file *file_priv,
 825                                                  struct drm_mode_fb_cmd *mode_cmd)
 826 {
 827         struct vmw_private *dev_priv = vmw_priv(dev);
 828         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
 829         struct vmw_framebuffer *vfb = NULL;
 830         struct vmw_surface *surface = NULL;
 831         struct vmw_dma_buffer *bo = NULL;
 832         struct ttm_base_object *user_obj;
 833         u64 required_size;
 834         int ret;
 835
 836         /**
 837          * This code should be conditioned on Screen Objects not being used.
 838          * If screen objects are used, we can allocate a GMR to hold the
 839          * requested framebuffer.
 840          */
 841
 842         required_size = mode_cmd->pitch * mode_cmd->height;
 843         if (unlikely(required_size > (u64) dev_priv->vram_size)) {
 844                 DRM_ERROR("VRAM size is too small for requested mode.\n");
 845                 return NULL;
 846         }
 847
 848         /*
 849          * Take a reference on the user object of the resource
 850          * backing the kms fb. This ensures that user-space handle
 851          * lookups on that resource will always work as long as
 852          * it's registered with a kms framebuffer. This is important,
 853          * since vmw_execbuf_process identifies resources in the
 854          * command stream using user-space handles.
 855          */
 856
 857         user_obj = ttm_base_object_lookup(tfile, mode_cmd->handle);
 858         if (unlikely(user_obj == NULL)) {
 859                 DRM_ERROR("Could not locate requested kms frame buffer.\n");
 860                 return ERR_PTR(-ENOENT);
 861         }
 862
 863         /**
 864          * End conditioned code.
 865          */
 866
 867         ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
 868                                              mode_cmd->handle, &surface);
 869         if (ret)
 870                 goto try_dmabuf;
 871
 872         if (!surface->scanout)
 873                 goto err_not_scanout;
 874
 875         ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, surface,
 876                                               &vfb, mode_cmd);
 877
 878         /* vmw_user_surface_lookup takes one ref so does new_fb */
 879         vmw_surface_unreference(&surface);
 880
 881         if (ret) {
 882                 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
 883                 ttm_base_object_unref(&user_obj);
 884                 return ERR_PTR(ret);
 885         } else
 886                 vfb->user_obj = user_obj;
 887         return &vfb->base;
 888
 889 try_dmabuf:
 890         DRM_INFO("%s: trying buffer\n", __func__);
 891
 892         ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
 893         if (ret) {
 894                 DRM_ERROR("failed to find buffer: %i\n", ret);
 895                 return ERR_PTR(-ENOENT);
 896         }
 897
 898         ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
 899                                              mode_cmd);
 900
 901         /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
 902         vmw_dmabuf_unreference(&bo);
 903
 904         if (ret) {
 905                 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
 906                 ttm_base_object_unref(&user_obj);
 907                 return ERR_PTR(ret);
 908         } else
 909                 vfb->user_obj = user_obj;
 910
 911         return &vfb->base;
 912
 913 err_not_scanout:
 914         DRM_ERROR("surface not marked as scanout\n");
 915         /* vmw_user_surface_lookup takes one ref */
 916         vmw_surface_unreference(&surface);
 917         ttm_base_object_unref(&user_obj);
 918
 919         return ERR_PTR(-EINVAL);
 920 }
 921
 922 static struct drm_mode_config_funcs vmw_kms_funcs = {
 923         .fb_create = vmw_kms_fb_create,
 924 };
 925
 926 int vmw_kms_present(struct vmw_private *dev_priv,
 927                     struct drm_file *file_priv,
 928                     struct vmw_framebuffer *vfb,
 929                     struct vmw_surface *surface,
 930                     uint32_t sid,
 931                     int32_t destX, int32_t destY,
 932                     struct drm_vmw_rect *clips,
 933                     uint32_t num_clips)
 934 {
 935         size_t fifo_size;
 936         int i, ret;
 937
 938         struct {
 939                 SVGA3dCmdHeader header;
 940                 SVGA3dCmdBlitSurfaceToScreen body;
 941         } *cmd;
 942         SVGASignedRect *blits;
 943
 944         BUG_ON(surface == NULL);
 945         BUG_ON(!clips || !num_clips);
 946
 947         fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
 948         cmd = kmalloc(fifo_size, GFP_KERNEL);
 949         if (unlikely(cmd == NULL)) {
 950                 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
 951                 return -ENOMEM;
 952         }
 953
 954         memset(cmd, 0, fifo_size);
 955
 956         cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
 957         cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
 958
 959         cmd->body.srcImage.sid = sid;
 960         cmd->body.destScreenId = SVGA_ID_INVALID; /* virtual coords */
 961
 962         cmd->body.srcRect.left = 0;
 963         cmd->body.srcRect.right = surface->sizes[0].width;
 964         cmd->body.srcRect.top = 0;
 965         cmd->body.srcRect.bottom = surface->sizes[0].height;
 966
 967         cmd->body.destRect.left = destX;
 968         cmd->body.destRect.right = destX + surface->sizes[0].width;
 969         cmd->body.destRect.top = destY;
 970         cmd->body.destRect.bottom = destY + surface->sizes[0].height;
 971
 972         blits = (SVGASignedRect *)&cmd[1];
 973         for (i = 0; i < num_clips; i++) {
 974                 blits[i].left   = clips[i].x;
 975                 blits[i].right  = clips[i].x + clips[i].w;
 976                 blits[i].top    = clips[i].y;
 977                 blits[i].bottom = clips[i].y + clips[i].h;
 978         }
 979
 980         ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
 981                                   fifo_size, 0, NULL);
 982
 983         kfree(cmd);
 984
 985         return ret;
 986 }
 987
 988 int vmw_kms_readback(struct vmw_private *dev_priv,
 989                      struct drm_file *file_priv,
 990                      struct vmw_framebuffer *vfb,
 991                      struct drm_vmw_fence_rep __user *user_fence_rep,
 992                      struct drm_vmw_rect *clips,
 993                      uint32_t num_clips)
 994 {
 995         struct vmw_framebuffer_dmabuf *vfbd =
 996                 vmw_framebuffer_to_vfbd(&vfb->base);
 997         struct vmw_dma_buffer *dmabuf = vfbd->buffer;
 998         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
 999         struct drm_crtc *crtc;
1000         size_t fifo_size;
1001         int i, k, ret, num_units, blits_pos;
1002
1003         struct {
1004                 uint32_t header;
1005                 SVGAFifoCmdDefineGMRFB body;
1006         } *cmd;
1007         struct {
1008                 uint32_t header;
1009                 SVGAFifoCmdBlitScreenToGMRFB body;
1010         } *blits;
1011
1012         num_units = 0;
1013         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1014                 if (crtc->fb != &vfb->base)
1015                         continue;
1016                 units[num_units++] = vmw_crtc_to_du(crtc);
1017         }
1018
1019         BUG_ON(dmabuf == NULL);
1020         BUG_ON(!clips || !num_clips);
1021
1022         /* take a safe guess at fifo size */
1023         fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1024         cmd = kmalloc(fifo_size, GFP_KERNEL);
1025         if (unlikely(cmd == NULL)) {
1026                 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1027                 return -ENOMEM;
1028         }
1029
1030         memset(cmd, 0, fifo_size);
1031         cmd->header = SVGA_CMD_DEFINE_GMRFB;
1032         cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1033         cmd->body.format.colorDepth = vfb->base.depth;
1034         cmd->body.format.reserved = 0;
1035         cmd->body.bytesPerLine = vfb->base.pitch;
1036         cmd->body.ptr.gmrId = vfb->user_handle;
1037         cmd->body.ptr.offset = 0;
1038
1039         blits = (void *)&cmd[1];
1040         blits_pos = 0;
1041         for (i = 0; i < num_units; i++) {
1042                 struct drm_vmw_rect *c = clips;
1043                 for (k = 0; k < num_clips; k++, c++) {
1044                         /* transform clip coords to crtc origin based coords */
1045                         int clip_x1 = c->x - units[i]->crtc.x;
1046                         int clip_x2 = c->x - units[i]->crtc.x + c->w;
1047                         int clip_y1 = c->y - units[i]->crtc.y;
1048                         int clip_y2 = c->y - units[i]->crtc.y + c->h;
1049                         int dest_x = c->x;
1050                         int dest_y = c->y;
1051
1052                         /* compensate for clipping, we negate
1053                          * a negative number and add that.
1054                          */
1055                         if (clip_x1 < 0)
1056                                 dest_x += -clip_x1;
1057                         if (clip_y1 < 0)
1058                                 dest_y += -clip_y1;
1059
1060                         /* clip */
1061                         clip_x1 = max(clip_x1, 0);
1062                         clip_y1 = max(clip_y1, 0);
1063                         clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1064                         clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1065
1066                         /* and cull any rects that misses the crtc */
1067                         if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1068                             clip_y1 >= units[i]->crtc.mode.vdisplay ||
1069                             clip_x2 <= 0 || clip_y2 <= 0)
1070                                 continue;
1071
1072                         blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1073                         blits[blits_pos].body.srcScreenId = units[i]->unit;
1074                         blits[blits_pos].body.destOrigin.x = dest_x;
1075                         blits[blits_pos].body.destOrigin.y = dest_y;
1076
1077                         blits[blits_pos].body.srcRect.left = clip_x1;
1078                         blits[blits_pos].body.srcRect.top = clip_y1;
1079                         blits[blits_pos].body.srcRect.right = clip_x2;
1080                         blits[blits_pos].body.srcRect.bottom = clip_y2;
1081                         blits_pos++;
1082                 }
1083         }
1084         /* reset size here and use calculated exact size from loops */
1085         fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1086
1087         ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
1088                                   0, user_fence_rep);
1089
1090         kfree(cmd);
1091
1092         return ret;
1093 }
1094
1095 int vmw_kms_init(struct vmw_private *dev_priv)
1096 {
1097         struct drm_device *dev = dev_priv->dev;
1098         int ret;
1099
1100         drm_mode_config_init(dev);
1101         dev->mode_config.funcs = &vmw_kms_funcs;
1102         dev->mode_config.min_width = 1;
1103         dev->mode_config.min_height = 1;
1104         /* assumed largest fb size */
1105         dev->mode_config.max_width = 8192;
1106         dev->mode_config.max_height = 8192;
1107
1108         ret = vmw_kms_init_screen_object_display(dev_priv);
1109         if (ret) /* Fallback */
1110                 (void)vmw_kms_init_legacy_display_system(dev_priv);
1111
1112         return 0;
1113 }
1114
1115 int vmw_kms_close(struct vmw_private *dev_priv)
1116 {
1117         /*
1118          * Docs says we should take the lock before calling this function
1119          * but since it destroys encoders and our destructor calls
1120          * drm_encoder_cleanup which takes the lock we deadlock.
1121          */
1122         drm_mode_config_cleanup(dev_priv->dev);
1123         vmw_kms_close_legacy_display_system(dev_priv);
1124         return 0;
1125 }
1126
1127 int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1128                                 struct drm_file *file_priv)
1129 {
1130         struct drm_vmw_cursor_bypass_arg *arg = data;
1131         struct vmw_display_unit *du;
1132         struct drm_mode_object *obj;
1133         struct drm_crtc *crtc;
1134         int ret = 0;
1135
1136
1137         mutex_lock(&dev->mode_config.mutex);
1138         if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1139
1140                 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1141                         du = vmw_crtc_to_du(crtc);
1142                         du->hotspot_x = arg->xhot;
1143                         du->hotspot_y = arg->yhot;
1144                 }
1145
1146                 mutex_unlock(&dev->mode_config.mutex);
1147                 return 0;
1148         }
1149
1150         obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
1151         if (!obj) {
1152                 ret = -EINVAL;
1153                 goto out;
1154         }
1155
1156         crtc = obj_to_crtc(obj);
1157         du = vmw_crtc_to_du(crtc);
1158
1159         du->hotspot_x = arg->xhot;
1160         du->hotspot_y = arg->yhot;
1161
1162 out:
1163         mutex_unlock(&dev->mode_config.mutex);
1164
1165         return ret;
1166 }
1167
1168 int vmw_kms_write_svga(struct vmw_private *vmw_priv,
1169                         unsigned width, unsigned height, unsigned pitch,
1170                         unsigned bpp, unsigned depth)
1171 {
1172         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1173                 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1174         else if (vmw_fifo_have_pitchlock(vmw_priv))
1175                 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1176         vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1177         vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1178         vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
1179
1180         if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1181                 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1182                           depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1183                 return -EINVAL;
1184         }
1185
1186         return 0;
1187 }
1188
1189 int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1190 {
1191         struct vmw_vga_topology_state *save;
1192         uint32_t i;
1193
1194         vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1195         vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
1196         vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
1197         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1198                 vmw_priv->vga_pitchlock =
1199                   vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
1200         else if (vmw_fifo_have_pitchlock(vmw_priv))
1201                 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1202                                                        SVGA_FIFO_PITCHLOCK);
1203
1204         if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1205                 return 0;
1206
1207         vmw_priv->num_displays = vmw_read(vmw_priv,
1208                                           SVGA_REG_NUM_GUEST_DISPLAYS);
1209
1210         if (vmw_priv->num_displays == 0)
1211                 vmw_priv->num_displays = 1;
1212
1213         for (i = 0; i < vmw_priv->num_displays; ++i) {
1214                 save = &vmw_priv->vga_save[i];
1215                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1216                 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1217                 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1218                 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1219                 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1220                 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1221                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1222                 if (i == 0 && vmw_priv->num_displays == 1 &&
1223                     save->width == 0 && save->height == 0) {
1224
1225                         /*
1226                          * It should be fairly safe to assume that these
1227                          * values are uninitialized.
1228                          */
1229
1230                         save->width = vmw_priv->vga_width - save->pos_x;
1231                         save->height = vmw_priv->vga_height - save->pos_y;
1232                 }
1233         }
1234
1235         return 0;
1236 }
1237
1238 int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1239 {
1240         struct vmw_vga_topology_state *save;
1241         uint32_t i;
1242
1243         vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1244         vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
1245         vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
1246         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1247                 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1248                           vmw_priv->vga_pitchlock);
1249         else if (vmw_fifo_have_pitchlock(vmw_priv))
1250                 iowrite32(vmw_priv->vga_pitchlock,
1251                           vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1252
1253         if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1254                 return 0;
1255
1256         for (i = 0; i < vmw_priv->num_displays; ++i) {
1257                 save = &vmw_priv->vga_save[i];
1258                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1259                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1260                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1261                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1262                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1263                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1264                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1265         }
1266
1267         return 0;
1268 }
1269
1270 bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1271                                 uint32_t pitch,
1272                                 uint32_t height)
1273 {
1274         return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
1275 }
1276
1277 u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1278 {
1279         return 0;
1280 }
1281
1282
1283 /*
1284  * Small shared kms functions.
1285  */
1286
1287 int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1288                          struct drm_vmw_rect *rects)
1289 {
1290         struct drm_device *dev = dev_priv->dev;
1291         struct vmw_display_unit *du;
1292         struct drm_connector *con;
1293         int i;
1294
1295         mutex_lock(&dev->mode_config.mutex);
1296
1297 #if 0
1298         DRM_INFO("%s: new layout ", __func__);
1299         for (i = 0; i < (int)num; i++)
1300                 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1301                          rects[i].w, rects[i].h);
1302         DRM_INFO("\n");
1303 #else
1304         (void)i;
1305 #endif
1306
1307         list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1308                 du = vmw_connector_to_du(con);
1309                 if (num > du->unit) {
1310                         du->pref_width = rects[du->unit].w;
1311                         du->pref_height = rects[du->unit].h;
1312                         du->pref_active = true;
1313                 } else {
1314                         du->pref_width = 800;
1315                         du->pref_height = 600;
1316                         du->pref_active = false;
1317                 }
1318                 con->status = vmw_du_connector_detect(con, true);
1319         }
1320
1321         mutex_unlock(&dev->mode_config.mutex);
1322
1323         return 0;
1324 }
1325
1326 void vmw_du_crtc_save(struct drm_crtc *crtc)
1327 {
1328 }
1329
1330 void vmw_du_crtc_restore(struct drm_crtc *crtc)
1331 {
1332 }
1333
1334 void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1335                            u16 *r, u16 *g, u16 *b,
1336                            uint32_t start, uint32_t size)
1337 {
1338         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1339         int i;
1340
1341         for (i = 0; i < size; i++) {
1342                 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1343                           r[i], g[i], b[i]);
1344                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1345                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1346                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1347         }
1348 }
1349
1350 void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1351 {
1352 }
1353
1354 void vmw_du_connector_save(struct drm_connector *connector)
1355 {
1356 }
1357
1358 void vmw_du_connector_restore(struct drm_connector *connector)
1359 {
1360 }
1361
1362 enum drm_connector_status
1363 vmw_du_connector_detect(struct drm_connector *connector, bool force)
1364 {
1365         uint32_t num_displays;
1366         struct drm_device *dev = connector->dev;
1367         struct vmw_private *dev_priv = vmw_priv(dev);
1368
1369         mutex_lock(&dev_priv->hw_mutex);
1370         num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1371         mutex_unlock(&dev_priv->hw_mutex);
1372
1373         return ((vmw_connector_to_du(connector)->unit < num_displays) ?
1374                 connector_status_connected : connector_status_disconnected);
1375 }
1376
1377 static struct drm_display_mode vmw_kms_connector_builtin[] = {
1378         /* 640x480@60Hz */
1379         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1380                    752, 800, 0, 480, 489, 492, 525, 0,
1381                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1382         /* 800x600@60Hz */
1383         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1384                    968, 1056, 0, 600, 601, 605, 628, 0,
1385                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1386         /* 1024x768@60Hz */
1387         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1388                    1184, 1344, 0, 768, 771, 777, 806, 0,
1389                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1390         /* 1152x864@75Hz */
1391         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1392                    1344, 1600, 0, 864, 865, 868, 900, 0,
1393                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1394         /* 1280x768@60Hz */
1395         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1396                    1472, 1664, 0, 768, 771, 778, 798, 0,
1397                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1398         /* 1280x800@60Hz */
1399         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1400                    1480, 1680, 0, 800, 803, 809, 831, 0,
1401                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1402         /* 1280x960@60Hz */
1403         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1404                    1488, 1800, 0, 960, 961, 964, 1000, 0,
1405                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1406         /* 1280x1024@60Hz */
1407         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1408                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1409                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1410         /* 1360x768@60Hz */
1411         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1412                    1536, 1792, 0, 768, 771, 777, 795, 0,
1413                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1414         /* 1440x1050@60Hz */
1415         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1416                    1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1417                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1418         /* 1440x900@60Hz */
1419         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1420                    1672, 1904, 0, 900, 903, 909, 934, 0,
1421                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1422         /* 1600x1200@60Hz */
1423         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1424                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1425                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1426         /* 1680x1050@60Hz */
1427         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1428                    1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1429                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1430         /* 1792x1344@60Hz */
1431         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1432                    2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1433                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1434         /* 1853x1392@60Hz */
1435         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1436                    2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1437                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1438         /* 1920x1200@60Hz */
1439         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1440                    2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1441                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1442         /* 1920x1440@60Hz */
1443         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1444                    2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1445                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1446         /* 2560x1600@60Hz */
1447         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1448                    3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1449                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450         /* Terminate */
1451         { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1452 };
1453
1454 int vmw_du_connector_fill_modes(struct drm_connector *connector,
1455                                 uint32_t max_width, uint32_t max_height)
1456 {
1457         struct vmw_display_unit *du = vmw_connector_to_du(connector);
1458         struct drm_device *dev = connector->dev;
1459         struct vmw_private *dev_priv = vmw_priv(dev);
1460         struct drm_display_mode *mode = NULL;
1461         struct drm_display_mode *bmode;
1462         struct drm_display_mode prefmode = { DRM_MODE("preferred",
1463                 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1464                 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1465                 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1466         };
1467         int i;
1468
1469         /* Add preferred mode */
1470         {
1471                 mode = drm_mode_duplicate(dev, &prefmode);
1472                 if (!mode)
1473                         return 0;
1474                 mode->hdisplay = du->pref_width;
1475                 mode->vdisplay = du->pref_height;
1476                 mode->vrefresh = drm_mode_vrefresh(mode);
1477                 if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
1478                                                mode->vdisplay)) {
1479                         drm_mode_probed_add(connector, mode);
1480
1481                         if (du->pref_mode) {
1482                                 list_del_init(&du->pref_mode->head);
1483                                 drm_mode_destroy(dev, du->pref_mode);
1484                         }
1485
1486                         du->pref_mode = mode;
1487                 }
1488         }
1489
1490         for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1491                 bmode = &vmw_kms_connector_builtin[i];
1492                 if (bmode->hdisplay > max_width ||
1493                     bmode->vdisplay > max_height)
1494                         continue;
1495
1496                 if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
1497                                                 bmode->vdisplay))
1498                         continue;
1499
1500                 mode = drm_mode_duplicate(dev, bmode);
1501                 if (!mode)
1502                         return 0;
1503                 mode->vrefresh = drm_mode_vrefresh(mode);
1504
1505                 drm_mode_probed_add(connector, mode);
1506         }
1507
1508         drm_mode_connector_list_update(connector);
1509
1510         return 1;
1511 }
1512
1513 int vmw_du_connector_set_property(struct drm_connector *connector,
1514                                   struct drm_property *property,
1515                                   uint64_t val)
1516 {
1517         return 0;
1518 }