2 * coretemp.c - Linux kernel module for hardware monitoring
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * Inspired from many hwmon drivers
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/smp.h>
38 #include <linux/moduleparam.h>
39 #include <linux/pci.h>
41 #include <asm/processor.h>
42 #include <asm/cpu_device_id.h>
44 #define DRVNAME "coretemp"
47 * force_tjmax only matters when TjMax can't be read from the CPU itself.
48 * When set, it replaces the driver's suboptimal heuristic.
50 static int force_tjmax;
51 module_param_named(tjmax, force_tjmax, int, 0444);
52 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
54 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
55 #define NUM_REAL_CORES 32 /* Number of Real cores per cpu */
56 #define CORETEMP_NAME_LENGTH 19 /* String Length of attrs */
57 #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
58 #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
59 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
61 #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
62 #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
63 #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
66 #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
68 #define for_each_sibling(i, cpu) for (i = 0; false; )
72 * Per-Core Temperature Data
73 * @last_updated: The time when the current temperature value was updated
74 * earlier (in jiffies).
75 * @cpu_core_id: The CPU Core from which temperature values should be read
76 * This value is passed as "id" field to rdmsr/wrmsr functions.
77 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
78 * from where the temperature values should be read.
79 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
80 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
81 * Otherwise, temp_data holds coretemp data.
82 * @valid: If this is 1, the current temperature is valid.
88 unsigned long last_updated;
95 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
96 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
97 struct mutex update_lock;
100 /* Platform Data per Physical CPU */
101 struct platform_data {
102 struct device *hwmon_dev;
104 struct temp_data *core_data[MAX_CORE_DATA];
105 struct device_attribute name_attr;
109 struct list_head list;
110 struct platform_device *pdev;
114 static LIST_HEAD(pdev_list);
115 static DEFINE_MUTEX(pdev_list_mutex);
117 static ssize_t show_name(struct device *dev,
118 struct device_attribute *devattr, char *buf)
120 return sprintf(buf, "%s\n", DRVNAME);
123 static ssize_t show_label(struct device *dev,
124 struct device_attribute *devattr, char *buf)
126 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
127 struct platform_data *pdata = dev_get_drvdata(dev);
128 struct temp_data *tdata = pdata->core_data[attr->index];
130 if (tdata->is_pkg_data)
131 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
133 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
136 static ssize_t show_crit_alarm(struct device *dev,
137 struct device_attribute *devattr, char *buf)
140 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
141 struct platform_data *pdata = dev_get_drvdata(dev);
142 struct temp_data *tdata = pdata->core_data[attr->index];
144 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
146 return sprintf(buf, "%d\n", (eax >> 5) & 1);
149 static ssize_t show_tjmax(struct device *dev,
150 struct device_attribute *devattr, char *buf)
152 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
153 struct platform_data *pdata = dev_get_drvdata(dev);
155 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
158 static ssize_t show_ttarget(struct device *dev,
159 struct device_attribute *devattr, char *buf)
161 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
162 struct platform_data *pdata = dev_get_drvdata(dev);
164 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
167 static ssize_t show_temp(struct device *dev,
168 struct device_attribute *devattr, char *buf)
171 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
172 struct platform_data *pdata = dev_get_drvdata(dev);
173 struct temp_data *tdata = pdata->core_data[attr->index];
175 mutex_lock(&tdata->update_lock);
177 /* Check whether the time interval has elapsed */
178 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
179 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
181 /* Check whether the data is valid */
182 if (eax & 0x80000000) {
183 tdata->temp = tdata->tjmax -
184 ((eax >> 16) & 0x7f) * 1000;
187 tdata->last_updated = jiffies;
190 mutex_unlock(&tdata->update_lock);
191 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
199 static const struct tjmax_pci tjmax_pci_table[] = {
200 { 0x0708, 110000 }, /* CE41x0 (Sodaville ) */
201 { 0x0c72, 102000 }, /* Atom S1240 (Centerton) */
202 { 0x0c73, 95000 }, /* Atom S1220 (Centerton) */
203 { 0x0c75, 95000 }, /* Atom S1260 (Centerton) */
211 static const struct tjmax tjmax_table[] = {
212 { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
213 { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
224 static const struct tjmax_model tjmax_model_table[] = {
225 { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
226 { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others
227 * Note: Also matches 230 and 330,
228 * which are covered by tjmax_table
230 { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
231 * Note: TjMax for E6xxT is 110C, but CPU type
232 * is undetectable by software
234 { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
235 { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z27x0) */
236 { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx)
237 * Also matches S12x0 (stepping 9), covered by
242 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
244 /* The 100C is default for both mobile and non mobile CPUs */
247 int tjmax_ee = 85000;
252 struct pci_dev *host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
255 * Explicit tjmax table entries override heuristics.
256 * First try PCI host bridge IDs, followed by model ID strings
257 * and model/stepping information.
259 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) {
260 for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) {
261 if (host_bridge->device == tjmax_pci_table[i].device)
262 return tjmax_pci_table[i].tjmax;
266 for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
267 if (strstr(c->x86_model_id, tjmax_table[i].id))
268 return tjmax_table[i].tjmax;
271 for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
272 const struct tjmax_model *tm = &tjmax_model_table[i];
273 if (c->x86_model == tm->model &&
274 (tm->mask == ANY || c->x86_mask == tm->mask))
278 /* Early chips have no MSR for TjMax */
280 if (c->x86_model == 0xf && c->x86_mask < 4)
283 if (c->x86_model > 0xe && usemsr_ee) {
287 * Now we can detect the mobile CPU using Intel provided table
288 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
289 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
291 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
294 "Unable to access MSR 0x17, assuming desktop"
297 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
299 * Trust bit 28 up to Penryn, I could not find any
300 * documentation on that; if you happen to know
301 * someone at Intel please ask
305 /* Platform ID bits 52:50 (EDX starts at bit 32) */
306 platform_id = (edx >> 18) & 0x7;
309 * Mobile Penryn CPU seems to be platform ID 7 or 5
312 if (c->x86_model == 0x17 &&
313 (platform_id == 5 || platform_id == 7)) {
315 * If MSR EE bit is set, set it to 90 degrees C,
316 * otherwise 105 degrees C
325 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
328 "Unable to access MSR 0xEE, for Tjmax, left"
330 } else if (eax & 0x40000000) {
333 } else if (tjmax == 100000) {
335 * If we don't use msr EE it means we are desktop CPU
336 * (with exeception of Atom)
338 dev_warn(dev, "Using relative temperature scale!\n");
344 static bool cpu_has_tjmax(struct cpuinfo_x86 *c)
346 u8 model = c->x86_model;
348 return model > 0xe &&
356 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
363 * A new feature of current Intel(R) processors, the
364 * IA32_TEMPERATURE_TARGET contains the TjMax value
366 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
368 if (cpu_has_tjmax(c))
369 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
371 val = (eax >> 16) & 0xff;
373 * If the TjMax is not plausible, an assumption
377 dev_dbg(dev, "TjMax is %d degrees C\n", val);
383 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
385 return force_tjmax * 1000;
389 * An assumption is made for early CPUs and unreadable MSR.
390 * NOTE: the calculated value may not be correct.
392 return adjust_tjmax(c, id, dev);
395 static int create_name_attr(struct platform_data *pdata,
398 sysfs_attr_init(&pdata->name_attr.attr);
399 pdata->name_attr.attr.name = "name";
400 pdata->name_attr.attr.mode = S_IRUGO;
401 pdata->name_attr.show = show_name;
402 return device_create_file(dev, &pdata->name_attr);
405 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
409 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
410 struct device_attribute *devattr, char *buf) = {
411 show_label, show_crit_alarm, show_temp, show_tjmax,
413 static const char *const names[TOTAL_ATTRS] = {
414 "temp%d_label", "temp%d_crit_alarm",
415 "temp%d_input", "temp%d_crit",
418 for (i = 0; i < tdata->attr_size; i++) {
419 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
421 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
422 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
423 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
424 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
425 tdata->sd_attrs[i].index = attr_no;
426 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
434 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
439 static int chk_ucode_version(unsigned int cpu)
441 struct cpuinfo_x86 *c = &cpu_data(cpu);
444 * Check if we have problem with errata AE18 of Core processors:
445 * Readings might stop update when processor visited too deep sleep,
446 * fixed for stepping D0 (6EC).
448 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
449 pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
455 static struct platform_device *coretemp_get_pdev(unsigned int cpu)
457 u16 phys_proc_id = TO_PHYS_ID(cpu);
458 struct pdev_entry *p;
460 mutex_lock(&pdev_list_mutex);
462 list_for_each_entry(p, &pdev_list, list)
463 if (p->phys_proc_id == phys_proc_id) {
464 mutex_unlock(&pdev_list_mutex);
468 mutex_unlock(&pdev_list_mutex);
472 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
474 struct temp_data *tdata;
476 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
480 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
481 MSR_IA32_THERM_STATUS;
482 tdata->is_pkg_data = pkg_flag;
484 tdata->cpu_core_id = TO_CORE_ID(cpu);
485 tdata->attr_size = MAX_CORE_ATTRS;
486 mutex_init(&tdata->update_lock);
490 static int create_core_data(struct platform_device *pdev, unsigned int cpu,
493 struct temp_data *tdata;
494 struct platform_data *pdata = platform_get_drvdata(pdev);
495 struct cpuinfo_x86 *c = &cpu_data(cpu);
500 * Find attr number for sysfs:
501 * We map the attr number to core id of the CPU
502 * The attr number is always core id + 2
503 * The Pkgtemp will always show up as temp1_*, if available
505 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
507 if (attr_no > MAX_CORE_DATA - 1)
511 * Provide a single set of attributes for all HT siblings of a core
512 * to avoid duplicate sensors (the processor ID and core ID of all
513 * HT siblings of a core are the same).
514 * Skip if a HT sibling of this core is already registered.
515 * This is not an error.
517 if (pdata->core_data[attr_no] != NULL)
520 tdata = init_temp_data(cpu, pkg_flag);
524 /* Test if we can access the status register */
525 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
529 /* We can access status register. Get Critical Temperature */
530 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
533 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
534 * The target temperature is available on older CPUs but not in this
535 * register. Atoms don't have the register at all.
537 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
538 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
542 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
547 pdata->core_data[attr_no] = tdata;
549 /* Create sysfs interfaces */
550 err = create_core_attrs(tdata, &pdev->dev, attr_no);
556 pdata->core_data[attr_no] = NULL;
561 static void coretemp_add_core(unsigned int cpu, int pkg_flag)
563 struct platform_device *pdev = coretemp_get_pdev(cpu);
569 err = create_core_data(pdev, cpu, pkg_flag);
571 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
574 static void coretemp_remove_core(struct platform_data *pdata,
575 struct device *dev, int indx)
578 struct temp_data *tdata = pdata->core_data[indx];
580 /* Remove the sysfs attributes */
581 for (i = 0; i < tdata->attr_size; i++)
582 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
584 kfree(pdata->core_data[indx]);
585 pdata->core_data[indx] = NULL;
588 static int coretemp_probe(struct platform_device *pdev)
590 struct platform_data *pdata;
593 /* Initialize the per-package data structures */
594 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
598 err = create_name_attr(pdata, &pdev->dev);
602 pdata->phys_proc_id = pdev->id;
603 platform_set_drvdata(pdev, pdata);
605 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
606 if (IS_ERR(pdata->hwmon_dev)) {
607 err = PTR_ERR(pdata->hwmon_dev);
608 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
614 device_remove_file(&pdev->dev, &pdata->name_attr);
620 static int coretemp_remove(struct platform_device *pdev)
622 struct platform_data *pdata = platform_get_drvdata(pdev);
625 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
626 if (pdata->core_data[i])
627 coretemp_remove_core(pdata, &pdev->dev, i);
629 device_remove_file(&pdev->dev, &pdata->name_attr);
630 hwmon_device_unregister(pdata->hwmon_dev);
635 static struct platform_driver coretemp_driver = {
637 .owner = THIS_MODULE,
640 .probe = coretemp_probe,
641 .remove = coretemp_remove,
644 static int coretemp_device_add(unsigned int cpu)
647 struct platform_device *pdev;
648 struct pdev_entry *pdev_entry;
650 mutex_lock(&pdev_list_mutex);
652 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
655 pr_err("Device allocation failed\n");
659 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
662 goto exit_device_put;
665 err = platform_device_add(pdev);
667 pr_err("Device addition failed (%d)\n", err);
668 goto exit_device_free;
671 pdev_entry->pdev = pdev;
672 pdev_entry->phys_proc_id = pdev->id;
674 list_add_tail(&pdev_entry->list, &pdev_list);
675 mutex_unlock(&pdev_list_mutex);
682 platform_device_put(pdev);
684 mutex_unlock(&pdev_list_mutex);
688 static void coretemp_device_remove(unsigned int cpu)
690 struct pdev_entry *p, *n;
691 u16 phys_proc_id = TO_PHYS_ID(cpu);
693 mutex_lock(&pdev_list_mutex);
694 list_for_each_entry_safe(p, n, &pdev_list, list) {
695 if (p->phys_proc_id != phys_proc_id)
697 platform_device_unregister(p->pdev);
701 mutex_unlock(&pdev_list_mutex);
704 static bool is_any_core_online(struct platform_data *pdata)
708 /* Find online cores, except pkgtemp data */
709 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
710 if (pdata->core_data[i] &&
711 !pdata->core_data[i]->is_pkg_data) {
718 static void get_core_online(unsigned int cpu)
720 struct cpuinfo_x86 *c = &cpu_data(cpu);
721 struct platform_device *pdev = coretemp_get_pdev(cpu);
725 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
726 * sensors. We check this bit only, all the early CPUs
727 * without thermal sensors will be filtered out.
729 if (!cpu_has(c, X86_FEATURE_DTHERM))
733 /* Check the microcode version of the CPU */
734 if (chk_ucode_version(cpu))
738 * Alright, we have DTS support.
739 * We are bringing the _first_ core in this pkg
740 * online. So, initialize per-pkg data structures and
741 * then bring this core online.
743 err = coretemp_device_add(cpu);
747 * Check whether pkgtemp support is available.
748 * If so, add interfaces for pkgtemp.
750 if (cpu_has(c, X86_FEATURE_PTS))
751 coretemp_add_core(cpu, 1);
754 * Physical CPU device already exists.
755 * So, just add interfaces for this core.
757 coretemp_add_core(cpu, 0);
760 static void put_core_offline(unsigned int cpu)
763 struct platform_data *pdata;
764 struct platform_device *pdev = coretemp_get_pdev(cpu);
766 /* If the physical CPU device does not exist, just return */
770 pdata = platform_get_drvdata(pdev);
772 indx = TO_ATTR_NO(cpu);
774 /* The core id is too big, just return */
775 if (indx > MAX_CORE_DATA - 1)
778 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
779 coretemp_remove_core(pdata, &pdev->dev, indx);
782 * If a HT sibling of a core is taken offline, but another HT sibling
783 * of the same core is still online, register the alternate sibling.
784 * This ensures that exactly one set of attributes is provided as long
785 * as at least one HT sibling of a core is online.
787 for_each_sibling(i, cpu) {
791 * Display temperature sensor data for one HT sibling
792 * per core only, so abort the loop after one such
793 * sibling has been found.
799 * If all cores in this pkg are offline, remove the device.
800 * coretemp_device_remove calls unregister_platform_device,
801 * which in turn calls coretemp_remove. This removes the
802 * pkgtemp entry and does other clean ups.
804 if (!is_any_core_online(pdata))
805 coretemp_device_remove(cpu);
808 static int coretemp_cpu_callback(struct notifier_block *nfb,
809 unsigned long action, void *hcpu)
811 unsigned int cpu = (unsigned long) hcpu;
815 case CPU_DOWN_FAILED:
816 get_core_online(cpu);
818 case CPU_DOWN_PREPARE:
819 put_core_offline(cpu);
825 static struct notifier_block coretemp_cpu_notifier __refdata = {
826 .notifier_call = coretemp_cpu_callback,
829 static const struct x86_cpu_id __initconst coretemp_ids[] = {
830 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
833 MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
835 static int __init coretemp_init(void)
840 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
841 * sensors. We check this bit only, all the early CPUs
842 * without thermal sensors will be filtered out.
844 if (!x86_match_cpu(coretemp_ids))
847 err = platform_driver_register(&coretemp_driver);
852 for_each_online_cpu(i)
855 #ifndef CONFIG_HOTPLUG_CPU
856 if (list_empty(&pdev_list)) {
859 goto exit_driver_unreg;
863 register_hotcpu_notifier(&coretemp_cpu_notifier);
867 #ifndef CONFIG_HOTPLUG_CPU
869 platform_driver_unregister(&coretemp_driver);
875 static void __exit coretemp_exit(void)
877 struct pdev_entry *p, *n;
880 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
881 mutex_lock(&pdev_list_mutex);
882 list_for_each_entry_safe(p, n, &pdev_list, list) {
883 platform_device_unregister(p->pdev);
887 mutex_unlock(&pdev_list_mutex);
889 platform_driver_unregister(&coretemp_driver);
892 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
893 MODULE_DESCRIPTION("Intel Core temperature monitor");
894 MODULE_LICENSE("GPL");
896 module_init(coretemp_init)
897 module_exit(coretemp_exit)