2 * coretemp.c - Linux kernel module for hardware monitoring
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * Inspired from many hwmon drivers
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/smp.h>
38 #include <linux/moduleparam.h>
40 #include <asm/processor.h>
41 #include <asm/cpu_device_id.h>
43 #define DRVNAME "coretemp"
46 * force_tjmax only matters when TjMax can't be read from the CPU itself.
47 * When set, it replaces the driver's suboptimal heuristic.
49 static int force_tjmax;
50 module_param_named(tjmax, force_tjmax, int, 0444);
51 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
53 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
54 #define NUM_REAL_CORES 32 /* Number of Real cores per cpu */
55 #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
56 #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
57 #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
58 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
60 #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
61 #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
62 #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
65 #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
67 #define for_each_sibling(i, cpu) for (i = 0; false; )
71 * Per-Core Temperature Data
72 * @last_updated: The time when the current temperature value was updated
73 * earlier (in jiffies).
74 * @cpu_core_id: The CPU Core from which temperature values should be read
75 * This value is passed as "id" field to rdmsr/wrmsr functions.
76 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
77 * from where the temperature values should be read.
78 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
79 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
80 * Otherwise, temp_data holds coretemp data.
81 * @valid: If this is 1, the current temperature is valid.
87 unsigned long last_updated;
94 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
95 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
96 struct mutex update_lock;
99 /* Platform Data per Physical CPU */
100 struct platform_data {
101 struct device *hwmon_dev;
103 struct temp_data *core_data[MAX_CORE_DATA];
104 struct device_attribute name_attr;
108 struct list_head list;
109 struct platform_device *pdev;
113 static LIST_HEAD(pdev_list);
114 static DEFINE_MUTEX(pdev_list_mutex);
116 static ssize_t show_name(struct device *dev,
117 struct device_attribute *devattr, char *buf)
119 return sprintf(buf, "%s\n", DRVNAME);
122 static ssize_t show_label(struct device *dev,
123 struct device_attribute *devattr, char *buf)
125 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
126 struct platform_data *pdata = dev_get_drvdata(dev);
127 struct temp_data *tdata = pdata->core_data[attr->index];
129 if (tdata->is_pkg_data)
130 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
132 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
135 static ssize_t show_crit_alarm(struct device *dev,
136 struct device_attribute *devattr, char *buf)
139 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
140 struct platform_data *pdata = dev_get_drvdata(dev);
141 struct temp_data *tdata = pdata->core_data[attr->index];
143 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
145 return sprintf(buf, "%d\n", (eax >> 5) & 1);
148 static ssize_t show_tjmax(struct device *dev,
149 struct device_attribute *devattr, char *buf)
151 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
152 struct platform_data *pdata = dev_get_drvdata(dev);
154 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
157 static ssize_t show_ttarget(struct device *dev,
158 struct device_attribute *devattr, char *buf)
160 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
161 struct platform_data *pdata = dev_get_drvdata(dev);
163 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
166 static ssize_t show_temp(struct device *dev,
167 struct device_attribute *devattr, char *buf)
170 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
171 struct platform_data *pdata = dev_get_drvdata(dev);
172 struct temp_data *tdata = pdata->core_data[attr->index];
174 mutex_lock(&tdata->update_lock);
176 /* Check whether the time interval has elapsed */
177 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
178 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
180 /* Check whether the data is valid */
181 if (eax & 0x80000000) {
182 tdata->temp = tdata->tjmax -
183 ((eax >> 16) & 0x7f) * 1000;
186 tdata->last_updated = jiffies;
189 mutex_unlock(&tdata->update_lock);
190 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
198 static const struct tjmax tjmax_table[] = {
199 { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
200 { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
201 { "CPU CE4110", 110000 }, /* Model 0x1c, stepping 10 Sodaville */
202 { "CPU CE4150", 110000 }, /* Model 0x1c, stepping 10 */
203 { "CPU CE4170", 110000 }, /* Model 0x1c, stepping 10 */
214 static const struct tjmax_model tjmax_model_table[] = {
215 { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
216 { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others
217 * Note: Also matches 230 and 330,
218 * which are covered by tjmax_table
220 { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
221 * Note: TjMax for E6xxT is 110C, but CPU type
222 * is undetectable by software
224 { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
225 { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z2760) */
226 { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) */
229 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
231 /* The 100C is default for both mobile and non mobile CPUs */
234 int tjmax_ee = 85000;
240 /* explicit tjmax table entries override heuristics */
241 for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
242 if (strstr(c->x86_model_id, tjmax_table[i].id))
243 return tjmax_table[i].tjmax;
246 for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
247 const struct tjmax_model *tm = &tjmax_model_table[i];
248 if (c->x86_model == tm->model &&
249 (tm->mask == ANY || c->x86_mask == tm->mask))
253 /* Early chips have no MSR for TjMax */
255 if (c->x86_model == 0xf && c->x86_mask < 4)
258 if (c->x86_model > 0xe && usemsr_ee) {
262 * Now we can detect the mobile CPU using Intel provided table
263 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
264 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
266 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
269 "Unable to access MSR 0x17, assuming desktop"
272 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
274 * Trust bit 28 up to Penryn, I could not find any
275 * documentation on that; if you happen to know
276 * someone at Intel please ask
280 /* Platform ID bits 52:50 (EDX starts at bit 32) */
281 platform_id = (edx >> 18) & 0x7;
284 * Mobile Penryn CPU seems to be platform ID 7 or 5
287 if (c->x86_model == 0x17 &&
288 (platform_id == 5 || platform_id == 7)) {
290 * If MSR EE bit is set, set it to 90 degrees C,
291 * otherwise 105 degrees C
300 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
303 "Unable to access MSR 0xEE, for Tjmax, left"
305 } else if (eax & 0x40000000) {
308 } else if (tjmax == 100000) {
310 * If we don't use msr EE it means we are desktop CPU
311 * (with exeception of Atom)
313 dev_warn(dev, "Using relative temperature scale!\n");
319 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
326 * A new feature of current Intel(R) processors, the
327 * IA32_TEMPERATURE_TARGET contains the TjMax value
329 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
331 if (c->x86_model > 0xe && c->x86_model != 0x1c)
332 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
334 val = (eax >> 16) & 0xff;
336 * If the TjMax is not plausible, an assumption
340 dev_dbg(dev, "TjMax is %d degrees C\n", val);
346 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
348 return force_tjmax * 1000;
352 * An assumption is made for early CPUs and unreadable MSR.
353 * NOTE: the calculated value may not be correct.
355 return adjust_tjmax(c, id, dev);
358 static int create_name_attr(struct platform_data *pdata,
361 sysfs_attr_init(&pdata->name_attr.attr);
362 pdata->name_attr.attr.name = "name";
363 pdata->name_attr.attr.mode = S_IRUGO;
364 pdata->name_attr.show = show_name;
365 return device_create_file(dev, &pdata->name_attr);
368 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
372 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
373 struct device_attribute *devattr, char *buf) = {
374 show_label, show_crit_alarm, show_temp, show_tjmax,
376 static const char *const names[TOTAL_ATTRS] = {
377 "temp%d_label", "temp%d_crit_alarm",
378 "temp%d_input", "temp%d_crit",
381 for (i = 0; i < tdata->attr_size; i++) {
382 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
384 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
385 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
386 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
387 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
388 tdata->sd_attrs[i].index = attr_no;
389 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
397 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
402 static int chk_ucode_version(unsigned int cpu)
404 struct cpuinfo_x86 *c = &cpu_data(cpu);
407 * Check if we have problem with errata AE18 of Core processors:
408 * Readings might stop update when processor visited too deep sleep,
409 * fixed for stepping D0 (6EC).
411 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
412 pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
418 static struct platform_device *coretemp_get_pdev(unsigned int cpu)
420 u16 phys_proc_id = TO_PHYS_ID(cpu);
421 struct pdev_entry *p;
423 mutex_lock(&pdev_list_mutex);
425 list_for_each_entry(p, &pdev_list, list)
426 if (p->phys_proc_id == phys_proc_id) {
427 mutex_unlock(&pdev_list_mutex);
431 mutex_unlock(&pdev_list_mutex);
435 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
437 struct temp_data *tdata;
439 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
443 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
444 MSR_IA32_THERM_STATUS;
445 tdata->is_pkg_data = pkg_flag;
447 tdata->cpu_core_id = TO_CORE_ID(cpu);
448 tdata->attr_size = MAX_CORE_ATTRS;
449 mutex_init(&tdata->update_lock);
453 static int create_core_data(struct platform_device *pdev, unsigned int cpu,
456 struct temp_data *tdata;
457 struct platform_data *pdata = platform_get_drvdata(pdev);
458 struct cpuinfo_x86 *c = &cpu_data(cpu);
463 * Find attr number for sysfs:
464 * We map the attr number to core id of the CPU
465 * The attr number is always core id + 2
466 * The Pkgtemp will always show up as temp1_*, if available
468 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
470 if (attr_no > MAX_CORE_DATA - 1)
474 * Provide a single set of attributes for all HT siblings of a core
475 * to avoid duplicate sensors (the processor ID and core ID of all
476 * HT siblings of a core are the same).
477 * Skip if a HT sibling of this core is already registered.
478 * This is not an error.
480 if (pdata->core_data[attr_no] != NULL)
483 tdata = init_temp_data(cpu, pkg_flag);
487 /* Test if we can access the status register */
488 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
492 /* We can access status register. Get Critical Temperature */
493 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
496 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
497 * The target temperature is available on older CPUs but not in this
498 * register. Atoms don't have the register at all.
500 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
501 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
505 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
510 pdata->core_data[attr_no] = tdata;
512 /* Create sysfs interfaces */
513 err = create_core_attrs(tdata, &pdev->dev, attr_no);
519 pdata->core_data[attr_no] = NULL;
524 static void coretemp_add_core(unsigned int cpu, int pkg_flag)
526 struct platform_device *pdev = coretemp_get_pdev(cpu);
532 err = create_core_data(pdev, cpu, pkg_flag);
534 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
537 static void coretemp_remove_core(struct platform_data *pdata,
538 struct device *dev, int indx)
541 struct temp_data *tdata = pdata->core_data[indx];
543 /* Remove the sysfs attributes */
544 for (i = 0; i < tdata->attr_size; i++)
545 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
547 kfree(pdata->core_data[indx]);
548 pdata->core_data[indx] = NULL;
551 static int coretemp_probe(struct platform_device *pdev)
553 struct platform_data *pdata;
556 /* Initialize the per-package data structures */
557 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
561 err = create_name_attr(pdata, &pdev->dev);
565 pdata->phys_proc_id = pdev->id;
566 platform_set_drvdata(pdev, pdata);
568 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
569 if (IS_ERR(pdata->hwmon_dev)) {
570 err = PTR_ERR(pdata->hwmon_dev);
571 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
577 device_remove_file(&pdev->dev, &pdata->name_attr);
583 static int coretemp_remove(struct platform_device *pdev)
585 struct platform_data *pdata = platform_get_drvdata(pdev);
588 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
589 if (pdata->core_data[i])
590 coretemp_remove_core(pdata, &pdev->dev, i);
592 device_remove_file(&pdev->dev, &pdata->name_attr);
593 hwmon_device_unregister(pdata->hwmon_dev);
598 static struct platform_driver coretemp_driver = {
600 .owner = THIS_MODULE,
603 .probe = coretemp_probe,
604 .remove = coretemp_remove,
607 static int coretemp_device_add(unsigned int cpu)
610 struct platform_device *pdev;
611 struct pdev_entry *pdev_entry;
613 mutex_lock(&pdev_list_mutex);
615 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
618 pr_err("Device allocation failed\n");
622 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
625 goto exit_device_put;
628 err = platform_device_add(pdev);
630 pr_err("Device addition failed (%d)\n", err);
631 goto exit_device_free;
634 pdev_entry->pdev = pdev;
635 pdev_entry->phys_proc_id = pdev->id;
637 list_add_tail(&pdev_entry->list, &pdev_list);
638 mutex_unlock(&pdev_list_mutex);
645 platform_device_put(pdev);
647 mutex_unlock(&pdev_list_mutex);
651 static void coretemp_device_remove(unsigned int cpu)
653 struct pdev_entry *p, *n;
654 u16 phys_proc_id = TO_PHYS_ID(cpu);
656 mutex_lock(&pdev_list_mutex);
657 list_for_each_entry_safe(p, n, &pdev_list, list) {
658 if (p->phys_proc_id != phys_proc_id)
660 platform_device_unregister(p->pdev);
664 mutex_unlock(&pdev_list_mutex);
667 static bool is_any_core_online(struct platform_data *pdata)
671 /* Find online cores, except pkgtemp data */
672 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
673 if (pdata->core_data[i] &&
674 !pdata->core_data[i]->is_pkg_data) {
681 static void get_core_online(unsigned int cpu)
683 struct cpuinfo_x86 *c = &cpu_data(cpu);
684 struct platform_device *pdev = coretemp_get_pdev(cpu);
688 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
689 * sensors. We check this bit only, all the early CPUs
690 * without thermal sensors will be filtered out.
692 if (!cpu_has(c, X86_FEATURE_DTHERM))
696 /* Check the microcode version of the CPU */
697 if (chk_ucode_version(cpu))
701 * Alright, we have DTS support.
702 * We are bringing the _first_ core in this pkg
703 * online. So, initialize per-pkg data structures and
704 * then bring this core online.
706 err = coretemp_device_add(cpu);
710 * Check whether pkgtemp support is available.
711 * If so, add interfaces for pkgtemp.
713 if (cpu_has(c, X86_FEATURE_PTS))
714 coretemp_add_core(cpu, 1);
717 * Physical CPU device already exists.
718 * So, just add interfaces for this core.
720 coretemp_add_core(cpu, 0);
723 static void put_core_offline(unsigned int cpu)
726 struct platform_data *pdata;
727 struct platform_device *pdev = coretemp_get_pdev(cpu);
729 /* If the physical CPU device does not exist, just return */
733 pdata = platform_get_drvdata(pdev);
735 indx = TO_ATTR_NO(cpu);
737 /* The core id is too big, just return */
738 if (indx > MAX_CORE_DATA - 1)
741 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
742 coretemp_remove_core(pdata, &pdev->dev, indx);
745 * If a HT sibling of a core is taken offline, but another HT sibling
746 * of the same core is still online, register the alternate sibling.
747 * This ensures that exactly one set of attributes is provided as long
748 * as at least one HT sibling of a core is online.
750 for_each_sibling(i, cpu) {
754 * Display temperature sensor data for one HT sibling
755 * per core only, so abort the loop after one such
756 * sibling has been found.
762 * If all cores in this pkg are offline, remove the device.
763 * coretemp_device_remove calls unregister_platform_device,
764 * which in turn calls coretemp_remove. This removes the
765 * pkgtemp entry and does other clean ups.
767 if (!is_any_core_online(pdata))
768 coretemp_device_remove(cpu);
771 static int coretemp_cpu_callback(struct notifier_block *nfb,
772 unsigned long action, void *hcpu)
774 unsigned int cpu = (unsigned long) hcpu;
778 case CPU_DOWN_FAILED:
779 get_core_online(cpu);
781 case CPU_DOWN_PREPARE:
782 put_core_offline(cpu);
788 static struct notifier_block coretemp_cpu_notifier __refdata = {
789 .notifier_call = coretemp_cpu_callback,
792 static const struct x86_cpu_id __initconst coretemp_ids[] = {
793 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
796 MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
798 static int __init coretemp_init(void)
803 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
804 * sensors. We check this bit only, all the early CPUs
805 * without thermal sensors will be filtered out.
807 if (!x86_match_cpu(coretemp_ids))
810 err = platform_driver_register(&coretemp_driver);
815 for_each_online_cpu(i)
818 #ifndef CONFIG_HOTPLUG_CPU
819 if (list_empty(&pdev_list)) {
822 goto exit_driver_unreg;
826 register_hotcpu_notifier(&coretemp_cpu_notifier);
830 #ifndef CONFIG_HOTPLUG_CPU
832 platform_driver_unregister(&coretemp_driver);
838 static void __exit coretemp_exit(void)
840 struct pdev_entry *p, *n;
843 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
844 mutex_lock(&pdev_list_mutex);
845 list_for_each_entry_safe(p, n, &pdev_list, list) {
846 platform_device_unregister(p->pdev);
850 mutex_unlock(&pdev_list_mutex);
852 platform_driver_unregister(&coretemp_driver);
855 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
856 MODULE_DESCRIPTION("Intel Core temperature monitor");
857 MODULE_LICENSE("GPL");
859 module_init(coretemp_init)
860 module_exit(coretemp_exit)